From fbdafb65de5ce9278c167b8c8c1d77ed35e3a3a1 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Sat, 23 May 2020 03:18:10 +0100 Subject: [PATCH] CR field on Br input data is specd as 0:3 range --- src/soc/fu/branch/pipe_data.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/soc/fu/branch/pipe_data.py b/src/soc/fu/branch/pipe_data.py index 28099eaa..b5aa4c0f 100644 --- a/src/soc/fu/branch/pipe_data.py +++ b/src/soc/fu/branch/pipe_data.py @@ -33,7 +33,7 @@ from soc.fu.branch.br_input_record import CompBROpSubset # TODO: replace class BranchInputData(IntegerData): regspec = [('SPR', 'spr1', '0:63'), ('SPR', 'spr2', '0:63'), - ('CR', 'cr', '4'), + ('CR', 'cr', '0:3'), ('PC', 'cia', '0:63')] def __init__(self, pspec): super().__init__(pspec) -- 2.30.2