From fbe6c11c5df21e7fafda7bec2b45f6d9fc355a14 Mon Sep 17 00:00:00 2001
From: Dmitry Selyutin <dmitry.selyutin@3mdeb.com>
Date: Sun, 29 Aug 2021 19:34:42 +0000
Subject: [PATCH] fixedarith: switch divweuX to XLEN

---
 openpower/isa/fixedarith.mdwn | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

diff --git a/openpower/isa/fixedarith.mdwn b/openpower/isa/fixedarith.mdwn
index b9501093..365809f3 100644
--- a/openpower/isa/fixedarith.mdwn
+++ b/openpower/isa/fixedarith.mdwn
@@ -476,20 +476,20 @@ XO-Form
 
 Pseudo-code:
 
-    dividend[0:63] <- (RA)[32:63] || [0]*32
-    divisor[0:63] <- [0]*32 || (RB)[32:63]
-    if (divisor = [0]*64) then
+    dividend[0:XLEN-1] <- (RA)[XLEN/2:XLEN-1] || [0]*(XLEN/2)
+    divisor[0:XLEN-1] <- [0]*(XLEN/2) || (RB)[XLEN/2:XLEN-1]
+    if (divisor = [0]*XLEN) then
         overflow <- 1
     else
         result <- dividend / divisor
-        if RA[32:63] <u RB[32:63] then
-            RT[32:63] <- result[32:63]
-            RT[0:31] <- undefined([0]*32)
+        if RA[XLEN/2:XLEN-1] <u RB[XLEN/2:XLEN-1] then
+            RT[XLEN/2:XLEN-1] <- result[XLEN/2:XLEN-1]
+            RT[0:(XLEN/2)-1] <- undefined([0]*(XLEN/2))
             overflow <- 0
         else
             overflow <- 1
     if overflow = 1 then
-        RT[0:63] <- undefined([0]*64)
+        RT[0:XLEN-1] <- undefined([0]*XLEN)
 
 Special Registers Altered:
 
-- 
2.30.2