From fbe6e491b92257699c2453992ca9aab72038c925 Mon Sep 17 00:00:00 2001
From: lkcl <lkcl@web>
Date: Sun, 3 May 2020 14:18:00 +0100
Subject: [PATCH]

---
 3d_gpu/architecture.mdwn | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/3d_gpu/architecture.mdwn b/3d_gpu/architecture.mdwn
index 5c826669e..47705b301 100644
--- a/3d_gpu/architecture.mdwn
+++ b/3d_gpu/architecture.mdwn
@@ -52,6 +52,10 @@ Section TODO, with own page [[architecture/memory_and_cache]]  LD/ST accesses ar
 
 Wishbone was chosen.  to expand why (related to patents).
 
+# Register Files.
+
+See [[architecture/regfile]]
+
 # IOMMU
 
 Section TODO, an IOMMU is an integral part of protecting processes from directly accessing peripherals (and other memory areas) that they shouldn't.
-- 
2.30.2