From fc12ae421543c019c3afd27ef095f828fd3b0e3b Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Sat, 29 May 2021 12:20:20 -0400 Subject: [PATCH] sim: frv: fix compiler parentheses suggestions warnings Newer gcc warns when writing statements like (a && b || c && d), so add more parentheses to make it (and the reader) happy. --- sim/frv/ChangeLog | 13 +++++++++++++ sim/frv/cache.c | 6 +++--- sim/frv/memory.c | 38 +++++++++++++++++++------------------- sim/frv/traps.c | 7 ++++--- 4 files changed, 39 insertions(+), 25 deletions(-) diff --git a/sim/frv/ChangeLog b/sim/frv/ChangeLog index d94526a4594..348308d7b64 100644 --- a/sim/frv/ChangeLog +++ b/sim/frv/ChangeLog @@ -1,3 +1,16 @@ +2021-05-29 Mike Frysinger + + * cache.c (non_cache_access): Add parentheses. + * memory.c (fr500_check_data_read_address): Likewise. + (fr550_check_data_read_address): Likewise. + (fr500_check_readwrite_address): Likewise. + (fr550_check_readwrite_address): Likewise. + (fr500_check_insn_read_address): Likewise. + (fr500_check_write_address): Likewise. + (fr550_check_write_address): Likewise. + * traps.c (frv_mtrap): Likewise. + (frvbf_commit): Likewise. + 2021-05-17 Mike Frysinger * sim-main.h (struct sim_state): Delete. diff --git a/sim/frv/cache.c b/sim/frv/cache.c index e569d5239de..5c7700354fe 100644 --- a/sim/frv/cache.c +++ b/sim/frv/cache.c @@ -211,12 +211,12 @@ non_cache_access (FRV_CACHE *cache, USI address) case bfd_mach_fr400: case bfd_mach_fr450: if (address >= 0xff000000 - || address >= 0xfe000000 && address <= 0xfeffffff) + || (address >= 0xfe000000 && address <= 0xfeffffff)) return 1; /* non-cache access */ break; case bfd_mach_fr550: if (address >= 0xff000000 - || address >= 0xfeff0000 && address <= 0xfeffffff) + || (address >= 0xfeff0000 && address <= 0xfeffffff)) return 1; /* non-cache access */ if (cache == CPU_INSN_CACHE (current_cpu)) { @@ -228,7 +228,7 @@ non_cache_access (FRV_CACHE *cache, USI address) break; default: if (address >= 0xff000000 - || address >= 0xfeff0000 && address <= 0xfeffffff) + || (address >= 0xfeff0000 && address <= 0xfeffffff)) return 1; /* non-cache access */ if (cache == CPU_INSN_CACHE (current_cpu)) { diff --git a/sim/frv/memory.c b/sim/frv/memory.c index 681fea49c84..a226cd21060 100644 --- a/sim/frv/memory.c +++ b/sim/frv/memory.c @@ -51,8 +51,8 @@ fr500_check_data_read_address (SIM_CPU *current_cpu, SI address, int align_mask) address &= ~align_mask; } - if ((USI)address >= 0xfeff0600 && (USI)address <= 0xfeff7fff - || (USI)address >= 0xfe800000 && (USI)address <= 0xfefeffff) + if (((USI)address >= 0xfeff0600 && (USI)address <= 0xfeff7fff) + || ((USI)address >= 0xfe800000 && (USI)address <= 0xfefeffff)) frv_queue_data_access_error_interrupt (current_cpu, address); return address; @@ -61,7 +61,7 @@ fr500_check_data_read_address (SIM_CPU *current_cpu, SI address, int align_mask) static SI fr550_check_data_read_address (SIM_CPU *current_cpu, SI address, int align_mask) { - if ((USI)address >= 0xfe800000 && (USI)address <= 0xfefeffff + if (((USI)address >= 0xfe800000 && (USI)address <= 0xfefeffff) || (align_mask > 0x3 && ((USI)address >= 0xfeff0000 && (USI)address <= 0xfeffffff))) frv_queue_data_access_error_interrupt (current_cpu, address); @@ -118,10 +118,10 @@ fr400_check_readwrite_address (SIM_CPU *current_cpu, SI address, int align_mask) static SI fr500_check_readwrite_address (SIM_CPU *current_cpu, SI address, int align_mask) { - if ((USI)address >= 0xfe000000 && (USI)address <= 0xfe003fff - || (USI)address >= 0xfe004000 && (USI)address <= 0xfe3fffff - || (USI)address >= 0xfe400000 && (USI)address <= 0xfe403fff - || (USI)address >= 0xfe404000 && (USI)address <= 0xfe7fffff) + if (((USI)address >= 0xfe000000 && (USI)address <= 0xfe003fff) + || ((USI)address >= 0xfe004000 && (USI)address <= 0xfe3fffff) + || ((USI)address >= 0xfe400000 && (USI)address <= 0xfe403fff) + || ((USI)address >= 0xfe404000 && (USI)address <= 0xfe7fffff)) frv_queue_data_access_exception_interrupt (current_cpu); return address; @@ -132,14 +132,14 @@ fr550_check_readwrite_address (SIM_CPU *current_cpu, SI address, int align_mask) { /* No alignment restrictions on fr550 */ - if ((USI)address >= 0xfe000000 && (USI)address <= 0xfe3fffff - || (USI)address >= 0xfe408000 && (USI)address <= 0xfe7fffff) + if (((USI)address >= 0xfe000000 && (USI)address <= 0xfe3fffff) + || ((USI)address >= 0xfe408000 && (USI)address <= 0xfe7fffff)) frv_queue_data_access_exception_interrupt (current_cpu); else { USI hsr0 = GET_HSR0 (); if (! GET_HSR0_RME (hsr0) - && (USI)address >= 0xfe400000 && (USI)address <= 0xfe407fff) + && ((USI)address >= 0xfe400000 && (USI)address <= 0xfe407fff)) frv_queue_data_access_exception_interrupt (current_cpu); } @@ -199,18 +199,18 @@ fr500_check_insn_read_address (SIM_CPU *current_cpu, PCADDR address, address &= ~align_mask; } - if ((USI)address >= 0xfeff0600 && (USI)address <= 0xfeff7fff - || (USI)address >= 0xfe800000 && (USI)address <= 0xfefeffff) + if (((USI)address >= 0xfeff0600 && (USI)address <= 0xfeff7fff) + || ((USI)address >= 0xfe800000 && (USI)address <= 0xfefeffff)) frv_queue_instruction_access_error_interrupt (current_cpu); - else if ((USI)address >= 0xfe004000 && (USI)address <= 0xfe3fffff - || (USI)address >= 0xfe400000 && (USI)address <= 0xfe403fff - || (USI)address >= 0xfe404000 && (USI)address <= 0xfe7fffff) + else if (((USI)address >= 0xfe004000 && (USI)address <= 0xfe3fffff) + || ((USI)address >= 0xfe400000 && (USI)address <= 0xfe403fff) + || ((USI)address >= 0xfe404000 && (USI)address <= 0xfe7fffff)) frv_queue_instruction_access_exception_interrupt (current_cpu); else { USI hsr0 = GET_HSR0 (); if (! GET_HSR0_RME (hsr0) - && (USI)address >= 0xfe000000 && (USI)address <= 0xfe003fff) + && ((USI)address >= 0xfe000000 && (USI)address <= 0xfe003fff)) frv_queue_instruction_access_exception_interrupt (current_cpu); } @@ -704,8 +704,8 @@ fr500_check_write_address (SIM_CPU *current_cpu, SI address, int align_mask) item->slot = frv_interrupt_state.slot; address &= ~align_mask; } - if (address >= 0xfeff0600 && address <= 0xfeff7fff - || address >= 0xfe800000 && address <= 0xfefeffff) + if ((address >= 0xfeff0600 && address <= 0xfeff7fff) + || (address >= 0xfe800000 && address <= 0xfefeffff)) frv_queue_program_interrupt (current_cpu, FRV_DATA_STORE_ERROR); return address; @@ -714,7 +714,7 @@ fr500_check_write_address (SIM_CPU *current_cpu, SI address, int align_mask) static SI fr550_check_write_address (SIM_CPU *current_cpu, SI address, int align_mask) { - if ((USI)address >= 0xfe800000 && (USI)address <= 0xfefeffff + if (((USI)address >= 0xfe800000 && (USI)address <= 0xfefeffff) || (align_mask > 0x3 && ((USI)address >= 0xfeff0000 && (USI)address <= 0xfeffffff))) frv_queue_program_interrupt (current_cpu, FRV_DATA_STORE_ERROR); diff --git a/sim/frv/traps.c b/sim/frv/traps.c index 25b4e3eea25..d5cab249622 100644 --- a/sim/frv/traps.c +++ b/sim/frv/traps.c @@ -275,7 +275,8 @@ frv_mtrap (SIM_CPU *current_cpu) /* Check the status of media exceptions in MSR0. */ SI msr = GET_MSR (0); - if (GET_MSR_AOVF (msr) || GET_MSR_MTT (msr) && STATE_ARCHITECTURE (sd)->mach != bfd_mach_fr550) + if (GET_MSR_AOVF (msr) + || (GET_MSR_MTT (msr) && STATE_ARCHITECTURE (sd)->mach != bfd_mach_fr550)) frv_queue_program_interrupt (current_cpu, FRV_MP_EXCEPTION); } @@ -922,8 +923,8 @@ frvbf_commit (SIM_CPU *current_cpu, SI target_index, BI is_float) NE_flag = GET_NE_FLAG (NE_flags, target_index); else { - NE_flag = - hi_available && NE_flags[0] != 0 || lo_available && NE_flags[1] != 0; + NE_flag = (hi_available && NE_flags[0] != 0) + || (lo_available && NE_flags[1] != 0); } /* Always clear the appropriate NE flags. */ -- 2.30.2