From fc57263d01be7fcd946c499d46f709040e1486a5 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Wed, 7 Nov 2018 11:42:10 +0000 Subject: [PATCH] add mul elwidth redirection --- riscv/sv_insn_redirect.cc | 57 +++++++++++++++++++++++++++------------ riscv/sv_insn_redirect.h | 5 ++++ 2 files changed, 45 insertions(+), 17 deletions(-) diff --git a/riscv/sv_insn_redirect.cc b/riscv/sv_insn_redirect.cc index d346116..b06f270 100644 --- a/riscv/sv_insn_redirect.cc +++ b/riscv/sv_insn_redirect.cc @@ -468,6 +468,7 @@ SRESTYPE sv_proc_t::rv_int_op_finish(SLHSTYPE const & lhs, \ OP_PREP_FINISH(sv_reg_t, sv_reg_t, sv_reg_t, uint64_t, uint64_t, uint64_t) +OP_PREP_FINISH(sv_sreg_t, sv_reg_t, sv_sreg_t, int64_t, uint64_t, int64_t) OP_PREP_FINISH(sv_sreg_t, sv_sreg_t, sv_sreg_t, int64_t, int64_t, int64_t) sv_reg_t sv_proc_t::rv_add(sv_reg_t const & lhs, sv_reg_t const & rhs) @@ -558,12 +559,32 @@ sv_reg_t sv_proc_t::rv_rem(sv_reg_t const & lhs, sv_reg_t const & rhs) sv_reg_t sv_proc_t::rv_mul(sv_reg_t const & lhs, sv_reg_t const & rhs) { - return lhs * rhs; + uint8_t bitwidth = _insn->src_bitwidth; + uint64_t vlhs = 0; + uint64_t vrhs = 0; + if (rv_int_op_prepare(lhs, rhs, vlhs, vrhs, bitwidth)) { + sv_reg_t result = lhs * rhs; + fprintf(stderr, "mul result %lx %lx %lx\n", + (uint64_t)lhs, (uint64_t)rhs, (uint64_t)result); + return result; + } + uint64_t result = vlhs * vrhs; + return rv_int_op_finish(lhs, rhs, result, bitwidth); } sv_sreg_t sv_proc_t::rv_mul(sv_sreg_t const & lhs, sv_reg_t const & rhs) { - return lhs * rhs; + uint8_t bitwidth = _insn->src_bitwidth; + int64_t vlhs = 0; + uint64_t vrhs = 0; + if (rv_int_op_prepare(lhs, rhs, vlhs, vrhs, bitwidth)) { + sv_sreg_t result = lhs * rhs; + fprintf(stderr, "mul result %lx %lx %lx\n", + (int64_t)lhs, (uint64_t)rhs, (uint64_t)result); + return result; + } + int64_t result = vlhs * vrhs; + return rv_int_op_finish(lhs, rhs, result, bitwidth); } sv_sreg_t sv_proc_t::rv_mul(sv_sreg_t const & lhs, sv_sreg_t const & rhs) @@ -571,6 +592,7 @@ sv_sreg_t sv_proc_t::rv_mul(sv_sreg_t const & lhs, sv_sreg_t const & rhs) return lhs * rhs; } +/* 32-bit mulh/mulhu/mulhsu */ sv_reg_t sv_proc_t::rv_mulhu(sv_reg_t const & lhs, sv_reg_t const & rhs) { return (lhs * rhs) >> 32; @@ -586,6 +608,22 @@ sv_sreg_t sv_proc_t::rv_mulh(sv_sreg_t const & lhs, sv_sreg_t const & rhs) return (lhs * rhs) >> 32; } +/* 64-bit mulh/mulhu/mulhsu */ +sv_sreg_t (sv_proc_t::mulhsu)(sv_sreg_t const& a, sv_reg_t const& b) +{ + return sv_sreg_t(::mulhsu(a, b)); +} + +sv_sreg_t (sv_proc_t::mulh)(sv_sreg_t const& a, sv_sreg_t const& b) +{ + return sv_sreg_t(::mulh(a, b)); +} + +sv_reg_t (sv_proc_t::mulhu)(sv_reg_t const& a, sv_reg_t const& b) +{ + return sv_reg_t(::mulhu(a, b)); +} + sv_reg_t sv_proc_t::rv_and(sv_reg_t const & lhs, sv_reg_t const & rhs) { return lhs & rhs; @@ -989,21 +1027,6 @@ sv_reg_t (sv_proc_t::f128_to_i64)( sv_float128_t a, uint_fast8_t roundingMode, return sv_reg_t(::f128_to_i64(a, roundingMode, exact)); } -sv_sreg_t (sv_proc_t::mulhsu)(sv_sreg_t const& a, sv_reg_t const& b) -{ - return sv_sreg_t(::mulhsu(a, b)); -} - -sv_sreg_t (sv_proc_t::mulh)(sv_sreg_t const& a, sv_sreg_t const& b) -{ - return sv_sreg_t(::mulh(a, b)); -} - -sv_reg_t (sv_proc_t::mulhu)(sv_reg_t const& a, sv_reg_t const& b) -{ - return sv_reg_t(::mulhu(a, b)); -} - // -------- sv_float64_t (sv_proc_t::f64_add)( sv_float64_t a, sv_float64_t b ) diff --git a/riscv/sv_insn_redirect.h b/riscv/sv_insn_redirect.h index 4056c5f..ebac58f 100644 --- a/riscv/sv_insn_redirect.h +++ b/riscv/sv_insn_redirect.h @@ -272,11 +272,16 @@ public: bool rv_int_op_prepare(sv_reg_t const & lhs, sv_reg_t const & rhs, uint64_t &vlhs, uint64_t &vrhs, uint8_t &bitwidth); + bool rv_int_op_prepare(sv_sreg_t const & lhs, sv_reg_t const & rhs, + int64_t &vlhs, uint64_t &vrhs, + uint8_t &bitwidth); bool rv_int_op_prepare(sv_sreg_t const & lhs, sv_sreg_t const & rhs, int64_t &vlhs, int64_t &vrhs, uint8_t &bitwidth); sv_reg_t rv_int_op_finish(sv_reg_t const & lhs, sv_reg_t const & rhs, uint64_t &result, uint8_t &bitwidth); + sv_sreg_t rv_int_op_finish(sv_sreg_t const & lhs, sv_reg_t const & rhs, + int64_t &result, uint8_t &bitwidth); sv_sreg_t rv_int_op_finish(sv_sreg_t const & lhs, sv_sreg_t const & rhs, int64_t &result, uint8_t &bitwidth); -- 2.30.2