From fc917fdaf848e3f15aece529be41228b75add4b1 Mon Sep 17 00:00:00 2001 From: Jacob Lifshay Date: Wed, 22 Mar 2023 18:28:34 -0700 Subject: [PATCH] convert mnemonics to be code blocks, so markdown doesn't put all inst variants on one line --- openpower/sv/int_fp_mv.mdwn | 60 +++++++++++++++++++++++-------------- openpower/sv/rfc/ls006.mdwn | 60 +++++++++++++++++++++++-------------- 2 files changed, 76 insertions(+), 44 deletions(-) diff --git a/openpower/sv/int_fp_mv.mdwn b/openpower/sv/int_fp_mv.mdwn index 86d4ba616..61e778ce5 100644 --- a/openpower/sv/int_fp_mv.mdwn +++ b/openpower/sv/int_fp_mv.mdwn @@ -292,8 +292,10 @@ File to another. ## Floating Move To GPR -`fmvtg RT, FRB` -`fmvtg. RT, FRB` +``` + fmvtg RT, FRB + fmvtg. RT, FRB +``` | 0-5 | 6-10 | 11-15 | 16-20 | 21-30 | 31 | Form | |-----|------|-------|-------|-------|----|--------| @@ -316,8 +318,10 @@ Special Registers altered: ## Floating Move To GPR Single -`fmvtgs RT, FRB` -`fmvtgs. RT, FRB` +``` + fmvtgs RT, FRB + fmvtgs. RT, FRB +``` | 0-5 | 6-10 | 11-15 | 16-20 | 21-30 | 31 | Form | |-----|------|-------|-------|-------|----|--------| @@ -340,8 +344,10 @@ Special Registers altered: ## Floating Move From GPR -`fmvfg FRT, RB` -`fmvfg. FRT, RB` +``` + fmvfg FRT, RB + fmvfg. FRT, RB +``` | 0-5 | 6-10 | 11-15 | 16-20 | 21-30 | 31 | Form | |-----|------|-------|-------|-------|----|--------| @@ -364,8 +370,10 @@ Special Registers altered: ## Floating Move From GPR Single -`fmvfgs FRT, RB` -`fmvfgs. FRT, RB` +``` + fmvfgs FRT, RB + fmvfgs. FRT, RB +``` | 0-5 | 6-10 | 11-15 | 16-20 | 21-30 | 31 | Form | |-----|------|-------|-------|-------|----|--------| @@ -399,10 +407,12 @@ as exceptions. |-----|------|-------|-------|-------|-------|----|--------| | PO | FRT | IT | 0 | RB | XO | Rc | X-Form | -`fcvtfg FRT, RB, IT` -`fcvtfg. FRT, RB, IT` -`fcvtfgs FRT, RB, IT` -`fcvtfgs. FRT, RB, IT` +``` + fcvtfg FRT, RB, IT + fcvtfg. FRT, RB, IT + fcvtfgs FRT, RB, IT + fcvtfgs. FRT, RB, IT +``` ``` if IT[0] = 0 then # 32-bit int -> 64-bit float @@ -470,8 +480,10 @@ Special Registers altered: |-----|------|-------|-------|-------|-------|----|--------| | PO | FRT | IT | 0 | RB | XO | Rc | X-Form | -`fcvtfgs FRT, RB, IT` -`fcvtfgs. FRT, RB, IT` +``` + fcvtfgs FRT, RB, IT + fcvtfgs. FRT, RB, IT +``` ``` # rounding may be necessary. based off xscvuxdsp @@ -661,10 +673,12 @@ Section 7.1 of the ECMAScript / JavaScript |-----|------|-------|-------|-------|-------|----|----|---------| | PO | RT | IT | CVM | FRB | XO | OE | Rc | XO-Form | -`fcvttg RT, FRB, CVM, IT` -`fcvttg. RT, FRB, CVM, IT` -`fcvttgo RT, FRB, CVM, IT` -`fcvttgo. RT, FRB, CVM, IT` +``` + fcvttg RT, FRB, CVM, IT + fcvttg. RT, FRB, CVM, IT + fcvttgo RT, FRB, CVM, IT + fcvttgo. RT, FRB, CVM, IT +``` ``` # based on xscvdpuxws @@ -804,10 +818,12 @@ Special Registers altered: |-----|------|-------|-------|-------|-------|----|----|---------| | PO | RT | IT | CVM | FRB | XO | OE | Rc | XO-Form | -`fcvtstg RT, FRB, CVM, IT` -`fcvtstg. RT, FRB, CVM, IT` -`fcvtstgo RT, FRB, CVM, IT` -`fcvtstgo. RT, FRB, CVM, IT` +``` + fcvtstg RT, FRB, CVM, IT + fcvtstg. RT, FRB, CVM, IT + fcvtstgo RT, FRB, CVM, IT + fcvtstgo. RT, FRB, CVM, IT +``` ``` # based on xscvdpuxws diff --git a/openpower/sv/rfc/ls006.mdwn b/openpower/sv/rfc/ls006.mdwn index f839a7d52..59723f2a2 100644 --- a/openpower/sv/rfc/ls006.mdwn +++ b/openpower/sv/rfc/ls006.mdwn @@ -131,8 +131,10 @@ Tables that are used by ## Floating Move To GPR -`fmvtg RT, FRB` -`fmvtg. RT, FRB` +``` + fmvtg RT, FRB + fmvtg. RT, FRB +``` | 0-5 | 6-10 | 11-15 | 16-20 | 21-30 | 31 | Form | |-----|------|-------|-------|-------|----|--------| @@ -159,8 +161,10 @@ Special Registers altered: ## Floating Move To GPR Single -`fmvtgs RT, FRB` -`fmvtgs. RT, FRB` +``` + fmvtgs RT, FRB + fmvtgs. RT, FRB +``` | 0-5 | 6-10 | 11-15 | 16-20 | 21-30 | 31 | Form | |-----|------|-------|-------|-------|----|--------| @@ -187,8 +191,10 @@ Special Registers altered: ## Floating Move From GPR -`fmvfg FRT, RB` -`fmvfg. FRT, RB` +``` + fmvfg FRT, RB + fmvfg. FRT, RB +``` | 0-5 | 6-10 | 11-15 | 16-20 | 21-30 | 31 | Form | |-----|------|-------|-------|-------|----|--------| @@ -215,8 +221,10 @@ Special Registers altered: ## Floating Move From GPR Single -`fmvfgs FRT, RB` -`fmvfgs. FRT, RB` +``` + fmvfgs FRT, RB + fmvfgs. FRT, RB +``` | 0-5 | 6-10 | 11-15 | 16-20 | 21-30 | 31 | Form | |-----|------|-------|-------|-------|----|--------| @@ -247,10 +255,12 @@ Special Registers altered: |-----|------|-------|-------|-------|-------|----|--------| | PO | FRT | IT | 0 | RB | XO | Rc | X-Form | -`fcvtfg FRT, RB, IT` -`fcvtfg. FRT, RB, IT` -`fcvtfgs FRT, RB, IT` -`fcvtfgs. FRT, RB, IT` +``` + fcvtfg FRT, RB, IT + fcvtfg. FRT, RB, IT + fcvtfgs FRT, RB, IT + fcvtfgs. FRT, RB, IT +``` ``` if IT[0] = 0 then # 32-bit int -> 64-bit float @@ -322,8 +332,10 @@ Special Registers altered: |-----|------|-------|-------|-------|-------|----|--------| | PO | FRT | IT | 0 | RB | XO | Rc | X-Form | -`fcvtfgs FRT, RB, IT` -`fcvtfgs. FRT, RB, IT` +``` + fcvtfgs FRT, RB, IT + fcvtfgs. FRT, RB, IT +``` ``` # rounding may be necessary. based off xscvuxdsp @@ -525,10 +537,12 @@ Section 7.1 of the ECMAScript / JavaScript |-----|------|-------|-------|-------|-------|----|----|---------| | PO | RT | IT | CVM | FRB | XO | OE | Rc | XO-Form | -`fcvttg RT, FRB, CVM, IT` -`fcvttg. RT, FRB, CVM, IT` -`fcvttgo RT, FRB, CVM, IT` -`fcvttgo. RT, FRB, CVM, IT` +``` + fcvttg RT, FRB, CVM, IT + fcvttg. RT, FRB, CVM, IT + fcvttgo RT, FRB, CVM, IT + fcvttgo. RT, FRB, CVM, IT +``` ``` # based on xscvdpuxws @@ -672,10 +686,12 @@ Special Registers altered: |-----|------|-------|-------|-------|-------|----|----|---------| | PO | RT | IT | CVM | FRB | XO | OE | Rc | XO-Form | -`fcvtstg RT, FRB, CVM, IT` -`fcvtstg. RT, FRB, CVM, IT` -`fcvtstgo RT, FRB, CVM, IT` -`fcvtstgo. RT, FRB, CVM, IT` +``` + fcvtstg RT, FRB, CVM, IT + fcvtstg. RT, FRB, CVM, IT + fcvtstgo RT, FRB, CVM, IT + fcvtstgo. RT, FRB, CVM, IT +``` ``` # based on xscvdpuxws -- 2.30.2