From fd0366cc735aab1946fb008e2db63726a5ab2044 Mon Sep 17 00:00:00 2001 From: lkcl Date: Sun, 14 Aug 2022 14:02:03 +0100 Subject: [PATCH] --- openpower/sv/ldst.mdwn | 39 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) diff --git a/openpower/sv/ldst.mdwn b/openpower/sv/ldst.mdwn index c7d29e3c0..495148b6f 100644 --- a/openpower/sv/ldst.mdwn +++ b/openpower/sv/ldst.mdwn @@ -49,6 +49,10 @@ as well as Element-width overrides and Twin-Predication. *Despite being constructed from Scalar LD/ST none of these Modes exist or make sense in any Scalar ISA. They **only** exist in Vector ISAs* +Note also that Indexed [[sv/remap]] mode may be applied to both +v3.0 LD/ST Immediate instructions *and* v3.0 LD/ST Indexed instructions. +LD/ST-Indexed should not be conflated with Indexed REMAP mode. + # Determining the LD/ST Modes A minor complication (caused by the retro-fitting of modern Vector @@ -281,6 +285,41 @@ Indexed LD is: Note in both cases that [[sv/svp64]] allows RA-as-a-dest in "update" mode (`ldux`) to be effectively a *completely different* register from RA-as-a-source. This because there is room in svp64 to extend RA-as-src as well as RA-as-dest, both independently as scalar or vector *and* independently extending their range. +# LD/ST Indexed vs Indexed REMAP + +Unfortunately the word "Indexed" is used twice in completely different +contexts, potentially causing confusion. + +* There has existed instructions in the Power ISA `ld RT,RA,RB` since + its creation: these are called "LD/ST Indexed" instructions and their + name and meaning is well-established. +* There now exists, in Simple-V, a [[sv/remap]] mode called "Indexed" + Mode that can be applied to *any* instruction **including those + named LD/ST Indexed**. + +Whilst it may be costly in terms of register reads to allow REMAP +Indexed Mode to be applied to any Vectorised LD/ST Indexed operation such as +`sv.ld *RT,RA,*RB`, or even viewed as redundant, firstly the strict +application of the RISC Paradigm that Simple-V follows makes it awkward +to consider *preventing* the application of Indexed REMAP to such +operations, and secondly they are not actually the same at all. + +Indexed REMAP, as applied to RB in the instruction `sv.ld *RT,RA,*RB` +effectively performs an *in-place* re-ordering of the offsets, RB. +To achieve the same effect without Indexed REMAP would require taking +a *copy* of the Vector of offsets starting at RB, manually explicitly +reordering them, and finally using the copy of re-ordered offsets in +a non-REMAP'ed `sv.ld`. Pseudocode showing what actually occurs: + + # sv.ld *RT,RA,*RB with Index REMAP applied to RB + for i in 0..VL-1: + rb_idx = indexed_remap(i) # normally rb_idx = i + EA = GPR(RA) + GPR(RB+rb_idx) + GPR(RT+i) = MEM(EA, 8) + +Thus it can be seen that the use of Indexed REMAP saves copying +and manual reordering of the Vector of RB offsets. + # LD/ST ffirst LD/ST ffirst treats the first LD/ST in a vector (element 0) as an -- 2.30.2