From fd2aff858bdf62d74bbd1756ace84783228f616f Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Fri, 11 Nov 2016 13:26:00 -0800 Subject: [PATCH] vc4: Use ra14/rb14 as the spilling registers. This makes the raddr fixups compatible with FS threading. --- src/gallium/drivers/vc4/vc4_qpu_emit.c | 12 ++++++------ src/gallium/drivers/vc4/vc4_register_allocate.c | 4 ++-- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/src/gallium/drivers/vc4/vc4_qpu_emit.c b/src/gallium/drivers/vc4/vc4_qpu_emit.c index 58fcbc93d97..cb936243c65 100644 --- a/src/gallium/drivers/vc4/vc4_qpu_emit.c +++ b/src/gallium/drivers/vc4/vc4_qpu_emit.c @@ -157,7 +157,7 @@ setup_for_vpm_read(struct vc4_compile *c, struct qblock *block) * address. * * In that case, we need to move one to a temporary that can be used in the - * instruction, instead. We reserve ra31/rb31 for this purpose. + * instruction, instead. We reserve ra14/rb14 for this purpose. */ static void fixup_raddr_conflict(struct qblock *block, @@ -183,9 +183,9 @@ fixup_raddr_conflict(struct qblock *block, * in case of unpacks. */ if (qir_is_float_input(inst)) - queue(block, qpu_a_FMAX(qpu_rb(31), *src0, *src0)); + queue(block, qpu_a_FMAX(qpu_rb(14), *src0, *src0)); else - queue(block, qpu_a_MOV(qpu_rb(31), *src0)); + queue(block, qpu_a_MOV(qpu_rb(14), *src0)); /* If we had an unpack on this A-file source, we need to put * it into this MOV, not into the later move from regfile B. @@ -194,10 +194,10 @@ fixup_raddr_conflict(struct qblock *block, *last_inst(block) |= *unpack; *unpack = 0; } - *src0 = qpu_rb(31); + *src0 = qpu_rb(14); } else { - queue(block, qpu_a_MOV(qpu_ra(31), *src0)); - *src0 = qpu_ra(31); + queue(block, qpu_a_MOV(qpu_ra(14), *src0)); + *src0 = qpu_ra(14); } } diff --git a/src/gallium/drivers/vc4/vc4_register_allocate.c b/src/gallium/drivers/vc4/vc4_register_allocate.c index d6bf71c9724..72e453a2809 100644 --- a/src/gallium/drivers/vc4/vc4_register_allocate.c +++ b/src/gallium/drivers/vc4/vc4_register_allocate.c @@ -145,10 +145,10 @@ vc4_alloc_reg_set(struct vc4_context *vc4) /* A/B */ for (uint32_t i = AB_INDEX; i < AB_INDEX + 64; i ++) { - /* Reserve ra31/rb31 for spilling fixup_raddr_conflict() in + /* Reserve ra14/rb14 for spilling fixup_raddr_conflict() in * vc4_qpu_emit.c */ - if (vc4_regs[i].addr == 31) + if (vc4_regs[i].addr == 14) continue; ra_class_add_reg(vc4->regs, vc4->reg_class_any[0], i); -- 2.30.2