From fd2f80aba3f04a81e42a3342c3c83c2ad5d93de5 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Sat, 24 Sep 2022 17:00:28 +0100 Subject: [PATCH] add assert to stop failfirst+sea --- src/openpower/sv/trans/svp64.py | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/src/openpower/sv/trans/svp64.py b/src/openpower/sv/trans/svp64.py index 61438284..58cf4f1b 100644 --- a/src/openpower/sv/trans/svp64.py +++ b/src/openpower/sv/trans/svp64.py @@ -1123,6 +1123,7 @@ class SVP64Asm: assert sv_mode is None sv_mode = 0b01 failfirst = decode_ffirst(encmode[3:]) + assert sea is False, "cannot use failfirst with signed-address" # predicate-result, interestingly same as fail-first elif encmode.startswith("pr="): assert sv_mode is None @@ -1146,6 +1147,14 @@ class SVP64Asm: elif encmode == 'vli': assert sv_mode == 0b01 # only allow ff mode vli = True +<<<<<<< HEAD +======= + elif encmode == 'sea': + assert sv_mode in (None, 0b00, 0b01) + assert rm['mode'] == "LDST_IDX" + sea = True + assert failfirst is False, "cannot use ffirst+signed-address" +>>>>>>> 54866195 (add asserts to ensure failfirst+sea not attempted) elif is_bc: if encmode == 'all': svp64_rm.branch.ALL = 1 -- 2.30.2