From fd78691ac554e44d78c4b3085ca174da9195c7d3 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Tue, 12 May 2020 09:23:52 +0100 Subject: [PATCH] Re: [libre-riscv-dev] little-endian only power cores and spec compliance --- e7/e347621967e66904113a6e7c96e63065bab97f | 74 +++++++++++++++++++++++ 1 file changed, 74 insertions(+) create mode 100644 e7/e347621967e66904113a6e7c96e63065bab97f diff --git a/e7/e347621967e66904113a6e7c96e63065bab97f b/e7/e347621967e66904113a6e7c96e63065bab97f new file mode 100644 index 0000000..5009bab --- /dev/null +++ b/e7/e347621967e66904113a6e7c96e63065bab97f @@ -0,0 +1,74 @@ +Return-path: +Envelope-to: publicinbox@libre-riscv.org +Delivery-date: Tue, 12 May 2020 09:24:26 +0100 +Received: from localhost ([::1] helo=libre-riscv.org) + by libre-soc.org with esmtp (Exim 4.89) + (envelope-from ) + id 1jYQDC-0007XU-4A; Tue, 12 May 2020 09:24:26 +0100 +Received: from lkcl.net ([217.147.94.29]) + by libre-soc.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) + (Exim 4.89) (envelope-from ) id 1jYQDA-0007XO-Bn + for libre-riscv-dev@lists.libre-riscv.org; Tue, 12 May 2020 09:24:24 +0100 +DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lkcl.net; + s=201607131; + h=Content-Type:To:Subject:Message-ID:Date:From:In-Reply-To:References:MIME-Version; + bh=ZLnUcTECCJFD0CvRRwqSGOV88aex2AQBcH9TlPJrfFg=; + b=QOGsWnjSUoWME58fqEjuwpmAzopZBUbXckC5iT+7XLaUnxAx4VVXMMuqqxZn99OuOKv9XTvXx8eNzjjUdNxn6p1F8UYmSKA2SSywSNAYmpjyotxUPe6a17SX+oHJ3FytLkozda2MIEFooH7cMy93uFC13lzapphYtDyaWKInYXo=; +Received: from mail-lj1-f181.google.com ([209.85.208.181]) + by lkcl.net with esmtpsa (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) + (Exim 4.84_2) (envelope-from ) id 1jYQDA-00053M-0a + for libre-riscv-dev@lists.libre-riscv.org; Tue, 12 May 2020 08:24:24 +0000 +Received: by mail-lj1-f181.google.com with SMTP id e25so12597805ljg.5 + for ; + Tue, 12 May 2020 01:24:08 -0700 (PDT) +X-Gm-Message-State: AOAM531ECIhxFNHloHvLnkT9V5ceIzPj4AuMWJgI1lWJqAr3ZvHVLIiu + 3NcoEaGJMwDZ9cmVnBwc+y7ZP7YMkOTF31gCAus= +X-Google-Smtp-Source: ABdhPJz7F3EqhUug2uCxY/wKwdMo8NEFKZGlqsAkjJj9nc095T0cZgcpz7lz1cn7GdYZqufAuIE0qT8dv1LxPlW1Ox4= +X-Received: by 2002:a2e:2a42:: with SMTP id q63mr12208089ljq.81.1589271843302; + Tue, 12 May 2020 01:24:03 -0700 (PDT) +MIME-Version: 1.0 +References: + + + + +In-Reply-To: +From: Luke Kenneth Casson Leighton +Date: Tue, 12 May 2020 09:23:52 +0100 +X-Gmail-Original-Message-ID: +Message-ID: +To: Libre-RISCV General Development +Subject: Re: [libre-riscv-dev] little-endian only power cores and spec + compliance +X-BeenThere: libre-riscv-dev@lists.libre-riscv.org +X-Mailman-Version: 2.1.23 +Precedence: list +List-Id: Libre-RISCV General Development + +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Reply-To: Libre-RISCV General Development + +Content-Type: text/plain; charset="utf-8" +Content-Transfer-Encoding: base64 +Errors-To: libre-riscv-dev-bounces@lists.libre-riscv.org +Sender: "libre-riscv-dev" + +c28sIGphY29iOiB1bmRlciB0aGUgbGlicmUtc29jIGNoYXJ0ZXIsIHRoZXJlJ3MgYSBwYXJ0IHRo +YXQgc2F5cwoibWlzdGFrZXMgYW5kIG1lcml0IGJlbG9uZyB0byB0aG9zZSB3aG8gbWFrZSBpdCIu +ICB0aGlzIG1lYW5zIHRoYXQKaXQncyB5b3VyIHJlc3BvbnNpYmlsaXR5IHRvIHdyaXRlIHRvIG9w +ZW5jb3Jlcy1oZGwtZGlzY3VzcyB0byBjb3JyZWN0CnRoZSBtaXN0YWtlbiBpbXByZXNzaW9uIGFi +b3V0IEJFL0xFLgoKY2FuIGkgcmVjb21tZW5kOgoKKiBkb2luZyBpdCB2ZXJ5IHNvb24gKHNvIHRo +YXQgdGhleSBkb24ndCBzcGVuZCBuZWVkbGVzcyBwcmVjaW91cyB0aW1lKQoqIGtlZXBpbmcgaXQg +c2hvcnQsIGFuZAoqIGFsc28gbGV0dGluZyB0aGVtIGtub3cgdGhhdCB3ZSdyZSBzdGlsbCBkaXNj +dXNzaW5nIGFuZCB3aWxsIGdldCBiYWNrCnRvIHRoZW0gd2l0aCBhIGNhcmVmdWxseS1jb25zaWRl +cmVkIGNvbnNlbnN1cyByZXNwb25zZT8KCmwuCgpfX19fX19fX19fX19fX19fX19fX19fX19fX19f +X19fX19fX19fX19fX19fX19fXwpsaWJyZS1yaXNjdi1kZXYgbWFpbGluZyBsaXN0CmxpYnJlLXJp +c2N2LWRldkBsaXN0cy5saWJyZS1yaXNjdi5vcmcKaHR0cDovL2xpc3RzLmxpYnJlLXJpc2N2Lm9y +Zy9tYWlsbWFuL2xpc3RpbmZvL2xpYnJlLXJpc2N2LWRldgo= + -- 2.30.2