From fdb8d2f0d3e456191dbac16ff98b35e7d9d50644 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Mon, 22 Apr 2019 05:36:15 +0100 Subject: [PATCH] disable write by default --- TLB/src/SetAssociativeCache.py | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/TLB/src/SetAssociativeCache.py b/TLB/src/SetAssociativeCache.py index fd2b3ff5..8cdcca12 100644 --- a/TLB/src/SetAssociativeCache.py +++ b/TLB/src/SetAssociativeCache.py @@ -228,9 +228,12 @@ class SetAssociativeCache(): ] for mem in self.mem_array: - m.d.comb += mem.cset.eq(self.cset) - m.d.comb += mem.tag.eq(self.tag) - m.d.comb += mem.data_i.eq(self.data_i) + write_port = mem.w + m.d.comb += [mem.cset.eq(self.cset), + mem.tag.eq(self.tag), + mem.data_i.eq(self.data_i), + write_port.en.eq(0), # default: disable write + ] with m.If(self.enable): with m.Switch(self.command): -- 2.30.2