From fdb8fa7e0b96b830cfd2365cff0c76293464cefe Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Mon, 13 Jul 2020 14:17:34 +0100 Subject: [PATCH] enable extswsli tests, fix spec-patching --- libreriscv | 2 +- src/soc/decoder/isa/fixedshift.patch | 12 ++++++------ src/soc/fu/shift_rot/test/test_pipe_caller.py | 2 +- 3 files changed, 8 insertions(+), 8 deletions(-) diff --git a/libreriscv b/libreriscv index cde4b651..a0ed154f 160000 --- a/libreriscv +++ b/libreriscv @@ -1 +1 @@ -Subproject commit cde4b6519f6f23520899e1c1bba71548746015ec +Subproject commit a0ed154f4604d296ffc77e0489c4c0f2e23c94dc diff --git a/src/soc/decoder/isa/fixedshift.patch b/src/soc/decoder/isa/fixedshift.patch index 442f9f91..add7103f 100644 --- a/src/soc/decoder/isa/fixedshift.patch +++ b/src/soc/decoder/isa/fixedshift.patch @@ -56,7 +56,7 @@ @inject() def op_rldicl(self, RS): -- n = concat(sh[5], sh[0:5]) +- n = sh + n = sh r = ROTL64(RS, n) b = concat(mb[5], mb[0:5]) @@ -65,7 +65,7 @@ @inject() def op_rldicl_(self, RS): -- n = concat(sh[5], sh[0:5]) +- n = sh + n = sh r = ROTL64(RS, n) b = concat(mb[5], mb[0:5]) @@ -74,7 +74,7 @@ @inject() def op_rldicr(self, RS): -- n = concat(sh[5], sh[0:5]) +- n = sh + n = sh r = ROTL64(RS, n) e = concat(me[5], me[0:5]) @@ -83,7 +83,7 @@ @inject() def op_rldicr_(self, RS): -- n = concat(sh[5], sh[0:5]) +- n = sh + n = sh r = ROTL64(RS, n) e = concat(me[5], me[0:5]) @@ -92,7 +92,7 @@ @inject() def op_rldic(self, RS): -- n = concat(sh[5], sh[0:5]) +- n = sh + n = sh r = ROTL64(RS, n) b = concat(mb[5], mb[0:5]) @@ -101,7 +101,7 @@ @inject() def op_rldic_(self, RS): -- n = concat(sh[5], sh[0:5]) +- n = sh + n = sh r = ROTL64(RS, n) b = concat(mb[5], mb[0:5]) diff --git a/src/soc/fu/shift_rot/test/test_pipe_caller.py b/src/soc/fu/shift_rot/test/test_pipe_caller.py index 5a56f017..f19ba4d3 100644 --- a/src/soc/fu/shift_rot/test/test_pipe_caller.py +++ b/src/soc/fu/shift_rot/test/test_pipe_caller.py @@ -148,7 +148,7 @@ class ShiftRotTestCase(FHDLTestCase): initial_regs[1] = 0x5678 self.run_tst_program(Program(lst, bigendian), initial_regs) - def tst_extswsli(self): + def test_extswsli(self): for i in range(40): sh = random.randint(0, 63) lst = [f"extswsli 3, 1, {sh}"] -- 2.30.2