From fdd622ab3cf867ccf315080935f5103989b791a7 Mon Sep 17 00:00:00 2001
From: "colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0"
 <colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0@web>
Date: Wed, 29 Jul 2020 19:13:31 +0100
Subject: [PATCH]

---
 cole.mdwn | 12 ++++++------
 1 file changed, 6 insertions(+), 6 deletions(-)

diff --git a/cole.mdwn b/cole.mdwn
index 537db130e..1eceb7392 100644
--- a/cole.mdwn
+++ b/cole.mdwn
@@ -30,14 +30,14 @@ move things along from one stage to the next
 
 ## Completed but not yet submitted
 
-- Convert hand-drawn 180nm Test ASIC's Memory Layout diagram into editable SVG <https://bugs.libre-soc.org/show_bug.cgi?id=401>
+- <https://bugs.libre-soc.org/show_bug.cgi?id=401> Convert 180nm Test ASIC Mem Layout diagram to SVG 
 
 - Coriolis2 documentation and setup scripts
-  <https://bugs.libre-soc.org/show_bug.cgi?id=291>
-  <https://bugs.libre-soc.org/show_bug.cgi?id=178>
-  <https://bugs.libre-soc.org/show_bug.cgi?id=320>
-  <https://bugs.libre-soc.org/show_bug.cgi?id=404>
-  <https://bugs.libre-soc.org/show_bug.cgi?id=138> 
+  - <https://bugs.libre-soc.org/show_bug.cgi?id=291>
+  - <https://bugs.libre-soc.org/show_bug.cgi?id=178>
+  - <https://bugs.libre-soc.org/show_bug.cgi?id=320>
+  - <https://bugs.libre-soc.org/show_bug.cgi?id=404>
+  - <https://bugs.libre-soc.org/show_bug.cgi?id=138> 
 
 ## Submitted for NLNet RFP
 
-- 
2.30.2