From febdb24fa80f6cffc8894e54f7145de5b22e9422 Mon Sep 17 00:00:00 2001 From: Cesar Strauss Date: Sun, 28 Mar 2021 13:57:36 -0300 Subject: [PATCH] Prepare to advance src/dst step after getting the predicate mask --- src/soc/simple/issuer.py | 65 ++++++++++++++++++++-------------------- 1 file changed, 32 insertions(+), 33 deletions(-) diff --git a/src/soc/simple/issuer.py b/src/soc/simple/issuer.py index 7b55939d..8a7abd2b 100644 --- a/src/soc/simple/issuer.py +++ b/src/soc/simple/issuer.py @@ -578,45 +578,44 @@ class TestIssuerInternal(Elaboratable): with m.State("MASK_WAIT"): comb += pred_mask_ready_i.eq(1) # ready to receive the masks with m.If(pred_mask_valid_o): # predication masks are ready - m.next = "INSN_EXECUTE" - - # handshake with execution FSM, move to "wait" once acknowledged - with m.State("INSN_EXECUTE"): - # with m.If(is_svp64_mode): - # TODO advance src/dst step to "skip" over predicated-out - # from self.srcmask and self.dstmask - # https://bugs.libre-soc.org/show_bug.cgi?id=617#c3 - # but still without exceeding VL in either case - # IMPORTANT: when changing src/dest step, have to - # jump to m.next = "DECODE_SV" to deal with the change in - # SVSTATE - - with m.If(is_svp64_mode): + # with m.If(is_svp64_mode): + # TODO advance src/dst step to "skip" over predicated-out + # from self.srcmask and self.dstmask + # https://bugs.libre-soc.org/show_bug.cgi?id=617#c3 + # but still without exceeding VL in either case + # IMPORTANT: when changing src/dest step, have to + # jump to m.next = "DECODE_SV" to deal with the change in + # SVSTATE + + with m.If(is_svp64_mode): + if self.svp64_en: + pred_src_zero = pdecode2.rm_dec.pred_sz + pred_dst_zero = pdecode2.rm_dec.pred_dz - if self.svp64_en: - pred_src_zero = pdecode2.rm_dec.pred_sz - pred_dst_zero = pdecode2.rm_dec.pred_dz + """ + TODO: actually, can use + PriorityEncoder(self.srcmask | (1<