From ff1fe6fad9687cebddcdf82076c55d7025df7566 Mon Sep 17 00:00:00 2001 From: Nick Clifton Date: Tue, 15 Dec 2015 16:21:29 +0000 Subject: [PATCH] Remove refernces to a non-existent silicon errata. * doc/c-msp430.texi (MSP430 Options): Remove references to a non-existent silicon errata. * config/tc-msp430.c: Likewise. --- gas/ChangeLog | 6 ++++++ gas/config/tc-msp430.c | 13 +++---------- gas/doc/c-msp430.texi | 4 ---- 3 files changed, 9 insertions(+), 14 deletions(-) diff --git a/gas/ChangeLog b/gas/ChangeLog index 2683acbd59a..a37651a3184 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,9 @@ +2015-12-15 Nick Clifton + + * doc/c-msp430.texi (MSP430 Options): Remove references to a + non-existant silicon errata. + * config/tc-msp430.c: Likewise. + 2015-12-14 Matthew Wahab * config/tc-aarch64.c (parse_neon_type_for_operand): Adjust to diff --git a/gas/config/tc-msp430.c b/gas/config/tc-msp430.c index ef7c5ee2ec2..a7451a3e9e4 100644 --- a/gas/config/tc-msp430.c +++ b/gas/config/tc-msp430.c @@ -694,8 +694,6 @@ static unsigned int silicon_errata_warn = 0; #define SILICON_ERRATA_CPU12 (1 << 3) #define SILICON_ERRATA_CPU13 (1 << 4) #define SILICON_ERRATA_CPU19 (1 << 5) -#define SILICON_ERRATA_CPU42 (1 << 6) -#define SILICON_ERRATA_CPU42_PLUS (1 << 7) static void msp430_set_arch (int option) @@ -1338,8 +1336,6 @@ md_parse_option (int c, char * arg) { STRING_COMMA_LEN ("cpu12"), SILICON_ERRATA_CPU12 }, { STRING_COMMA_LEN ("cpu13"), SILICON_ERRATA_CPU13 }, { STRING_COMMA_LEN ("cpu19"), SILICON_ERRATA_CPU19 }, - { STRING_COMMA_LEN ("cpu42"), SILICON_ERRATA_CPU42 }, - { STRING_COMMA_LEN ("cpu42+"), SILICON_ERRATA_CPU42_PLUS }, }; do @@ -1579,7 +1575,7 @@ md_show_usage (FILE * stream) fprintf (stream, _(" -msilicon-errata=[,...] - enable fixups for silicon errata\n" " -msilicon-errata-warn=[,...] - warn when a fixup might be needed\n" - " supported errata names: cpu4, cpu8, cpu11, cpu12, cpu13, cpu19, cpu42, cpu42+\n")); + " supported errata names: cpu4, cpu8, cpu11, cpu12, cpu13, cpu19\n")); fprintf (stream, _(" -mQ - enable relaxation at assembly time. DANGEROUS!\n" " -mP - enable polymorph instructions\n")); @@ -2605,9 +2601,7 @@ msp430_operands (struct msp430_opcode_s * opcode, char * line) switch (check_for_nop & - check_for_nop) { case NOP_CHECK_INTERRUPT: - if (warn_interrupt_nops - || silicon_errata_warn & SILICON_ERRATA_CPU42 - || silicon_errata_warn & SILICON_ERRATA_CPU42_PLUS) + if (warn_interrupt_nops) { if (gen_interrupt_nops) as_warn (_("NOP inserted between two instructions that change interrupt state")); @@ -2615,8 +2609,7 @@ msp430_operands (struct msp430_opcode_s * opcode, char * line) as_warn (_("a NOP might be needed here because of successive changes in interrupt state")); } - if (gen_interrupt_nops - || silicon_errata_fix & SILICON_ERRATA_CPU42_PLUS) + if (gen_interrupt_nops) /* Emit a NOP between interrupt enable/disable. See 1.3.4.1 of the MSP430x5xx User Guide. */ doit = TRUE; diff --git a/gas/doc/c-msp430.texi b/gas/doc/c-msp430.texi index 5b72c769892..ff5fef49637 100644 --- a/gas/doc/c-msp430.texi +++ b/gas/doc/c-msp430.texi @@ -57,10 +57,6 @@ Do not use the @code{PC} in a @code{CMP} or @code{BIT} instruction. Do not use an arithmetic instruction to modify the @code{SR}. @item cpu19 Insert @code{NOP} after @code{CPUOFF}. -@item cpu42 -Warn where a @code{NOP} ought to be present after enabling interrupts. -@item cpu42+ -Add @code{NOP} after enabling interrupts. @end table @item -msilicon-errata-warn=@var{name}[,@var{name}@dots{}] -- 2.30.2