From ff4d33b72579f423f53636723689736c5fad6883 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Sat, 29 May 2021 18:19:15 +0100 Subject: [PATCH] comments --- src/openpower/decoder/power_svp64_rm.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/openpower/decoder/power_svp64_rm.py b/src/openpower/decoder/power_svp64_rm.py index 5d5a859d..90000f07 100644 --- a/src/openpower/decoder/power_svp64_rm.py +++ b/src/openpower/decoder/power_svp64_rm.py @@ -93,8 +93,8 @@ class SVP64RMModeDecode(Elaboratable): self.saturate = Signal(SVP64sat) self.RC1 = Signal() - self.cr_sel = Signal(2) - self.inv = Signal(1) + self.cr_sel = Signal(2) # bit of CR to test (index 0-3) + self.inv = Signal(1) # and whether it's inverted (like branch BO) self.map_evm = Signal(1) self.map_crm = Signal(1) self.ldstmode = Signal(SVP64LDSTmode) # LD/ST Mode (strided type) -- 2.30.2