From ff6ee39c19adc59225d1f0664695c669cd7e5a94 Mon Sep 17 00:00:00 2001 From: Matt Turner Date: Fri, 24 Apr 2015 11:28:06 -0700 Subject: [PATCH] i965: Enable ARB_gpu_shader5 on Gen8+. Reviewed-by: Kenneth Graunke --- docs/relnotes/10.6.0.html | 1 + src/mesa/drivers/dri/i965/intel_extensions.c | 8 ++------ 2 files changed, 3 insertions(+), 6 deletions(-) diff --git a/docs/relnotes/10.6.0.html b/docs/relnotes/10.6.0.html index 48f76f961bc..dbf1229a80e 100644 --- a/docs/relnotes/10.6.0.html +++ b/docs/relnotes/10.6.0.html @@ -55,6 +55,7 @@ Note: some of the new features are only available with certain drivers.
  • GL_ARB_clip_control on i965
  • GL_ARB_program_interface_query (all drivers)
  • GL_ARB_texture_stencil8 on nv50, nvc0, r600, radeonsi, softpipe
    • +
  • GL_ARB_gpu_shader5 on i965/gen8+

    • Bug fixes

    diff --git a/src/mesa/drivers/dri/i965/intel_extensions.c b/src/mesa/drivers/dri/i965/intel_extensions.c index 48064e1eea4..c28c1716222 100644 --- a/src/mesa/drivers/dri/i965/intel_extensions.c +++ b/src/mesa/drivers/dri/i965/intel_extensions.c @@ -303,6 +303,8 @@ intelInitExtensions(struct gl_context *ctx) if (brw->gen >= 7) { ctx->Extensions.ARB_conservative_depth = true; + ctx->Extensions.ARB_gpu_shader5 = true; + ctx->Extensions.ARB_shader_atomic_counters = true; ctx->Extensions.ARB_texture_view = true; if (can_do_pipelined_register_writes(brw)) { ctx->Extensions.ARB_transform_feedback2 = true; @@ -342,12 +344,6 @@ intelInitExtensions(struct gl_context *ctx) ctx->Extensions.ANGLE_texture_compression_dxt = true; - if (brw->gen >= 7) - ctx->Extensions.ARB_shader_atomic_counters = true; - - if (brw->gen == 7) - ctx->Extensions.ARB_gpu_shader5 = true; - ctx->Extensions.OES_texture_float = true; ctx->Extensions.OES_texture_float_linear = true; ctx->Extensions.OES_texture_half_float = true; -- 2.30.2