From ff779f98ef7328c3a3dc537e274186b756da85d8 Mon Sep 17 00:00:00 2001 From: Bob Wilson Date: Thu, 27 Mar 2008 22:44:47 +0000 Subject: [PATCH] xtensa.c (gen_float_relational): Handle unordered comparisons. * config/xtensa/xtensa.c (gen_float_relational): Handle unordered comparisons. * config/xtensa/xtensa.md (any_cond): Add unordered comparisons. (any_scc_sf): Add uneq, unlt, unle and unordered operators. (scc_sf): New. (s_sf): Use new scc_sf attribute for opcode names. From-SVN: r133659 --- gcc/ChangeLog | 9 +++++++++ gcc/config/xtensa/xtensa.c | 10 ++++++++++ gcc/config/xtensa/xtensa.md | 11 ++++++++--- 3 files changed, 27 insertions(+), 3 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index d611a6a73c3..f55e8a8519a 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2008-03-27 Bob Wilson + + * config/xtensa/xtensa.c (gen_float_relational): Handle unordered + comparisons. + * config/xtensa/xtensa.md (any_cond): Add unordered comparisons. + (any_scc_sf): Add uneq, unlt, unle and unordered operators. + (scc_sf): New. + (s_sf): Use new scc_sf attribute for opcode names. + 2008-03-27 Tom Tromey * doc/sourcebuild.texi, doc/install.texi, configure, aclocal.m4, diff --git a/gcc/config/xtensa/xtensa.c b/gcc/config/xtensa/xtensa.c index 7340ba766b1..d61625d83b5 100644 --- a/gcc/config/xtensa/xtensa.c +++ b/gcc/config/xtensa/xtensa.c @@ -652,6 +652,16 @@ gen_float_relational (enum rtx_code test_code, /* relational test (EQ, etc) */ case GT: reverse_regs = 1; invert = 0; gen_fn = gen_slt_sf; break; case LT: reverse_regs = 0; invert = 0; gen_fn = gen_slt_sf; break; case GE: reverse_regs = 1; invert = 0; gen_fn = gen_sle_sf; break; + case UNEQ: reverse_regs = 0; invert = 0; gen_fn = gen_suneq_sf; break; + case LTGT: reverse_regs = 0; invert = 1; gen_fn = gen_suneq_sf; break; + case UNLE: reverse_regs = 0; invert = 0; gen_fn = gen_sunle_sf; break; + case UNGT: reverse_regs = 1; invert = 0; gen_fn = gen_sunlt_sf; break; + case UNLT: reverse_regs = 0; invert = 0; gen_fn = gen_sunlt_sf; break; + case UNGE: reverse_regs = 1; invert = 0; gen_fn = gen_sunle_sf; break; + case UNORDERED: + reverse_regs = 0; invert = 0; gen_fn = gen_sunordered_sf; break; + case ORDERED: + reverse_regs = 0; invert = 1; gen_fn = gen_sunordered_sf; break; default: fatal_insn ("bad test", gen_rtx_fmt_ee (test_code, VOIDmode, cmp0, cmp1)); reverse_regs = 0; invert = 0; gen_fn = 0; /* avoid compiler warnings */ diff --git a/gcc/config/xtensa/xtensa.md b/gcc/config/xtensa/xtensa.md index 541eba30732..7d85956bfe4 100644 --- a/gcc/config/xtensa/xtensa.md +++ b/gcc/config/xtensa/xtensa.md @@ -59,13 +59,18 @@ ;; This code iterator allows all branch instructions to be generated from ;; a single define_expand template. -(define_code_iterator any_cond [eq ne gt ge lt le gtu geu ltu leu]) +(define_code_iterator any_cond [eq ne gt ge lt le gtu geu ltu leu + uneq ltgt ungt unge unlt unle + unordered ordered]) ;; This code iterator is for setting a register from a comparison. (define_code_iterator any_scc [eq ne gt ge lt le]) ;; This code iterator is for floating-point comparisons. -(define_code_iterator any_scc_sf [eq lt le]) +(define_code_iterator any_scc_sf [eq lt le uneq unlt unle unordered]) +(define_code_attr scc_sf [(eq "oeq") (lt "olt") (le "ole") + (uneq "ueq") (unlt "ult") (unle "ule") + (unordered "un")]) ;; This iterator and attribute allow to combine most atomic operations. (define_code_iterator ATOMIC [and ior xor plus minus mult]) @@ -1415,7 +1420,7 @@ (any_scc_sf:CC (match_operand:SF 1 "register_operand" "f") (match_operand:SF 2 "register_operand" "f")))] "TARGET_HARD_FLOAT" - "o.s\t%0, %1, %2" + ".s\t%0, %1, %2" [(set_attr "type" "farith") (set_attr "mode" "BL") (set_attr "length" "3")]) -- 2.30.2