From ffecaedf697e7ab072f9a13cc2613f59f374ca44 Mon Sep 17 00:00:00 2001 From: Jonathan Marek Date: Fri, 19 Jun 2020 13:26:50 -0400 Subject: [PATCH] freedreno/a6xx: VSC "STRM_ARRAY_PITCH" is "STRM_LIMIT" This was being set wrong in both freedreno and turnip, and setting it correctly should avoid hangs when there is overflow. Signed-off-by: Jonathan Marek Part-of: --- src/freedreno/registers/a6xx.xml | 6 ++++-- src/freedreno/vulkan/tu_cmd_buffer.c | 8 ++++---- src/gallium/drivers/freedreno/a6xx/fd6_gmem.c | 8 ++++---- 3 files changed, 12 insertions(+), 10 deletions(-) diff --git a/src/freedreno/registers/a6xx.xml b/src/freedreno/registers/a6xx.xml index 382dc7e1fb1..de4580ae984 100644 --- a/src/freedreno/registers/a6xx.xml +++ b/src/freedreno/registers/a6xx.xml @@ -1822,17 +1822,19 @@ to upconvert to 32b float internally? Compared to a5xx and earlier, we just program the address of the first stream and hw adds (pipe_num * VSC_*_STRM_PITCH) + + LIMIT is set to PITCH - 64, to make room for a bit of overflow --> - + - + diff --git a/src/freedreno/vulkan/tu_cmd_buffer.c b/src/freedreno/vulkan/tu_cmd_buffer.c index 6b196e70868..07d18233334 100644 --- a/src/freedreno/vulkan/tu_cmd_buffer.c +++ b/src/freedreno/vulkan/tu_cmd_buffer.c @@ -1055,12 +1055,12 @@ update_vsc_pipe(struct tu_cmd_buffer *cmd, struct tu_cs *cs) tu_cs_emit_regs(cs, A6XX_VSC_PRIM_STRM_ADDRESS(.bo = &cmd->vsc_prim_strm), A6XX_VSC_PRIM_STRM_PITCH(cmd->vsc_prim_strm_pitch), - A6XX_VSC_PRIM_STRM_ARRAY_PITCH(cmd->vsc_prim_strm.size)); + A6XX_VSC_PRIM_STRM_LIMIT(cmd->vsc_prim_strm_pitch - 64)); tu_cs_emit_regs(cs, A6XX_VSC_DRAW_STRM_ADDRESS(.bo = &cmd->vsc_draw_strm), A6XX_VSC_DRAW_STRM_PITCH(cmd->vsc_draw_strm_pitch), - A6XX_VSC_DRAW_STRM_ARRAY_PITCH(cmd->vsc_draw_strm.size)); + A6XX_VSC_DRAW_STRM_LIMIT(cmd->vsc_draw_strm_pitch - 64)); } static void @@ -1082,7 +1082,7 @@ emit_vsc_overflow_test(struct tu_cmd_buffer *cmd, struct tu_cs *cs) CP_COND_WRITE5_0_WRITE_MEMORY); tu_cs_emit(cs, CP_COND_WRITE5_1_POLL_ADDR_LO(REG_A6XX_VSC_DRAW_STRM_SIZE_REG(i))); tu_cs_emit(cs, CP_COND_WRITE5_2_POLL_ADDR_HI(0)); - tu_cs_emit(cs, CP_COND_WRITE5_3_REF(cmd->vsc_draw_strm_pitch)); + tu_cs_emit(cs, CP_COND_WRITE5_3_REF(cmd->vsc_draw_strm_pitch - 64)); tu_cs_emit(cs, CP_COND_WRITE5_4_MASK(~0)); tu_cs_emit_qw(cs, cmd->scratch_bo.iova + ctrl_offset(vsc_scratch)); tu_cs_emit(cs, CP_COND_WRITE5_7_WRITE_DATA(1 + cmd->vsc_draw_strm_pitch)); @@ -1092,7 +1092,7 @@ emit_vsc_overflow_test(struct tu_cmd_buffer *cmd, struct tu_cs *cs) CP_COND_WRITE5_0_WRITE_MEMORY); tu_cs_emit(cs, CP_COND_WRITE5_1_POLL_ADDR_LO(REG_A6XX_VSC_PRIM_STRM_SIZE_REG(i))); tu_cs_emit(cs, CP_COND_WRITE5_2_POLL_ADDR_HI(0)); - tu_cs_emit(cs, CP_COND_WRITE5_3_REF(cmd->vsc_prim_strm_pitch)); + tu_cs_emit(cs, CP_COND_WRITE5_3_REF(cmd->vsc_prim_strm_pitch - 64)); tu_cs_emit(cs, CP_COND_WRITE5_4_MASK(~0)); tu_cs_emit_qw(cs, cmd->scratch_bo.iova + ctrl_offset(vsc_scratch)); tu_cs_emit(cs, CP_COND_WRITE5_7_WRITE_DATA(3 + cmd->vsc_prim_strm_pitch)); diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c index 829a4d57c5d..7879508b543 100644 --- a/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c +++ b/src/gallium/drivers/freedreno/a6xx/fd6_gmem.c @@ -381,12 +381,12 @@ update_vsc_pipe(struct fd_batch *batch) OUT_REG(ring, A6XX_VSC_PRIM_STRM_ADDRESS(.bo = fd6_ctx->vsc_prim_strm), A6XX_VSC_PRIM_STRM_PITCH(.dword = fd6_ctx->vsc_prim_strm_pitch), - A6XX_VSC_PRIM_STRM_ARRAY_PITCH(.dword = fd_bo_size(fd6_ctx->vsc_prim_strm))); + A6XX_VSC_PRIM_STRM_LIMIT(.dword = fd6_ctx->vsc_prim_strm_pitch - 64)); OUT_REG(ring, A6XX_VSC_DRAW_STRM_ADDRESS(.bo = fd6_ctx->vsc_draw_strm), A6XX_VSC_DRAW_STRM_PITCH(.dword = fd6_ctx->vsc_draw_strm_pitch), - A6XX_VSC_DRAW_STRM_ARRAY_PITCH(.dword = fd_bo_size(fd6_ctx->vsc_draw_strm))); + A6XX_VSC_DRAW_STRM_LIMIT(.dword = fd6_ctx->vsc_draw_strm_pitch - 64)); } /* TODO we probably have more than 8 scratch regs.. although the first @@ -431,7 +431,7 @@ emit_vsc_overflow_test(struct fd_batch *batch) CP_COND_WRITE5_0_WRITE_MEMORY); OUT_RING(ring, CP_COND_WRITE5_1_POLL_ADDR_LO(REG_A6XX_VSC_DRAW_STRM_SIZE_REG(i))); OUT_RING(ring, CP_COND_WRITE5_2_POLL_ADDR_HI(0)); - OUT_RING(ring, CP_COND_WRITE5_3_REF(fd6_ctx->vsc_draw_strm_pitch)); + OUT_RING(ring, CP_COND_WRITE5_3_REF(fd6_ctx->vsc_draw_strm_pitch - 64)); OUT_RING(ring, CP_COND_WRITE5_4_MASK(~0)); OUT_RELOC(ring, control_ptr(fd6_ctx, vsc_scratch)); /* WRITE_ADDR_LO/HI */ OUT_RING(ring, CP_COND_WRITE5_7_WRITE_DATA(1 + fd6_ctx->vsc_draw_strm_pitch)); @@ -441,7 +441,7 @@ emit_vsc_overflow_test(struct fd_batch *batch) CP_COND_WRITE5_0_WRITE_MEMORY); OUT_RING(ring, CP_COND_WRITE5_1_POLL_ADDR_LO(REG_A6XX_VSC_PRIM_STRM_SIZE_REG(i))); OUT_RING(ring, CP_COND_WRITE5_2_POLL_ADDR_HI(0)); - OUT_RING(ring, CP_COND_WRITE5_3_REF(fd6_ctx->vsc_prim_strm_pitch)); + OUT_RING(ring, CP_COND_WRITE5_3_REF(fd6_ctx->vsc_prim_strm_pitch - 64)); OUT_RING(ring, CP_COND_WRITE5_4_MASK(~0)); OUT_RELOC(ring, control_ptr(fd6_ctx, vsc_scratch)); /* WRITE_ADDR_LO/HI */ OUT_RING(ring, CP_COND_WRITE5_7_WRITE_DATA(3 + fd6_ctx->vsc_prim_strm_pitch)); -- 2.30.2