From 1445a381a10431f4ea7ae30cccd8c93b473a29d2 Mon Sep 17 00:00:00 2001 From: "Wesley W. Terpstra" Date: Mon, 5 Mar 2018 15:45:01 -0800 Subject: [PATCH] platforms: fixup to new package names --- src/main/scala/everywhere/e300artydevkit/Config.scala | 2 +- src/main/scala/everywhere/e300artydevkit/Platform.scala | 2 +- src/main/scala/everywhere/e300artydevkit/System.scala | 6 +++--- src/main/scala/unleashed/u500vc707devkit/Config.scala | 2 +- src/main/scala/unleashed/u500vc707devkit/System.scala | 6 +++--- 5 files changed, 9 insertions(+), 9 deletions(-) diff --git a/src/main/scala/everywhere/e300artydevkit/Config.scala b/src/main/scala/everywhere/e300artydevkit/Config.scala index a85d1e6..f8058e9 100644 --- a/src/main/scala/everywhere/e300artydevkit/Config.scala +++ b/src/main/scala/everywhere/e300artydevkit/Config.scala @@ -2,7 +2,7 @@ package sifive.freedom.everywhere.e300artydevkit import freechips.rocketchip.config._ -import freechips.rocketchip.coreplex._ +import freechips.rocketchip.subsystem._ import freechips.rocketchip.devices.debug._ import freechips.rocketchip.devices.tilelink._ import freechips.rocketchip.diplomacy.{DTSModel, DTSTimebase} diff --git a/src/main/scala/everywhere/e300artydevkit/Platform.scala b/src/main/scala/everywhere/e300artydevkit/Platform.scala index be1789a..4e056eb 100644 --- a/src/main/scala/everywhere/e300artydevkit/Platform.scala +++ b/src/main/scala/everywhere/e300artydevkit/Platform.scala @@ -4,7 +4,7 @@ package sifive.freedom.everywhere.e300artydevkit import Chisel._ import freechips.rocketchip.config._ -import freechips.rocketchip.coreplex._ +import freechips.rocketchip.subsystem._ import freechips.rocketchip.devices.debug._ import freechips.rocketchip.devices.tilelink._ import freechips.rocketchip.diplomacy._ diff --git a/src/main/scala/everywhere/e300artydevkit/System.scala b/src/main/scala/everywhere/e300artydevkit/System.scala index c3fbd96..93d9352 100644 --- a/src/main/scala/everywhere/e300artydevkit/System.scala +++ b/src/main/scala/everywhere/e300artydevkit/System.scala @@ -4,7 +4,7 @@ package sifive.freedom.everywhere.e300artydevkit import Chisel._ import freechips.rocketchip.config._ -import freechips.rocketchip.coreplex._ +import freechips.rocketchip.subsystem._ import freechips.rocketchip.devices.debug._ import freechips.rocketchip.devices.tilelink._ import freechips.rocketchip.diplomacy._ @@ -21,7 +21,7 @@ import sifive.blocks.devices.i2c._ // E300ArtyDevKitSystem //------------------------------------------------------------------------- -class E300ArtyDevKitSystem(implicit p: Parameters) extends RocketCoreplex +class E300ArtyDevKitSystem(implicit p: Parameters) extends RocketSubsystem with HasPeripheryMaskROMSlave with HasPeripheryDebug with HasPeripheryMockAON @@ -35,7 +35,7 @@ class E300ArtyDevKitSystem(implicit p: Parameters) extends RocketCoreplex } class E300ArtyDevKitSystemModule[+L <: E300ArtyDevKitSystem](_outer: L) - extends RocketCoreplexModule(_outer) + extends RocketSubsystemModuleImp(_outer) with HasPeripheryDebugModuleImp with HasPeripheryUARTModuleImp with HasPeripherySPIModuleImp diff --git a/src/main/scala/unleashed/u500vc707devkit/Config.scala b/src/main/scala/unleashed/u500vc707devkit/Config.scala index 4aa7362..7a02dac 100644 --- a/src/main/scala/unleashed/u500vc707devkit/Config.scala +++ b/src/main/scala/unleashed/u500vc707devkit/Config.scala @@ -2,7 +2,7 @@ package sifive.freedom.unleashed.u500vc707devkit import freechips.rocketchip.config._ -import freechips.rocketchip.coreplex._ +import freechips.rocketchip.subsystem._ import freechips.rocketchip.devices.debug._ import freechips.rocketchip.devices.tilelink._ import freechips.rocketchip.diplomacy._ diff --git a/src/main/scala/unleashed/u500vc707devkit/System.scala b/src/main/scala/unleashed/u500vc707devkit/System.scala index 1a02d0e..90ffdf0 100644 --- a/src/main/scala/unleashed/u500vc707devkit/System.scala +++ b/src/main/scala/unleashed/u500vc707devkit/System.scala @@ -4,7 +4,7 @@ package sifive.freedom.unleashed.u500vc707devkit import Chisel._ import freechips.rocketchip.config._ -import freechips.rocketchip.coreplex._ +import freechips.rocketchip.subsystem._ import freechips.rocketchip.devices.debug._ import freechips.rocketchip.devices.tilelink._ import freechips.rocketchip.diplomacy._ @@ -21,7 +21,7 @@ import sifive.fpgashells.devices.xilinx.xilinxvc707pciex1._ // U500VC707DevKitSystem //------------------------------------------------------------------------- -class U500VC707DevKitSystem(implicit p: Parameters) extends RocketCoreplex +class U500VC707DevKitSystem(implicit p: Parameters) extends RocketSubsystem with HasPeripheryMaskROMSlave with HasPeripheryDebug with HasSystemErrorSlave @@ -34,7 +34,7 @@ class U500VC707DevKitSystem(implicit p: Parameters) extends RocketCoreplex } class U500VC707DevKitSystemModule[+L <: U500VC707DevKitSystem](_outer: L) - extends RocketCoreplexModule(_outer) + extends RocketSubsystemModuleImp(_outer) with HasRTCModuleImp with HasPeripheryDebugModuleImp with HasPeripheryUARTModuleImp -- 2.30.2