From 0e3bf6b87c375276dd07e5c324207857ce7aadd6 Mon Sep 17 00:00:00 2001
From: Dmitry Selyutin <ghostmansd@gmail.com>
Date: Thu, 1 Jun 2023 00:05:08 +0300
Subject: [PATCH] power_insn: disassemble RA0 and RT0 correctly

---
 src/openpower/decoder/power_insn.py | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/src/openpower/decoder/power_insn.py b/src/openpower/decoder/power_insn.py
index d480a3f3..ca540386 100644
--- a/src/openpower/decoder/power_insn.py
+++ b/src/openpower/decoder/power_insn.py
@@ -1286,6 +1286,9 @@ class ExtendableOperand(DynamicOperand):
             style=Style.NORMAL, prefix="", indent=""):
         (vector, value, span) = self.sv_spec(insn=insn)
 
+        if (self.extra_reg.or_zero and (value == 0)):
+            prefix = ""
+
         if style >= Style.VERBOSE:
             mode = "vector" if vector else "scalar"
             yield f"{indent}{self.name} ({mode})"
-- 
2.30.2