From a58571d0fe8971cb7d3a619a31b2c21be6d75bac Mon Sep 17 00:00:00 2001 From: Stefan Riesenberger Date: Fri, 9 Apr 2021 15:44:08 +0200 Subject: [PATCH] sf2: fix name of AND modules --- techlibs/sf2/cells_sim.v | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/techlibs/sf2/cells_sim.v b/techlibs/sf2/cells_sim.v index eff57a655..4b57bad7b 100644 --- a/techlibs/sf2/cells_sim.v +++ b/techlibs/sf2/cells_sim.v @@ -1,20 +1,20 @@ // https://coredocs.s3.amazonaws.com/Libero/12_0_0/Tool/sf2_mlg.pdf -module ADD2 ( +module AND2 ( input A, B, output Y ); assign Y = A & B; endmodule -module ADD3 ( +module AND3 ( input A, B, C, output Y ); assign Y = A & B & C; endmodule -module ADD4 ( +module AND4 ( input A, B, C, D, output Y ); -- 2.30.2