From be7fe114c7f5da264c831f12ab6f322441feed6e Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Sun, 14 Jan 2024 19:24:22 +0000 Subject: [PATCH] fix ISACaller BA/BB vector read --- src/openpower/decoder/isa/caller.py | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/src/openpower/decoder/isa/caller.py b/src/openpower/decoder/isa/caller.py index 05410975..bdc3e6c9 100644 --- a/src/openpower/decoder/isa/caller.py +++ b/src/openpower/decoder/isa/caller.py @@ -555,8 +555,9 @@ def get_cr_in(dec2, name): sv_override = yield dec2.dec_cr_in.sv_override # get the IN1/2/3 from the decoder (includes SVP64 remap and isvec) in1 = yield dec2.e.read_cr1.data + in2 = yield dec2.e.read_cr2.data cr_isvec = yield dec2.cr_in_isvec - log("get_cr_in", in_sel, CROutSel.CR0.value, in1, cr_isvec) + log("get_cr_in", name, in_sel, CROutSel.CR0.value, in1, in2, cr_isvec) log(" sv_cr_in", sv_cr_in) log(" cr_bf", in_bitfield) log(" spec", spec) @@ -565,9 +566,12 @@ def get_cr_in(dec2, name): if name == 'BI': if in_sel == CRInSel.BI.value: return in1, cr_isvec - if name in ['BA', 'BB']: + if name == 'BA': if in_sel == CRInSel.BA_BB.value: return in1, cr_isvec + if name == 'BB': + if in_sel == CRInSel.BA_BB.value: + return in2, cr_isvec if name == 'BFA': if in_sel == CRInSel.BFA.value: return in1, cr_isvec -- 2.30.2