From 3491f34d9ed97ac5980ff4a450367914b6985ff1 Mon Sep 17 00:00:00 2001 From: Fabrice Fontaine Date: Sun, 19 Sep 2021 21:37:11 +0200 Subject: [PATCH 01/16] package/python-pip: security bump to version 21.2.4 - SECURITY: Stop splitting on unicode separators in git references, which could be maliciously used to install a different revision on the repository. (#9827) - Update hash of LICENSE.txt (update in year) - Update indentation in hash file (two spaces) https://pip.pypa.io/en/stable/news/#v21-2-4 Signed-off-by: Fabrice Fontaine Signed-off-by: Arnout Vandecappelle (Essensium/Mind) --- package/python-pip/python-pip.hash | 6 +++--- package/python-pip/python-pip.mk | 4 ++-- package/python3-pip/python3-pip.mk | 4 ++-- 3 files changed, 7 insertions(+), 7 deletions(-) diff --git a/package/python-pip/python-pip.hash b/package/python-pip/python-pip.hash index 58bc239154..69214110f8 100644 --- a/package/python-pip/python-pip.hash +++ b/package/python-pip/python-pip.hash @@ -1,5 +1,5 @@ # md5, sha256 from https://pypi.org/pypi/pip/json -md5 7d42ba49b809604f0df3d55df1c3fd86 pip-20.0.2.tar.gz -sha256 7db0c8ea4c7ea51c8049640e8e6e7fde949de672bfa4949920675563a5a6967f pip-20.0.2.tar.gz +md5 efbdb4201a5e6383fb4d12e26f78f355 pip-21.2.4.tar.gz +sha256 0eb8a1516c3d138ae8689c0c1a60fde7143310832f9dc77e11d8a4bc62de193b pip-21.2.4.tar.gz # Locally computed sha256 checksums -sha256 5ba21fbb0964f936ad7d15362d1ed6d4931cc8c8f9ff2d4d91190e109be74431 LICENSE.txt +sha256 23a7361c2b1581028bc623b9da2bd24997abcaa4781ace6ad444a37944f8dae1 LICENSE.txt diff --git a/package/python-pip/python-pip.mk b/package/python-pip/python-pip.mk index 71f76e2842..ba7134e235 100644 --- a/package/python-pip/python-pip.mk +++ b/package/python-pip/python-pip.mk @@ -5,9 +5,9 @@ ################################################################################ # Please keep in sync with package/python3-pip/python3-pip.mk -PYTHON_PIP_VERSION = 20.0.2 +PYTHON_PIP_VERSION = 21.2.4 PYTHON_PIP_SOURCE = pip-$(PYTHON_PIP_VERSION).tar.gz -PYTHON_PIP_SITE = https://files.pythonhosted.org/packages/8e/76/66066b7bc71817238924c7e4b448abdb17eb0c92d645769c223f9ace478f +PYTHON_PIP_SITE = https://files.pythonhosted.org/packages/52/e1/06c018197d8151383f66ebf6979d951995cf495629fc54149491f5d157d0 PYTHON_PIP_SETUP_TYPE = setuptools PYTHON_PIP_LICENSE = MIT PYTHON_PIP_LICENSE_FILES = LICENSE.txt diff --git a/package/python3-pip/python3-pip.mk b/package/python3-pip/python3-pip.mk index 58e3c06c39..5e20b06865 100644 --- a/package/python3-pip/python3-pip.mk +++ b/package/python3-pip/python3-pip.mk @@ -5,9 +5,9 @@ ################################################################################ # Please keep in sync with package/python-pip/python-pip.mk -PYTHON3_PIP_VERSION = 20.0.2 +PYTHON3_PIP_VERSION = 21.2.4 PYTHON3_PIP_SOURCE = pip-$(PYTHON_PIP_VERSION).tar.gz -PYTHON3_PIP_SITE = https://files.pythonhosted.org/packages/8e/76/66066b7bc71817238924c7e4b448abdb17eb0c92d645769c223f9ace478f +PYTHON3_PIP_SITE = https://files.pythonhosted.org/packages/52/e1/06c018197d8151383f66ebf6979d951995cf495629fc54149491f5d157d0 PYTHON3_PIP_SETUP_TYPE = setuptools PYTHON3_PIP_LICENSE = MIT PYTHON3_PIP_LICENSE_FILES = LICENSE.txt -- 2.30.2 From 5d062fdbe827882d1cab90a2c0208ed451bf5d96 Mon Sep 17 00:00:00 2001 From: Adrian Perez de Castro Date: Mon, 20 Sep 2021 15:46:32 +0300 Subject: [PATCH 02/16] package/wpewebkit: security bump to version 2.32.4 This is a minor release which provides fixes for CVE-2021-30858 and a number of other potential security issues without an associated CVE. Patch "0001-Add-ldp-and-stp-support-for-FP-registers-plus-some-b.patch" is deleted as it has been included in this release. Full release notes can be found at: https://wpewebkit.org/release/wpewebkit-2.32.4.html An accompanying security advisory has been published at: https://wpewebkit.org/security/WSA-2021-0005.html Signed-off-by: Adrian Perez de Castro Signed-off-by: Arnout Vandecappelle (Essensium/Mind) --- ...support-for-FP-registers-plus-some-b.patch | 382 ------------------ package/wpewebkit/wpewebkit.hash | 9 +- package/wpewebkit/wpewebkit.mk | 2 +- 3 files changed, 5 insertions(+), 388 deletions(-) delete mode 100644 package/wpewebkit/0001-Add-ldp-and-stp-support-for-FP-registers-plus-some-b.patch diff --git a/package/wpewebkit/0001-Add-ldp-and-stp-support-for-FP-registers-plus-some-b.patch b/package/wpewebkit/0001-Add-ldp-and-stp-support-for-FP-registers-plus-some-b.patch deleted file mode 100644 index c8b8501bdb..0000000000 --- a/package/wpewebkit/0001-Add-ldp-and-stp-support-for-FP-registers-plus-some-b.patch +++ /dev/null @@ -1,382 +0,0 @@ -From 05f6ba814422a392d59037ebe4412168da0e44db Mon Sep 17 00:00:00 2001 -From: Mark Lam -Date: Tue, 15 Jun 2021 01:04:01 +0000 -Subject: [PATCH] Add ldp and stp support for FP registers, plus some bug - fixes. https://bugs.webkit.org/show_bug.cgi?id=226998 rdar://79313717 - -Reviewed by Robin Morisset. - -This patch does the following: -1. Add ldp and stp support for FP registers. - This simply entails providing wrappers that take FPRegisterID and passing true - for the V bit to the underlying loadStoreRegisterPairXXX encoding function. - V is for vector (aka floating point). This will cause bit 26 in the instruction - to be set indicating that it's loading / storing floating point registers. - -2. Add ARM64 disassembler support ldp and stp for FP registers. - This includes fixing A64DOpcodeLoadStoreRegisterPair::mask to not exclude the - FP versions of the instructions. - -3. Add ARM64Assembler query methods for determining if an immediate is encodable - as the signed 12 bit immediate of ldp and stp instructions. - -4. Fix ldp and stp offset form to take an int instead of an unsigned. The - immediate it takes is a 12-bit signed int, not unsigned. - -5. In loadStoreRegisterPairXXX encoding functions used by the forms of ldp and stp, - RELEASE_ASSERT that the passed in immediate is encodable. Unlike ldur / stur, - there is no form of ldp / stp that takes the offset in a register that can be - used as a fail over. Hence, if the immediate is not encodable, this is a - non-recoverable event. The client is responsible for ensuring that the offset - is encodable. - -6. Added some testmasm tests for testing the offset form (as opposed to PreIndex - and PostIndex forms) of ldp and stp. We currently only use the offset form - in our JITs. - -* assembler/ARM64Assembler.h: -(JSC::ARM64Assembler::isValidLDPImm): -(JSC::ARM64Assembler::isValidLDPFPImm): -(JSC::ARM64Assembler::ldp): -(JSC::ARM64Assembler::ldnp): -(JSC::ARM64Assembler::isValidSTPImm): -(JSC::ARM64Assembler::isValidSTPFPImm): -(JSC::ARM64Assembler::stp): -(JSC::ARM64Assembler::stnp): -(JSC::ARM64Assembler::loadStoreRegisterPairPostIndex): -(JSC::ARM64Assembler::loadStoreRegisterPairPreIndex): -(JSC::ARM64Assembler::loadStoreRegisterPairOffset): -(JSC::ARM64Assembler::loadStoreRegisterPairNonTemporal): -* assembler/AssemblerCommon.h: -(JSC::isValidSignedImm7): -* assembler/MacroAssemblerARM64.h: -(JSC::MacroAssemblerARM64::loadPair64): -(JSC::MacroAssemblerARM64::storePair64): -* assembler/testmasm.cpp: -(JSC::testLoadStorePair64Int64): -(JSC::testLoadStorePair64Double): -* disassembler/ARM64/A64DOpcode.cpp: -(JSC::ARM64Disassembler::A64DOpcodeLoadStoreRegisterPair::format): -* disassembler/ARM64/A64DOpcode.h: - - - -Canonical link: https://commits.webkit.org/238801@main -git-svn-id: https://svn.webkit.org/repository/webkit/trunk@278856 268f45cc-cd09-0410-ab3c-d52691b4dbfc - -Signed-off-by: James Hilliard -[james.hilliard1@gmail.com: backport from upstream commit -05f6ba814422a392d59037ebe4412168da0e44db] ---- - Source/JavaScriptCore/ChangeLog | 61 +++ - .../JavaScriptCore/assembler/ARM64Assembler.h | 104 ++++- - .../assembler/AssemblerCommon.h | 11 +- - .../assembler/MacroAssemblerARM64.h | 20 + - Source/JavaScriptCore/assembler/testmasm.cpp | 437 ++++++++++++++++++ - .../disassembler/ARM64/A64DOpcode.cpp | 8 +- - .../disassembler/ARM64/A64DOpcode.h | 4 +- - 7 files changed, 630 insertions(+), 15 deletions(-) - -diff --git a/Source/JavaScriptCore/assembler/ARM64Assembler.h b/Source/JavaScriptCore/assembler/ARM64Assembler.h -index 2cc53c8ccda5..758cbe402779 100644 ---- a/Source/JavaScriptCore/assembler/ARM64Assembler.h -+++ b/Source/JavaScriptCore/assembler/ARM64Assembler.h -@@ -1,5 +1,5 @@ - /* -- * Copyright (C) 2012-2020 Apple Inc. All rights reserved. -+ * Copyright (C) 2012-2021 Apple Inc. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions -@@ -1114,6 +1114,20 @@ public: - insn(0x0); - } - -+ template -+ ALWAYS_INLINE static bool isValidLDPImm(int immediate) -+ { -+ unsigned immedShiftAmount = memPairOffsetShift(false, MEMPAIROPSIZE_INT(datasize)); -+ return isValidSignedImm7(immediate, immedShiftAmount); -+ } -+ -+ template -+ ALWAYS_INLINE static bool isValidLDPFPImm(int immediate) -+ { -+ unsigned immedShiftAmount = memPairOffsetShift(true, MEMPAIROPSIZE_FP(datasize)); -+ return isValidSignedImm7(immediate, immedShiftAmount); -+ } -+ - template - ALWAYS_INLINE void ldp(RegisterID rt, RegisterID rt2, RegisterID rn, PairPostIndex simm) - { -@@ -1129,17 +1143,45 @@ public: - } - - template -- ALWAYS_INLINE void ldp(RegisterID rt, RegisterID rt2, RegisterID rn, unsigned pimm = 0) -+ ALWAYS_INLINE void ldp(RegisterID rt, RegisterID rt2, RegisterID rn, int simm = 0) -+ { -+ CHECK_DATASIZE(); -+ insn(loadStoreRegisterPairOffset(MEMPAIROPSIZE_INT(datasize), false, MemOp_LOAD, simm, rn, rt, rt2)); -+ } -+ -+ template -+ ALWAYS_INLINE void ldnp(RegisterID rt, RegisterID rt2, RegisterID rn, int simm = 0) -+ { -+ CHECK_DATASIZE(); -+ insn(loadStoreRegisterPairNonTemporal(MEMPAIROPSIZE_INT(datasize), false, MemOp_LOAD, simm, rn, rt, rt2)); -+ } -+ -+ template -+ ALWAYS_INLINE void ldp(FPRegisterID rt, FPRegisterID rt2, RegisterID rn, PairPostIndex simm) -+ { -+ CHECK_DATASIZE(); -+ insn(loadStoreRegisterPairPostIndex(MEMPAIROPSIZE_FP(datasize), true, MemOp_LOAD, simm, rn, rt, rt2)); -+ } -+ -+ template -+ ALWAYS_INLINE void ldp(FPRegisterID rt, FPRegisterID rt2, RegisterID rn, PairPreIndex simm) -+ { -+ CHECK_DATASIZE(); -+ insn(loadStoreRegisterPairPreIndex(MEMPAIROPSIZE_FP(datasize), true, MemOp_LOAD, simm, rn, rt, rt2)); -+ } -+ -+ template -+ ALWAYS_INLINE void ldp(FPRegisterID rt, FPRegisterID rt2, RegisterID rn, int simm = 0) - { - CHECK_DATASIZE(); -- insn(loadStoreRegisterPairOffset(MEMPAIROPSIZE_INT(datasize), false, MemOp_LOAD, pimm, rn, rt, rt2)); -+ insn(loadStoreRegisterPairOffset(MEMPAIROPSIZE_FP(datasize), true, MemOp_LOAD, simm, rn, rt, rt2)); - } - - template -- ALWAYS_INLINE void ldnp(RegisterID rt, RegisterID rt2, RegisterID rn, unsigned pimm = 0) -+ ALWAYS_INLINE void ldnp(FPRegisterID rt, FPRegisterID rt2, RegisterID rn, int simm = 0) - { - CHECK_DATASIZE(); -- insn(loadStoreRegisterPairNonTemporal(MEMPAIROPSIZE_INT(datasize), false, MemOp_LOAD, pimm, rn, rt, rt2)); -+ insn(loadStoreRegisterPairNonTemporal(MEMPAIROPSIZE_FP(datasize), true, MemOp_LOAD, simm, rn, rt, rt2)); - } - - template -@@ -1743,6 +1785,18 @@ public: - smaddl(rd, rn, rm, ARM64Registers::zr); - } - -+ template -+ ALWAYS_INLINE static bool isValidSTPImm(int immediate) -+ { -+ return isValidLDPImm(immediate); -+ } -+ -+ template -+ ALWAYS_INLINE static bool isValidSTPFPImm(int immediate) -+ { -+ return isValidLDPFPImm(immediate); -+ } -+ - template - ALWAYS_INLINE void stp(RegisterID rt, RegisterID rt2, RegisterID rn, PairPostIndex simm) - { -@@ -1758,17 +1812,45 @@ public: - } - - template -- ALWAYS_INLINE void stp(RegisterID rt, RegisterID rt2, RegisterID rn, unsigned pimm = 0) -+ ALWAYS_INLINE void stp(RegisterID rt, RegisterID rt2, RegisterID rn, int simm = 0) -+ { -+ CHECK_DATASIZE(); -+ insn(loadStoreRegisterPairOffset(MEMPAIROPSIZE_INT(datasize), false, MemOp_STORE, simm, rn, rt, rt2)); -+ } -+ -+ template -+ ALWAYS_INLINE void stnp(RegisterID rt, RegisterID rt2, RegisterID rn, int simm = 0) -+ { -+ CHECK_DATASIZE(); -+ insn(loadStoreRegisterPairNonTemporal(MEMPAIROPSIZE_INT(datasize), false, MemOp_STORE, simm, rn, rt, rt2)); -+ } -+ -+ template -+ ALWAYS_INLINE void stp(FPRegisterID rt, FPRegisterID rt2, RegisterID rn, PairPostIndex simm) -+ { -+ CHECK_DATASIZE(); -+ insn(loadStoreRegisterPairPostIndex(MEMPAIROPSIZE_FP(datasize), true, MemOp_STORE, simm, rn, rt, rt2)); -+ } -+ -+ template -+ ALWAYS_INLINE void stp(FPRegisterID rt, FPRegisterID rt2, RegisterID rn, PairPreIndex simm) -+ { -+ CHECK_DATASIZE(); -+ insn(loadStoreRegisterPairPreIndex(MEMPAIROPSIZE_FP(datasize), true, MemOp_STORE, simm, rn, rt, rt2)); -+ } -+ -+ template -+ ALWAYS_INLINE void stp(FPRegisterID rt, FPRegisterID rt2, RegisterID rn, int simm = 0) - { - CHECK_DATASIZE(); -- insn(loadStoreRegisterPairOffset(MEMPAIROPSIZE_INT(datasize), false, MemOp_STORE, pimm, rn, rt, rt2)); -+ insn(loadStoreRegisterPairOffset(MEMPAIROPSIZE_FP(datasize), true, MemOp_STORE, simm, rn, rt, rt2)); - } - - template -- ALWAYS_INLINE void stnp(RegisterID rt, RegisterID rt2, RegisterID rn, unsigned pimm = 0) -+ ALWAYS_INLINE void stnp(FPRegisterID rt, FPRegisterID rt2, RegisterID rn, int simm = 0) - { - CHECK_DATASIZE(); -- insn(loadStoreRegisterPairNonTemporal(MEMPAIROPSIZE_INT(datasize), false, MemOp_STORE, pimm, rn, rt, rt2)); -+ insn(loadStoreRegisterPairNonTemporal(MEMPAIROPSIZE_FP(datasize), true, MemOp_STORE, simm, rn, rt, rt2)); - } - - template -@@ -3544,6 +3626,7 @@ protected: - ASSERT(opc == (opc & 1)); // Only load or store, load signed 64 is handled via size. - ASSERT(V || (size != MemPairOp_LoadSigned_32) || (opc == MemOp_LOAD)); // There isn't an integer store signed. - unsigned immedShiftAmount = memPairOffsetShift(V, size); -+ RELEASE_ASSERT(isValidSignedImm7(immediate, immedShiftAmount)); - int imm7 = immediate >> immedShiftAmount; - ASSERT((imm7 << immedShiftAmount) == immediate && isInt<7>(imm7)); - return (0x28800000 | size << 30 | V << 26 | opc << 22 | (imm7 & 0x7f) << 15 | rt2 << 10 | xOrSp(rn) << 5 | rt); -@@ -3575,6 +3658,7 @@ protected: - ASSERT(opc == (opc & 1)); // Only load or store, load signed 64 is handled via size. - ASSERT(V || (size != MemPairOp_LoadSigned_32) || (opc == MemOp_LOAD)); // There isn't an integer store signed. - unsigned immedShiftAmount = memPairOffsetShift(V, size); -+ RELEASE_ASSERT(isValidSignedImm7(immediate, immedShiftAmount)); - int imm7 = immediate >> immedShiftAmount; - ASSERT((imm7 << immedShiftAmount) == immediate && isInt<7>(imm7)); - return (0x29800000 | size << 30 | V << 26 | opc << 22 | (imm7 & 0x7f) << 15 | rt2 << 10 | xOrSp(rn) << 5 | rt); -@@ -3592,6 +3676,7 @@ protected: - ASSERT(opc == (opc & 1)); // Only load or store, load signed 64 is handled via size. - ASSERT(V || (size != MemPairOp_LoadSigned_32) || (opc == MemOp_LOAD)); // There isn't an integer store signed. - unsigned immedShiftAmount = memPairOffsetShift(V, size); -+ RELEASE_ASSERT(isValidSignedImm7(immediate, immedShiftAmount)); - int imm7 = immediate >> immedShiftAmount; - ASSERT((imm7 << immedShiftAmount) == immediate && isInt<7>(imm7)); - return (0x29000000 | size << 30 | V << 26 | opc << 22 | (imm7 & 0x7f) << 15 | rt2 << 10 | xOrSp(rn) << 5 | rt); -@@ -3609,6 +3694,7 @@ protected: - ASSERT(opc == (opc & 1)); // Only load or store, load signed 64 is handled via size. - ASSERT(V || (size != MemPairOp_LoadSigned_32) || (opc == MemOp_LOAD)); // There isn't an integer store signed. - unsigned immedShiftAmount = memPairOffsetShift(V, size); -+ RELEASE_ASSERT(isValidSignedImm7(immediate, immedShiftAmount)); - int imm7 = immediate >> immedShiftAmount; - ASSERT((imm7 << immedShiftAmount) == immediate && isInt<7>(imm7)); - return (0x28000000 | size << 30 | V << 26 | opc << 22 | (imm7 & 0x7f) << 15 | rt2 << 10 | xOrSp(rn) << 5 | rt); -diff --git a/Source/JavaScriptCore/assembler/AssemblerCommon.h b/Source/JavaScriptCore/assembler/AssemblerCommon.h -index a594823d6a4d..2e50ffdbc82a 100644 ---- a/Source/JavaScriptCore/assembler/AssemblerCommon.h -+++ b/Source/JavaScriptCore/assembler/AssemblerCommon.h -@@ -1,5 +1,5 @@ - /* -- * Copyright (C) 2012-2019 Apple Inc. All rights reserved. -+ * Copyright (C) 2012-2021 Apple Inc. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions -@@ -74,6 +74,15 @@ ALWAYS_INLINE bool isValidSignedImm9(int32_t value) - return isInt9(value); - } - -+ALWAYS_INLINE bool isValidSignedImm7(int32_t value, int alignmentShiftAmount) -+{ -+ constexpr int32_t disallowedHighBits = 32 - 7; -+ int32_t shiftedValue = value >> alignmentShiftAmount; -+ bool fitsIn7Bits = shiftedValue == ((shiftedValue << disallowedHighBits) >> disallowedHighBits); -+ bool hasCorrectAlignment = value == (shiftedValue << alignmentShiftAmount); -+ return fitsIn7Bits && hasCorrectAlignment; -+} -+ - class ARM64LogicalImmediate { - public: - static ARM64LogicalImmediate create32(uint32_t value) -diff --git a/Source/JavaScriptCore/assembler/MacroAssemblerARM64.h b/Source/JavaScriptCore/assembler/MacroAssemblerARM64.h -index f86aec1c5400..14e477fde3b8 100644 ---- a/Source/JavaScriptCore/assembler/MacroAssemblerARM64.h -+++ b/Source/JavaScriptCore/assembler/MacroAssemblerARM64.h -@@ -1244,6 +1244,16 @@ public: - m_assembler.ldnp<64>(dest1, dest2, src, offset.m_value); - } - -+ void loadPair64(RegisterID src, FPRegisterID dest1, FPRegisterID dest2) -+ { -+ loadPair64(src, TrustedImm32(0), dest1, dest2); -+ } -+ -+ void loadPair64(RegisterID src, TrustedImm32 offset, FPRegisterID dest1, FPRegisterID dest2) -+ { -+ m_assembler.ldp<64>(dest1, dest2, src, offset.m_value); -+ } -+ - void abortWithReason(AbortReason reason) - { - // It is safe to use dataTempRegister directly since this is a crashing JIT Assert. -@@ -1568,6 +1578,16 @@ public: - m_assembler.stnp<64>(src1, src2, dest, offset.m_value); - } - -+ void storePair64(FPRegisterID src1, FPRegisterID src2, RegisterID dest) -+ { -+ storePair64(src1, src2, dest, TrustedImm32(0)); -+ } -+ -+ void storePair64(FPRegisterID src1, FPRegisterID src2, RegisterID dest, TrustedImm32 offset) -+ { -+ m_assembler.stp<64>(src1, src2, dest, offset.m_value); -+ } -+ - void store32(RegisterID src, ImplicitAddress address) - { - if (tryStoreWithOffset<32>(src, address.base, address.offset)) -diff --git a/Source/JavaScriptCore/disassembler/ARM64/A64DOpcode.cpp b/Source/JavaScriptCore/disassembler/ARM64/A64DOpcode.cpp -index 247c79dcb428..dfe09b671470 100644 ---- a/Source/JavaScriptCore/disassembler/ARM64/A64DOpcode.cpp -+++ b/Source/JavaScriptCore/disassembler/ARM64/A64DOpcode.cpp -@@ -1,5 +1,5 @@ - /* -- * Copyright (C) 2012, 2016 Apple Inc. All rights reserved. -+ * Copyright (C) 2012-2021 Apple Inc. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions -@@ -72,6 +72,8 @@ static const OpcodeGroupInitializer opcodeGroupList[] = { - OPCODE_GROUP_ENTRY(0x0a, A64DOpcodeLogicalShiftedRegister), - OPCODE_GROUP_ENTRY(0x0b, A64DOpcodeAddSubtractExtendedRegister), - OPCODE_GROUP_ENTRY(0x0b, A64DOpcodeAddSubtractShiftedRegister), -+ OPCODE_GROUP_ENTRY(0x0c, A64DOpcodeLoadStoreRegisterPair), -+ OPCODE_GROUP_ENTRY(0x0d, A64DOpcodeLoadStoreRegisterPair), - OPCODE_GROUP_ENTRY(0x11, A64DOpcodeAddSubtractImmediate), - OPCODE_GROUP_ENTRY(0x12, A64DOpcodeMoveWide), - OPCODE_GROUP_ENTRY(0x12, A64DOpcodeLogicalImmediate), -@@ -1363,9 +1365,9 @@ const char* A64DOpcodeLoadStoreRegisterPair::format() - appendInstructionName(thisOpName); - unsigned offsetShift; - if (vBit()) { -- appendFPRegisterName(rt(), size()); -+ appendFPRegisterName(rt(), size() + 2); - appendSeparator(); -- appendFPRegisterName(rt2(), size()); -+ appendFPRegisterName(rt2(), size() + 2); - offsetShift = size() + 2; - } else { - if (!lBit()) -diff --git a/Source/JavaScriptCore/disassembler/ARM64/A64DOpcode.h b/Source/JavaScriptCore/disassembler/ARM64/A64DOpcode.h -index e071babb8e01..fd9db7cae58e 100644 ---- a/Source/JavaScriptCore/disassembler/ARM64/A64DOpcode.h -+++ b/Source/JavaScriptCore/disassembler/ARM64/A64DOpcode.h -@@ -1,5 +1,5 @@ - /* -- * Copyright (C) 2012-2019 Apple Inc. All rights reserved. -+ * Copyright (C) 2012-2021 Apple Inc. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions -@@ -787,7 +787,7 @@ public: - - class A64DOpcodeLoadStoreRegisterPair : public A64DOpcodeLoadStore { - public: -- static constexpr uint32_t mask = 0x3a000000; -+ static constexpr uint32_t mask = 0x38000000; - static constexpr uint32_t pattern = 0x28000000; - - DEFINE_STATIC_FORMAT(A64DOpcodeLoadStoreRegisterPair, thisObj); --- -2.25.1 - diff --git a/package/wpewebkit/wpewebkit.hash b/package/wpewebkit/wpewebkit.hash index 39bf8829d0..ff8bd1f30a 100644 --- a/package/wpewebkit/wpewebkit.hash +++ b/package/wpewebkit/wpewebkit.hash @@ -1,8 +1,7 @@ - -# From https://wpewebkit.org/releases/wpewebkit-2.32.3.tar.xz.sums -md5 1e34412c50fe8d1ff084738477ecad7e wpewebkit-2.32.3.tar.xz -sha1 157344d8febfc89d6731404c30857f122f220d6e wpewebkit-2.32.3.tar.xz -sha256 859bd1bbe51026aecfb2b6f5c8c024d88fb69ac6fcdc74c788c9fbe9499d740d wpewebkit-2.32.3.tar.xz +# From https://wpewebkit.org/releases/wpewebkit-2.32.4.tar.xz.sums +md5 94ca1cc3f7b2de8b96c59d6e59cafcd0 wpewebkit-2.32.4.tar.xz +sha1 19b8ebdbfef193ca50f7625703d871db87624f86 wpewebkit-2.32.4.tar.xz +sha256 381f1422cbc319db1aa42dda48de39590ed90ac3bec6b81ec83f3f2cae5c3eeb wpewebkit-2.32.4.tar.xz # Hashes for license files: sha256 0b5d3a7cc325942567373b0ecd757d07c132e0ebd7c97bfc63f7e1a76094edb4 Source/WebCore/LICENSE-APPLE diff --git a/package/wpewebkit/wpewebkit.mk b/package/wpewebkit/wpewebkit.mk index 01b1309ad6..5c5e6625f8 100644 --- a/package/wpewebkit/wpewebkit.mk +++ b/package/wpewebkit/wpewebkit.mk @@ -4,7 +4,7 @@ # ################################################################################ -WPEWEBKIT_VERSION = 2.32.3 +WPEWEBKIT_VERSION = 2.32.4 WPEWEBKIT_SITE = http://www.wpewebkit.org/releases WPEWEBKIT_SOURCE = wpewebkit-$(WPEWEBKIT_VERSION).tar.xz WPEWEBKIT_INSTALL_STAGING = YES -- 2.30.2 From 3e4230e6e0429d0f1c0c876de41ae0b86c6b7dfc Mon Sep 17 00:00:00 2001 From: Adrian Perez de Castro Date: Mon, 20 Sep 2021 21:43:41 +0300 Subject: [PATCH 03/16] package/webkitgtk: security bump to version 2.32.4 This is a minor release which provides fixes for CVE-2021-30858 and a number of other potential security issues without an associated CVE. Patch "0001-Add-ldp-and-stp-support-for-FP-registers-plus-some-b.patch" is deleted as it has been included in this release. Full release notes can be found at: https://webkitgtk.org/2021/09/17/webkitgtk2.32.4-released.html An accompanying security advisory has been published at: https://webkitgtk.org/security/WSA-2021-0005.html Signed-off-by: Adrian Perez de Castro Signed-off-by: Arnout Vandecappelle (Essensium/Mind) --- ...support-for-FP-registers-plus-some-b.patch | 382 ------------------ package/webkitgtk/webkitgtk.hash | 8 +- package/webkitgtk/webkitgtk.mk | 2 +- 3 files changed, 5 insertions(+), 387 deletions(-) delete mode 100644 package/webkitgtk/0001-Add-ldp-and-stp-support-for-FP-registers-plus-some-b.patch diff --git a/package/webkitgtk/0001-Add-ldp-and-stp-support-for-FP-registers-plus-some-b.patch b/package/webkitgtk/0001-Add-ldp-and-stp-support-for-FP-registers-plus-some-b.patch deleted file mode 100644 index c8b8501bdb..0000000000 --- a/package/webkitgtk/0001-Add-ldp-and-stp-support-for-FP-registers-plus-some-b.patch +++ /dev/null @@ -1,382 +0,0 @@ -From 05f6ba814422a392d59037ebe4412168da0e44db Mon Sep 17 00:00:00 2001 -From: Mark Lam -Date: Tue, 15 Jun 2021 01:04:01 +0000 -Subject: [PATCH] Add ldp and stp support for FP registers, plus some bug - fixes. https://bugs.webkit.org/show_bug.cgi?id=226998 rdar://79313717 - -Reviewed by Robin Morisset. - -This patch does the following: -1. Add ldp and stp support for FP registers. - This simply entails providing wrappers that take FPRegisterID and passing true - for the V bit to the underlying loadStoreRegisterPairXXX encoding function. - V is for vector (aka floating point). This will cause bit 26 in the instruction - to be set indicating that it's loading / storing floating point registers. - -2. Add ARM64 disassembler support ldp and stp for FP registers. - This includes fixing A64DOpcodeLoadStoreRegisterPair::mask to not exclude the - FP versions of the instructions. - -3. Add ARM64Assembler query methods for determining if an immediate is encodable - as the signed 12 bit immediate of ldp and stp instructions. - -4. Fix ldp and stp offset form to take an int instead of an unsigned. The - immediate it takes is a 12-bit signed int, not unsigned. - -5. In loadStoreRegisterPairXXX encoding functions used by the forms of ldp and stp, - RELEASE_ASSERT that the passed in immediate is encodable. Unlike ldur / stur, - there is no form of ldp / stp that takes the offset in a register that can be - used as a fail over. Hence, if the immediate is not encodable, this is a - non-recoverable event. The client is responsible for ensuring that the offset - is encodable. - -6. Added some testmasm tests for testing the offset form (as opposed to PreIndex - and PostIndex forms) of ldp and stp. We currently only use the offset form - in our JITs. - -* assembler/ARM64Assembler.h: -(JSC::ARM64Assembler::isValidLDPImm): -(JSC::ARM64Assembler::isValidLDPFPImm): -(JSC::ARM64Assembler::ldp): -(JSC::ARM64Assembler::ldnp): -(JSC::ARM64Assembler::isValidSTPImm): -(JSC::ARM64Assembler::isValidSTPFPImm): -(JSC::ARM64Assembler::stp): -(JSC::ARM64Assembler::stnp): -(JSC::ARM64Assembler::loadStoreRegisterPairPostIndex): -(JSC::ARM64Assembler::loadStoreRegisterPairPreIndex): -(JSC::ARM64Assembler::loadStoreRegisterPairOffset): -(JSC::ARM64Assembler::loadStoreRegisterPairNonTemporal): -* assembler/AssemblerCommon.h: -(JSC::isValidSignedImm7): -* assembler/MacroAssemblerARM64.h: -(JSC::MacroAssemblerARM64::loadPair64): -(JSC::MacroAssemblerARM64::storePair64): -* assembler/testmasm.cpp: -(JSC::testLoadStorePair64Int64): -(JSC::testLoadStorePair64Double): -* disassembler/ARM64/A64DOpcode.cpp: -(JSC::ARM64Disassembler::A64DOpcodeLoadStoreRegisterPair::format): -* disassembler/ARM64/A64DOpcode.h: - - - -Canonical link: https://commits.webkit.org/238801@main -git-svn-id: https://svn.webkit.org/repository/webkit/trunk@278856 268f45cc-cd09-0410-ab3c-d52691b4dbfc - -Signed-off-by: James Hilliard -[james.hilliard1@gmail.com: backport from upstream commit -05f6ba814422a392d59037ebe4412168da0e44db] ---- - Source/JavaScriptCore/ChangeLog | 61 +++ - .../JavaScriptCore/assembler/ARM64Assembler.h | 104 ++++- - .../assembler/AssemblerCommon.h | 11 +- - .../assembler/MacroAssemblerARM64.h | 20 + - Source/JavaScriptCore/assembler/testmasm.cpp | 437 ++++++++++++++++++ - .../disassembler/ARM64/A64DOpcode.cpp | 8 +- - .../disassembler/ARM64/A64DOpcode.h | 4 +- - 7 files changed, 630 insertions(+), 15 deletions(-) - -diff --git a/Source/JavaScriptCore/assembler/ARM64Assembler.h b/Source/JavaScriptCore/assembler/ARM64Assembler.h -index 2cc53c8ccda5..758cbe402779 100644 ---- a/Source/JavaScriptCore/assembler/ARM64Assembler.h -+++ b/Source/JavaScriptCore/assembler/ARM64Assembler.h -@@ -1,5 +1,5 @@ - /* -- * Copyright (C) 2012-2020 Apple Inc. All rights reserved. -+ * Copyright (C) 2012-2021 Apple Inc. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions -@@ -1114,6 +1114,20 @@ public: - insn(0x0); - } - -+ template -+ ALWAYS_INLINE static bool isValidLDPImm(int immediate) -+ { -+ unsigned immedShiftAmount = memPairOffsetShift(false, MEMPAIROPSIZE_INT(datasize)); -+ return isValidSignedImm7(immediate, immedShiftAmount); -+ } -+ -+ template -+ ALWAYS_INLINE static bool isValidLDPFPImm(int immediate) -+ { -+ unsigned immedShiftAmount = memPairOffsetShift(true, MEMPAIROPSIZE_FP(datasize)); -+ return isValidSignedImm7(immediate, immedShiftAmount); -+ } -+ - template - ALWAYS_INLINE void ldp(RegisterID rt, RegisterID rt2, RegisterID rn, PairPostIndex simm) - { -@@ -1129,17 +1143,45 @@ public: - } - - template -- ALWAYS_INLINE void ldp(RegisterID rt, RegisterID rt2, RegisterID rn, unsigned pimm = 0) -+ ALWAYS_INLINE void ldp(RegisterID rt, RegisterID rt2, RegisterID rn, int simm = 0) -+ { -+ CHECK_DATASIZE(); -+ insn(loadStoreRegisterPairOffset(MEMPAIROPSIZE_INT(datasize), false, MemOp_LOAD, simm, rn, rt, rt2)); -+ } -+ -+ template -+ ALWAYS_INLINE void ldnp(RegisterID rt, RegisterID rt2, RegisterID rn, int simm = 0) -+ { -+ CHECK_DATASIZE(); -+ insn(loadStoreRegisterPairNonTemporal(MEMPAIROPSIZE_INT(datasize), false, MemOp_LOAD, simm, rn, rt, rt2)); -+ } -+ -+ template -+ ALWAYS_INLINE void ldp(FPRegisterID rt, FPRegisterID rt2, RegisterID rn, PairPostIndex simm) -+ { -+ CHECK_DATASIZE(); -+ insn(loadStoreRegisterPairPostIndex(MEMPAIROPSIZE_FP(datasize), true, MemOp_LOAD, simm, rn, rt, rt2)); -+ } -+ -+ template -+ ALWAYS_INLINE void ldp(FPRegisterID rt, FPRegisterID rt2, RegisterID rn, PairPreIndex simm) -+ { -+ CHECK_DATASIZE(); -+ insn(loadStoreRegisterPairPreIndex(MEMPAIROPSIZE_FP(datasize), true, MemOp_LOAD, simm, rn, rt, rt2)); -+ } -+ -+ template -+ ALWAYS_INLINE void ldp(FPRegisterID rt, FPRegisterID rt2, RegisterID rn, int simm = 0) - { - CHECK_DATASIZE(); -- insn(loadStoreRegisterPairOffset(MEMPAIROPSIZE_INT(datasize), false, MemOp_LOAD, pimm, rn, rt, rt2)); -+ insn(loadStoreRegisterPairOffset(MEMPAIROPSIZE_FP(datasize), true, MemOp_LOAD, simm, rn, rt, rt2)); - } - - template -- ALWAYS_INLINE void ldnp(RegisterID rt, RegisterID rt2, RegisterID rn, unsigned pimm = 0) -+ ALWAYS_INLINE void ldnp(FPRegisterID rt, FPRegisterID rt2, RegisterID rn, int simm = 0) - { - CHECK_DATASIZE(); -- insn(loadStoreRegisterPairNonTemporal(MEMPAIROPSIZE_INT(datasize), false, MemOp_LOAD, pimm, rn, rt, rt2)); -+ insn(loadStoreRegisterPairNonTemporal(MEMPAIROPSIZE_FP(datasize), true, MemOp_LOAD, simm, rn, rt, rt2)); - } - - template -@@ -1743,6 +1785,18 @@ public: - smaddl(rd, rn, rm, ARM64Registers::zr); - } - -+ template -+ ALWAYS_INLINE static bool isValidSTPImm(int immediate) -+ { -+ return isValidLDPImm(immediate); -+ } -+ -+ template -+ ALWAYS_INLINE static bool isValidSTPFPImm(int immediate) -+ { -+ return isValidLDPFPImm(immediate); -+ } -+ - template - ALWAYS_INLINE void stp(RegisterID rt, RegisterID rt2, RegisterID rn, PairPostIndex simm) - { -@@ -1758,17 +1812,45 @@ public: - } - - template -- ALWAYS_INLINE void stp(RegisterID rt, RegisterID rt2, RegisterID rn, unsigned pimm = 0) -+ ALWAYS_INLINE void stp(RegisterID rt, RegisterID rt2, RegisterID rn, int simm = 0) -+ { -+ CHECK_DATASIZE(); -+ insn(loadStoreRegisterPairOffset(MEMPAIROPSIZE_INT(datasize), false, MemOp_STORE, simm, rn, rt, rt2)); -+ } -+ -+ template -+ ALWAYS_INLINE void stnp(RegisterID rt, RegisterID rt2, RegisterID rn, int simm = 0) -+ { -+ CHECK_DATASIZE(); -+ insn(loadStoreRegisterPairNonTemporal(MEMPAIROPSIZE_INT(datasize), false, MemOp_STORE, simm, rn, rt, rt2)); -+ } -+ -+ template -+ ALWAYS_INLINE void stp(FPRegisterID rt, FPRegisterID rt2, RegisterID rn, PairPostIndex simm) -+ { -+ CHECK_DATASIZE(); -+ insn(loadStoreRegisterPairPostIndex(MEMPAIROPSIZE_FP(datasize), true, MemOp_STORE, simm, rn, rt, rt2)); -+ } -+ -+ template -+ ALWAYS_INLINE void stp(FPRegisterID rt, FPRegisterID rt2, RegisterID rn, PairPreIndex simm) -+ { -+ CHECK_DATASIZE(); -+ insn(loadStoreRegisterPairPreIndex(MEMPAIROPSIZE_FP(datasize), true, MemOp_STORE, simm, rn, rt, rt2)); -+ } -+ -+ template -+ ALWAYS_INLINE void stp(FPRegisterID rt, FPRegisterID rt2, RegisterID rn, int simm = 0) - { - CHECK_DATASIZE(); -- insn(loadStoreRegisterPairOffset(MEMPAIROPSIZE_INT(datasize), false, MemOp_STORE, pimm, rn, rt, rt2)); -+ insn(loadStoreRegisterPairOffset(MEMPAIROPSIZE_FP(datasize), true, MemOp_STORE, simm, rn, rt, rt2)); - } - - template -- ALWAYS_INLINE void stnp(RegisterID rt, RegisterID rt2, RegisterID rn, unsigned pimm = 0) -+ ALWAYS_INLINE void stnp(FPRegisterID rt, FPRegisterID rt2, RegisterID rn, int simm = 0) - { - CHECK_DATASIZE(); -- insn(loadStoreRegisterPairNonTemporal(MEMPAIROPSIZE_INT(datasize), false, MemOp_STORE, pimm, rn, rt, rt2)); -+ insn(loadStoreRegisterPairNonTemporal(MEMPAIROPSIZE_FP(datasize), true, MemOp_STORE, simm, rn, rt, rt2)); - } - - template -@@ -3544,6 +3626,7 @@ protected: - ASSERT(opc == (opc & 1)); // Only load or store, load signed 64 is handled via size. - ASSERT(V || (size != MemPairOp_LoadSigned_32) || (opc == MemOp_LOAD)); // There isn't an integer store signed. - unsigned immedShiftAmount = memPairOffsetShift(V, size); -+ RELEASE_ASSERT(isValidSignedImm7(immediate, immedShiftAmount)); - int imm7 = immediate >> immedShiftAmount; - ASSERT((imm7 << immedShiftAmount) == immediate && isInt<7>(imm7)); - return (0x28800000 | size << 30 | V << 26 | opc << 22 | (imm7 & 0x7f) << 15 | rt2 << 10 | xOrSp(rn) << 5 | rt); -@@ -3575,6 +3658,7 @@ protected: - ASSERT(opc == (opc & 1)); // Only load or store, load signed 64 is handled via size. - ASSERT(V || (size != MemPairOp_LoadSigned_32) || (opc == MemOp_LOAD)); // There isn't an integer store signed. - unsigned immedShiftAmount = memPairOffsetShift(V, size); -+ RELEASE_ASSERT(isValidSignedImm7(immediate, immedShiftAmount)); - int imm7 = immediate >> immedShiftAmount; - ASSERT((imm7 << immedShiftAmount) == immediate && isInt<7>(imm7)); - return (0x29800000 | size << 30 | V << 26 | opc << 22 | (imm7 & 0x7f) << 15 | rt2 << 10 | xOrSp(rn) << 5 | rt); -@@ -3592,6 +3676,7 @@ protected: - ASSERT(opc == (opc & 1)); // Only load or store, load signed 64 is handled via size. - ASSERT(V || (size != MemPairOp_LoadSigned_32) || (opc == MemOp_LOAD)); // There isn't an integer store signed. - unsigned immedShiftAmount = memPairOffsetShift(V, size); -+ RELEASE_ASSERT(isValidSignedImm7(immediate, immedShiftAmount)); - int imm7 = immediate >> immedShiftAmount; - ASSERT((imm7 << immedShiftAmount) == immediate && isInt<7>(imm7)); - return (0x29000000 | size << 30 | V << 26 | opc << 22 | (imm7 & 0x7f) << 15 | rt2 << 10 | xOrSp(rn) << 5 | rt); -@@ -3609,6 +3694,7 @@ protected: - ASSERT(opc == (opc & 1)); // Only load or store, load signed 64 is handled via size. - ASSERT(V || (size != MemPairOp_LoadSigned_32) || (opc == MemOp_LOAD)); // There isn't an integer store signed. - unsigned immedShiftAmount = memPairOffsetShift(V, size); -+ RELEASE_ASSERT(isValidSignedImm7(immediate, immedShiftAmount)); - int imm7 = immediate >> immedShiftAmount; - ASSERT((imm7 << immedShiftAmount) == immediate && isInt<7>(imm7)); - return (0x28000000 | size << 30 | V << 26 | opc << 22 | (imm7 & 0x7f) << 15 | rt2 << 10 | xOrSp(rn) << 5 | rt); -diff --git a/Source/JavaScriptCore/assembler/AssemblerCommon.h b/Source/JavaScriptCore/assembler/AssemblerCommon.h -index a594823d6a4d..2e50ffdbc82a 100644 ---- a/Source/JavaScriptCore/assembler/AssemblerCommon.h -+++ b/Source/JavaScriptCore/assembler/AssemblerCommon.h -@@ -1,5 +1,5 @@ - /* -- * Copyright (C) 2012-2019 Apple Inc. All rights reserved. -+ * Copyright (C) 2012-2021 Apple Inc. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions -@@ -74,6 +74,15 @@ ALWAYS_INLINE bool isValidSignedImm9(int32_t value) - return isInt9(value); - } - -+ALWAYS_INLINE bool isValidSignedImm7(int32_t value, int alignmentShiftAmount) -+{ -+ constexpr int32_t disallowedHighBits = 32 - 7; -+ int32_t shiftedValue = value >> alignmentShiftAmount; -+ bool fitsIn7Bits = shiftedValue == ((shiftedValue << disallowedHighBits) >> disallowedHighBits); -+ bool hasCorrectAlignment = value == (shiftedValue << alignmentShiftAmount); -+ return fitsIn7Bits && hasCorrectAlignment; -+} -+ - class ARM64LogicalImmediate { - public: - static ARM64LogicalImmediate create32(uint32_t value) -diff --git a/Source/JavaScriptCore/assembler/MacroAssemblerARM64.h b/Source/JavaScriptCore/assembler/MacroAssemblerARM64.h -index f86aec1c5400..14e477fde3b8 100644 ---- a/Source/JavaScriptCore/assembler/MacroAssemblerARM64.h -+++ b/Source/JavaScriptCore/assembler/MacroAssemblerARM64.h -@@ -1244,6 +1244,16 @@ public: - m_assembler.ldnp<64>(dest1, dest2, src, offset.m_value); - } - -+ void loadPair64(RegisterID src, FPRegisterID dest1, FPRegisterID dest2) -+ { -+ loadPair64(src, TrustedImm32(0), dest1, dest2); -+ } -+ -+ void loadPair64(RegisterID src, TrustedImm32 offset, FPRegisterID dest1, FPRegisterID dest2) -+ { -+ m_assembler.ldp<64>(dest1, dest2, src, offset.m_value); -+ } -+ - void abortWithReason(AbortReason reason) - { - // It is safe to use dataTempRegister directly since this is a crashing JIT Assert. -@@ -1568,6 +1578,16 @@ public: - m_assembler.stnp<64>(src1, src2, dest, offset.m_value); - } - -+ void storePair64(FPRegisterID src1, FPRegisterID src2, RegisterID dest) -+ { -+ storePair64(src1, src2, dest, TrustedImm32(0)); -+ } -+ -+ void storePair64(FPRegisterID src1, FPRegisterID src2, RegisterID dest, TrustedImm32 offset) -+ { -+ m_assembler.stp<64>(src1, src2, dest, offset.m_value); -+ } -+ - void store32(RegisterID src, ImplicitAddress address) - { - if (tryStoreWithOffset<32>(src, address.base, address.offset)) -diff --git a/Source/JavaScriptCore/disassembler/ARM64/A64DOpcode.cpp b/Source/JavaScriptCore/disassembler/ARM64/A64DOpcode.cpp -index 247c79dcb428..dfe09b671470 100644 ---- a/Source/JavaScriptCore/disassembler/ARM64/A64DOpcode.cpp -+++ b/Source/JavaScriptCore/disassembler/ARM64/A64DOpcode.cpp -@@ -1,5 +1,5 @@ - /* -- * Copyright (C) 2012, 2016 Apple Inc. All rights reserved. -+ * Copyright (C) 2012-2021 Apple Inc. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions -@@ -72,6 +72,8 @@ static const OpcodeGroupInitializer opcodeGroupList[] = { - OPCODE_GROUP_ENTRY(0x0a, A64DOpcodeLogicalShiftedRegister), - OPCODE_GROUP_ENTRY(0x0b, A64DOpcodeAddSubtractExtendedRegister), - OPCODE_GROUP_ENTRY(0x0b, A64DOpcodeAddSubtractShiftedRegister), -+ OPCODE_GROUP_ENTRY(0x0c, A64DOpcodeLoadStoreRegisterPair), -+ OPCODE_GROUP_ENTRY(0x0d, A64DOpcodeLoadStoreRegisterPair), - OPCODE_GROUP_ENTRY(0x11, A64DOpcodeAddSubtractImmediate), - OPCODE_GROUP_ENTRY(0x12, A64DOpcodeMoveWide), - OPCODE_GROUP_ENTRY(0x12, A64DOpcodeLogicalImmediate), -@@ -1363,9 +1365,9 @@ const char* A64DOpcodeLoadStoreRegisterPair::format() - appendInstructionName(thisOpName); - unsigned offsetShift; - if (vBit()) { -- appendFPRegisterName(rt(), size()); -+ appendFPRegisterName(rt(), size() + 2); - appendSeparator(); -- appendFPRegisterName(rt2(), size()); -+ appendFPRegisterName(rt2(), size() + 2); - offsetShift = size() + 2; - } else { - if (!lBit()) -diff --git a/Source/JavaScriptCore/disassembler/ARM64/A64DOpcode.h b/Source/JavaScriptCore/disassembler/ARM64/A64DOpcode.h -index e071babb8e01..fd9db7cae58e 100644 ---- a/Source/JavaScriptCore/disassembler/ARM64/A64DOpcode.h -+++ b/Source/JavaScriptCore/disassembler/ARM64/A64DOpcode.h -@@ -1,5 +1,5 @@ - /* -- * Copyright (C) 2012-2019 Apple Inc. All rights reserved. -+ * Copyright (C) 2012-2021 Apple Inc. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions -@@ -787,7 +787,7 @@ public: - - class A64DOpcodeLoadStoreRegisterPair : public A64DOpcodeLoadStore { - public: -- static constexpr uint32_t mask = 0x3a000000; -+ static constexpr uint32_t mask = 0x38000000; - static constexpr uint32_t pattern = 0x28000000; - - DEFINE_STATIC_FORMAT(A64DOpcodeLoadStoreRegisterPair, thisObj); --- -2.25.1 - diff --git a/package/webkitgtk/webkitgtk.hash b/package/webkitgtk/webkitgtk.hash index 1208dfce6c..7cb6c90b21 100644 --- a/package/webkitgtk/webkitgtk.hash +++ b/package/webkitgtk/webkitgtk.hash @@ -1,7 +1,7 @@ -# From https://webkitgtk.org/releases/webkitgtk-2.32.3.tar.xz.sums -md5 f31b802de421865ea9f1391ec8190519 webkitgtk-2.32.3.tar.xz -sha1 9c9b2cb2638ea40706765768dd5cb3c95ab46dcb webkitgtk-2.32.3.tar.xz -sha256 c1f496f5ac654efe4cef62fbd4f2fbeeef265a07c5e7419e5d2900bfeea52cbc webkitgtk-2.32.3.tar.xz +# From https://webkitgtk.org/releases/webkitgtk-2.32.4.tar.xz.sums +md5 51a167e5d03bacf30c5c588e6aa23143 webkitgtk-2.32.4.tar.xz +sha1 f7255ffb488e727e9e250e0dae9f192266f50f01 webkitgtk-2.32.4.tar.xz +sha256 00ce2d3f798d7bc5e9039d9059f0c3c974d51de38c8b716f00e94452a177d3fd webkitgtk-2.32.4.tar.xz # Hashes for license files: sha256 0b5d3a7cc325942567373b0ecd757d07c132e0ebd7c97bfc63f7e1a76094edb4 Source/WebCore/LICENSE-APPLE diff --git a/package/webkitgtk/webkitgtk.mk b/package/webkitgtk/webkitgtk.mk index 8102b1e74d..6687d7f61b 100644 --- a/package/webkitgtk/webkitgtk.mk +++ b/package/webkitgtk/webkitgtk.mk @@ -4,7 +4,7 @@ # ################################################################################ -WEBKITGTK_VERSION = 2.32.3 +WEBKITGTK_VERSION = 2.32.4 WEBKITGTK_SITE = https://www.webkitgtk.org/releases WEBKITGTK_SOURCE = webkitgtk-$(WEBKITGTK_VERSION).tar.xz WEBKITGTK_INSTALL_STAGING = YES -- 2.30.2 From 69e4493fb1e676f29347701a58f67d81bd76b1eb Mon Sep 17 00:00:00 2001 From: Peter Korsgaard Date: Tue, 21 Sep 2021 00:02:34 +0200 Subject: [PATCH 04/16] package/xen: security bump to version 4.14.3 Includes a number of bugfixes and the security fixes up to xsa-384: https://xenproject.org/downloads/xen-project-archives/xen-project-4-14-series/xen-project-4-14-3/ Drop the now upstream 0002-libs-foreignmemory-Fix-osdep_xenforeignmemory_map-prototype.patch, and renumber the remaining patches. Signed-off-by: Peter Korsgaard Signed-off-by: Arnout Vandecappelle (Essensium/Mind) --- ... 0002-Fix-build-with-64-bits-time_t.patch} | 0 ...osdep_xenforeignmemory_map-prototype.patch | 33 ------------------- ...libs-light-fix-tv_sec-printf-format.patch} | 0 ...ibs-light-fix-tv_sec-fprintf-format.patch} | 0 package/xen/xen.hash | 2 +- package/xen/xen.mk | 2 +- 6 files changed, 2 insertions(+), 35 deletions(-) rename package/xen/{0003-Fix-build-with-64-bits-time_t.patch => 0002-Fix-build-with-64-bits-time_t.patch} (100%) delete mode 100644 package/xen/0002-libs-foreignmemory-Fix-osdep_xenforeignmemory_map-prototype.patch rename package/xen/{0004-libs-light-fix-tv_sec-printf-format.patch => 0003-libs-light-fix-tv_sec-printf-format.patch} (100%) rename package/xen/{0005-libs-light-fix-tv_sec-fprintf-format.patch => 0004-libs-light-fix-tv_sec-fprintf-format.patch} (100%) diff --git a/package/xen/0003-Fix-build-with-64-bits-time_t.patch b/package/xen/0002-Fix-build-with-64-bits-time_t.patch similarity index 100% rename from package/xen/0003-Fix-build-with-64-bits-time_t.patch rename to package/xen/0002-Fix-build-with-64-bits-time_t.patch diff --git a/package/xen/0002-libs-foreignmemory-Fix-osdep_xenforeignmemory_map-prototype.patch b/package/xen/0002-libs-foreignmemory-Fix-osdep_xenforeignmemory_map-prototype.patch deleted file mode 100644 index 170d1c22c2..0000000000 --- a/package/xen/0002-libs-foreignmemory-Fix-osdep_xenforeignmemory_map-prototype.patch +++ /dev/null @@ -1,33 +0,0 @@ -From 5d3e4ebb5c71477d74a0c503438545a0126d3863 Mon Sep 17 00:00:00 2001 -From: Anthony PERARD -Date: Tue, 1 Jun 2021 16:41:47 +0100 -Subject: [PATCH] libs/foreignmemory: Fix osdep_xenforeignmemory_map prototype - -Commit cf8c4d3d13b8 made some preparation to have one day -variable-length-array argument, but didn't declare the array in the -function prototype the same way as in the function definition. And now -GCC 11 complains about it. - -Fixes: cf8c4d3d13b8 ("tools/libs/foreignmemory: pull array length argument to map forward") -Signed-off-by: Anthony PERARD -Reviewed-by: Jan Beulich -[Retrieved from: -https://github.com/xen-project/xen/commit/5d3e4ebb5c71477d74a0c503438545a0126d3863] -Signed-off-by: Fabrice Fontaine ---- - tools/libs/foreignmemory/private.h | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - -diff --git a/tools/libs/foreignmemory/private.h b/tools/libs/foreignmemory/private.h -index 1ee3626dd278..5bb0cefb0987 100644 ---- a/tools/libs/foreignmemory/private.h -+++ b/tools/libs/foreignmemory/private.h -@@ -32,7 +32,7 @@ int osdep_xenforeignmemory_close(xenforeignmemory_handle *fmem); - void *osdep_xenforeignmemory_map(xenforeignmemory_handle *fmem, - uint32_t dom, void *addr, - int prot, int flags, size_t num, -- const xen_pfn_t arr[num], int err[num]); -+ const xen_pfn_t arr[/*num*/], int err[/*num*/]); - int osdep_xenforeignmemory_unmap(xenforeignmemory_handle *fmem, - void *addr, size_t num); - diff --git a/package/xen/0004-libs-light-fix-tv_sec-printf-format.patch b/package/xen/0003-libs-light-fix-tv_sec-printf-format.patch similarity index 100% rename from package/xen/0004-libs-light-fix-tv_sec-printf-format.patch rename to package/xen/0003-libs-light-fix-tv_sec-printf-format.patch diff --git a/package/xen/0005-libs-light-fix-tv_sec-fprintf-format.patch b/package/xen/0004-libs-light-fix-tv_sec-fprintf-format.patch similarity index 100% rename from package/xen/0005-libs-light-fix-tv_sec-fprintf-format.patch rename to package/xen/0004-libs-light-fix-tv_sec-fprintf-format.patch diff --git a/package/xen/xen.hash b/package/xen/xen.hash index fd0310c921..e30db09516 100644 --- a/package/xen/xen.hash +++ b/package/xen/xen.hash @@ -1,3 +1,3 @@ # Locally computed -sha256 e35099a963070e3c9f425d1e36cbb1c40b7874ef449bfafd6688343783cb25ad xen-4.14.2.tar.gz +sha256 a3dad76a772393a1875e8f44a6059a95fea4bde40f97b800966969ac6f3a498d xen-4.14.3.tar.gz sha256 ecca9538e9d3f7e3c2bff827502f4495e2ef9e22c451298696ea08886b176c2c COPYING diff --git a/package/xen/xen.mk b/package/xen/xen.mk index b84214ed16..b635996afb 100644 --- a/package/xen/xen.mk +++ b/package/xen/xen.mk @@ -4,7 +4,7 @@ # ################################################################################ -XEN_VERSION = 4.14.2 +XEN_VERSION = 4.14.3 XEN_SITE = https://downloads.xenproject.org/release/xen/$(XEN_VERSION) XEN_LICENSE = GPL-2.0 XEN_LICENSE_FILES = COPYING -- 2.30.2 From 5bb9d79f276551c8fb7a774d8c7bd0f47a9e9809 Mon Sep 17 00:00:00 2001 From: Peter Korsgaard Date: Tue, 21 Sep 2021 11:32:49 +0200 Subject: [PATCH 05/16] package/lynx: add security patch for CVE-2021-38165 Lynx through 2.8.9 mishandles the userinfo subcomponent of a URI, which allows remote attackers to discover cleartext credentials because they may appear in SNI data. https://lists.nongnu.org/archive/html/lynx-dev/2021-08/msg00002.html Upstream unfortunately does not provide a public VCS (only source snapshots), so fetch the security patch from Debian. Signed-off-by: Peter Korsgaard Signed-off-by: Arnout Vandecappelle (Essensium/Mind) --- package/lynx/lynx.hash | 1 + package/lynx/lynx.mk | 4 ++++ 2 files changed, 5 insertions(+) diff --git a/package/lynx/lynx.hash b/package/lynx/lynx.hash index 76d7614a7c..62e2555a99 100644 --- a/package/lynx/lynx.hash +++ b/package/lynx/lynx.hash @@ -1,3 +1,4 @@ # Locally calculated: sha256 387f193d7792f9cfada14c60b0e5c0bff18f227d9257a39483e14fa1aaf79595 lynx2.8.9rel.1.tar.bz2 +sha256 b2207e757dbbefc34a20a32b1b4a216b4a4316e1dc812bceca4ac6294871119a 90_CVE-2021-38165.patch sha256 8406a30ff3134ec23cf752d1ceda92ddaabbe41b4f2dc07ea3cfa139de12d6d6 COPYING diff --git a/package/lynx/lynx.mk b/package/lynx/lynx.mk index d115682d64..44d52d90a5 100644 --- a/package/lynx/lynx.mk +++ b/package/lynx/lynx.mk @@ -7,6 +7,10 @@ LYNX_VERSION = 2.8.9rel.1 LYNX_SOURCE = lynx$(LYNX_VERSION).tar.bz2 LYNX_SITE = ftp://ftp.invisible-island.net/lynx/tarballs +LYNX_PATCH = \ + https://salsa.debian.org/lynx-team/lynx/-/raw/debian/2.9.0dev.6-3_deb11u1/debian/patches/90_CVE-2021-38165.patch +# 90_CVE-2021-38165.patch +LYNX_IGNORE_CVES += CVE-2021-38165 LYNX_LICENSE = GPL-2.0 LYNX_LICENSE_FILES = COPYING -- 2.30.2 From 4e415b4164551e712643e9608d8813cc749fd279 Mon Sep 17 00:00:00 2001 From: Peter Korsgaard Date: Tue, 21 Sep 2021 21:16:50 +0200 Subject: [PATCH 06/16] package/ghostscript: add upstream security patch for CVE-2021-3781 The file access protection built into Ghostscript proved insufficient for the "%pipe%" PostScript device, when combined with Ghostscript's requirement to be able to create and control temporary files in the conventional temporary file directories (for example, "/tmp" or "/temp). This exploit is restricted to Unix-like systems (i.e., it doesn't affect Windows). The most severe claimed results are only feasible if the exploit is run as a "high privilege" user (root/superuser level) \u2013 a practice we would discourage under any circumstances. For more details, see the advisory: https://ghostscript.com/CVE-2021-3781.html Signed-off-by: Peter Korsgaard Signed-off-by: Arnout Vandecappelle (Essensium/Mind) --- ...de-device-specifier-strings-in-acces.patch | 234 ++++++++++++++++++ package/ghostscript/ghostscript.mk | 3 + 2 files changed, 237 insertions(+) create mode 100644 package/ghostscript/0002-Bug-704342-Include-device-specifier-strings-in-acces.patch diff --git a/package/ghostscript/0002-Bug-704342-Include-device-specifier-strings-in-acces.patch b/package/ghostscript/0002-Bug-704342-Include-device-specifier-strings-in-acces.patch new file mode 100644 index 0000000000..81436d8228 --- /dev/null +++ b/package/ghostscript/0002-Bug-704342-Include-device-specifier-strings-in-acces.patch @@ -0,0 +1,234 @@ +From a9bd3dec9fde03327a4a2c69dad1036bf9632e20 Mon Sep 17 00:00:00 2001 +From: Chris Liddell +Date: Tue, 7 Sep 2021 20:36:12 +0100 +Subject: [PATCH] Bug 704342: Include device specifier strings in access + validation + +for the "%pipe%", %handle%" and %printer% io devices. + +We previously validated only the part after the "%pipe%" Postscript device +specifier, but this proved insufficient. + +This rebuilds the original file name string, and validates it complete. The +slight complication for "%pipe%" is it can be reached implicitly using +"|" so we have to check both prefixes. + +Addresses CVE-2021-3781 + +Signed-off-by: Peter Korsgaard +--- + base/gdevpipe.c | 22 +++++++++++++++- + base/gp_mshdl.c | 11 +++++++- + base/gp_msprn.c | 10 ++++++- + base/gp_os2pr.c | 13 +++++++++- + base/gslibctx.c | 69 ++++++++++--------------------------------------- + 5 files changed, 65 insertions(+), 60 deletions(-) + +diff --git a/base/gdevpipe.c b/base/gdevpipe.c +index 96d71f5d8..5bdc485be 100644 +--- a/base/gdevpipe.c ++++ b/base/gdevpipe.c +@@ -72,8 +72,28 @@ pipe_fopen(gx_io_device * iodev, const char *fname, const char *access, + #else + gs_lib_ctx_t *ctx = mem->gs_lib_ctx; + gs_fs_list_t *fs = ctx->core->fs; ++ /* The pipe device can be reached in two ways, explicltly with %pipe% ++ or implicitly with "|", so we have to check for both ++ */ ++ char f[gp_file_name_sizeof]; ++ const char *pipestr = "|"; ++ const size_t pipestrlen = strlen(pipestr); ++ const size_t preflen = strlen(iodev->dname); ++ const size_t nlen = strlen(fname); ++ int code1; ++ ++ if (preflen + nlen >= gp_file_name_sizeof) ++ return_error(gs_error_invalidaccess); ++ ++ memcpy(f, iodev->dname, preflen); ++ memcpy(f + preflen, fname, nlen + 1); ++ ++ code1 = gp_validate_path(mem, f, access); ++ ++ memcpy(f, pipestr, pipestrlen); ++ memcpy(f + pipestrlen, fname, nlen + 1); + +- if (gp_validate_path(mem, fname, access) != 0) ++ if (code1 != 0 && gp_validate_path(mem, f, access) != 0 ) + return gs_error_invalidfileaccess; + + /* +diff --git a/base/gp_mshdl.c b/base/gp_mshdl.c +index 2b964ed74..8d87ceadc 100644 +--- a/base/gp_mshdl.c ++++ b/base/gp_mshdl.c +@@ -95,8 +95,17 @@ mswin_handle_fopen(gx_io_device * iodev, const char *fname, const char *access, + long hfile; /* Correct for Win32, may be wrong for Win64 */ + gs_lib_ctx_t *ctx = mem->gs_lib_ctx; + gs_fs_list_t *fs = ctx->core->fs; ++ char f[gp_file_name_sizeof]; ++ const size_t preflen = strlen(iodev->dname); ++ const size_t nlen = strlen(fname); + +- if (gp_validate_path(mem, fname, access) != 0) ++ if (preflen + nlen >= gp_file_name_sizeof) ++ return_error(gs_error_invalidaccess); ++ ++ memcpy(f, iodev->dname, preflen); ++ memcpy(f + preflen, fname, nlen + 1); ++ ++ if (gp_validate_path(mem, f, access) != 0) + return gs_error_invalidfileaccess; + + /* First we try the open_handle method. */ +diff --git a/base/gp_msprn.c b/base/gp_msprn.c +index ed4827968..746a974f7 100644 +--- a/base/gp_msprn.c ++++ b/base/gp_msprn.c +@@ -168,8 +168,16 @@ mswin_printer_fopen(gx_io_device * iodev, const char *fname, const char *access, + uintptr_t *ptid = &((tid_t *)(iodev->state))->tid; + gs_lib_ctx_t *ctx = mem->gs_lib_ctx; + gs_fs_list_t *fs = ctx->core->fs; ++ const size_t preflen = strlen(iodev->dname); ++ const size_t nlen = strlen(fname); + +- if (gp_validate_path(mem, fname, access) != 0) ++ if (preflen + nlen >= gp_file_name_sizeof) ++ return_error(gs_error_invalidaccess); ++ ++ memcpy(pname, iodev->dname, preflen); ++ memcpy(pname + preflen, fname, nlen + 1); ++ ++ if (gp_validate_path(mem, pname, access) != 0) + return gs_error_invalidfileaccess; + + /* First we try the open_printer method. */ +diff --git a/base/gp_os2pr.c b/base/gp_os2pr.c +index f852c71fc..ba54cde66 100644 +--- a/base/gp_os2pr.c ++++ b/base/gp_os2pr.c +@@ -107,9 +107,20 @@ os2_printer_fopen(gx_io_device * iodev, const char *fname, const char *access, + FILE ** pfile, char *rfname, uint rnamelen) + { + os2_printer_t *pr = (os2_printer_t *)iodev->state; +- char driver_name[256]; ++ char driver_name[gp_file_name_sizeof]; + gs_lib_ctx_t *ctx = mem->gs_lib_ctx; + gs_fs_list_t *fs = ctx->core->fs; ++ const size_t preflen = strlen(iodev->dname); ++ const int size_t = strlen(fname); ++ ++ if (preflen + nlen >= gp_file_name_sizeof) ++ return_error(gs_error_invalidaccess); ++ ++ memcpy(driver_name, iodev->dname, preflen); ++ memcpy(driver_name + preflen, fname, nlen + 1); ++ ++ if (gp_validate_path(mem, driver_name, access) != 0) ++ return gs_error_invalidfileaccess; + + /* First we try the open_printer method. */ + /* Note that the loop condition here ensures we don't +diff --git a/base/gslibctx.c b/base/gslibctx.c +index 6dfed6cd5..318039fad 100644 +--- a/base/gslibctx.c ++++ b/base/gslibctx.c +@@ -655,82 +655,39 @@ rewrite_percent_specifiers(char *s) + int + gs_add_outputfile_control_path(gs_memory_t *mem, const char *fname) + { +- char *fp, f[gp_file_name_sizeof]; +- const int pipe = 124; /* ASCII code for '|' */ +- const int len = strlen(fname); +- int i, code; ++ char f[gp_file_name_sizeof]; ++ int code; + + /* Be sure the string copy will fit */ +- if (len >= gp_file_name_sizeof) ++ if (strlen(fname) >= gp_file_name_sizeof) + return gs_error_rangecheck; + strcpy(f, fname); +- fp = f; + /* Try to rewrite any %d (or similar) in the string */ + rewrite_percent_specifiers(f); +- for (i = 0; i < len; i++) { +- if (f[i] == pipe) { +- fp = &f[i + 1]; +- /* Because we potentially have to check file permissions at two levels +- for the output file (gx_device_open_output_file and the low level +- fopen API, if we're using a pipe, we have to add both the full string, +- (including the '|', and just the command to which we pipe - since at +- the pipe_fopen(), the leading '|' has been stripped. +- */ +- code = gs_add_control_path(mem, gs_permit_file_writing, f); +- if (code < 0) +- return code; +- code = gs_add_control_path(mem, gs_permit_file_control, f); +- if (code < 0) +- return code; +- break; +- } +- if (!IS_WHITESPACE(f[i])) +- break; +- } +- code = gs_add_control_path(mem, gs_permit_file_control, fp); ++ ++ code = gs_add_control_path(mem, gs_permit_file_control, f); + if (code < 0) + return code; +- return gs_add_control_path(mem, gs_permit_file_writing, fp); ++ return gs_add_control_path(mem, gs_permit_file_writing, f); + } + + int + gs_remove_outputfile_control_path(gs_memory_t *mem, const char *fname) + { +- char *fp, f[gp_file_name_sizeof]; +- const int pipe = 124; /* ASCII code for '|' */ +- const int len = strlen(fname); +- int i, code; ++ char f[gp_file_name_sizeof]; ++ int code; + + /* Be sure the string copy will fit */ +- if (len >= gp_file_name_sizeof) ++ if (strlen(fname) >= gp_file_name_sizeof) + return gs_error_rangecheck; + strcpy(f, fname); +- fp = f; + /* Try to rewrite any %d (or similar) in the string */ +- for (i = 0; i < len; i++) { +- if (f[i] == pipe) { +- fp = &f[i + 1]; +- /* Because we potentially have to check file permissions at two levels +- for the output file (gx_device_open_output_file and the low level +- fopen API, if we're using a pipe, we have to add both the full string, +- (including the '|', and just the command to which we pipe - since at +- the pipe_fopen(), the leading '|' has been stripped. +- */ +- code = gs_remove_control_path(mem, gs_permit_file_writing, f); +- if (code < 0) +- return code; +- code = gs_remove_control_path(mem, gs_permit_file_control, f); +- if (code < 0) +- return code; +- break; +- } +- if (!IS_WHITESPACE(f[i])) +- break; +- } +- code = gs_remove_control_path(mem, gs_permit_file_control, fp); ++ rewrite_percent_specifiers(f); ++ ++ code = gs_remove_control_path(mem, gs_permit_file_control, f); + if (code < 0) + return code; +- return gs_remove_control_path(mem, gs_permit_file_writing, fp); ++ return gs_remove_control_path(mem, gs_permit_file_writing, f); + } + + int +-- +2.20.1 + diff --git a/package/ghostscript/ghostscript.mk b/package/ghostscript/ghostscript.mk index 5b50c94405..ca24c61678 100644 --- a/package/ghostscript/ghostscript.mk +++ b/package/ghostscript/ghostscript.mk @@ -21,6 +21,9 @@ GHOSTSCRIPT_DEPENDENCIES = \ libpng \ tiff +# 0002-Bug-704342-Include-device-specifier-strings-in-acces.patch +GHOSTSCRIPT_IGNORE_CVES += CVE-2021-3781 + # Ghostscript includes (old) copies of several libraries, delete them. # Inspired by linuxfromscratch: # http://www.linuxfromscratch.org/blfs/view/svn/pst/gs.html -- 2.30.2 From 6d6842130b456499d3ff230a3b70cec756cbccd1 Mon Sep 17 00:00:00 2001 From: Peter Korsgaard Date: Wed, 22 Sep 2021 10:53:06 +0200 Subject: [PATCH 07/16] package/libcurl: security bump to version 7.79.1 Fixes the following security issues: - CVE-2021-22945: UAF and double-free in MQTT sending When sending data to an MQTT server, libcurl could in some circumstances erroneously keep a pointer to an already freed memory area and both use that again in a subsequent call to send data and also free it again. https://curl.se/docs/CVE-2021-22945.html - CVE-2021-22946: Protocol downgrade required TLS bypassed A user can tell curl to require a successful upgrade to TLS when speaking to an IMAP, POP3 or FTP server (--ssl-reqd on the command line or CURLOPT_USE_SSL set to CURLUSESSL_CONTROL or CURLUSESSL_ALL with libcurl). This requirement could be bypassed if the server would return a properly crafted but perfectly legitimate response. This flaw would then make curl silently continue its operations without TLS contrary to the instructions and expectations, exposing possibly sensitive data in clear text over the network. https://curl.se/docs/CVE-2021-22946.html - CVE-2021-22947: STARTTLS protocol injection via MITM When curl connects to an IMAP, POP3, SMTP or FTP server to exchange data securely using STARTTLS to upgrade the connection to TLS level, the server can still respond and send back multiple responses before the TLS upgrade. Such multiple "pipelined" responses are cached by curl. curl would then upgrade to TLS but not flush the in-queue of cached responses and instead use and trust the responses it got before the TLS handshake as if they were authenticated. Using this flaw, it allows a Man-In-The-Middle attacker to first inject the fake responses, then pass-through the TLS traffic from the legitimate server and trick curl into sending data back to the user thinking the attacker's injected data comes from the TLS-protected server. Over POP3 and IMAP an attacker can inject fake response data. https://curl.se/docs/CVE-2021-22947.html In addition, 7.79.1 fixes a number of regressions in 7.79.0: https://daniel.haxx.se/blog/2021/09/22/curl-7-79-1-patched-up-and-ready/ Signed-off-by: Peter Korsgaard Signed-off-by: Arnout Vandecappelle (Essensium/Mind) --- package/libcurl/libcurl.hash | 4 ++-- package/libcurl/libcurl.mk | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/package/libcurl/libcurl.hash b/package/libcurl/libcurl.hash index 5e5776d1e3..b13f01c874 100644 --- a/package/libcurl/libcurl.hash +++ b/package/libcurl/libcurl.hash @@ -1,5 +1,5 @@ # Locally calculated after checking pgp signature -# https://curl.se/download/curl-7.78.0.tar.xz.asc +# https://curl.se/download/curl-7.79.1.tar.xz.asc # signed with key 27EDEAF22F3ABCEB50DB9A125CC908FDB71E12C2 -sha256 be42766d5664a739c3974ee3dfbbcbe978a4ccb1fe628bb1d9b59ac79e445fb5 curl-7.78.0.tar.xz +sha256 0606f74b1182ab732a17c11613cbbaf7084f2e6cca432642d0e3ad7c224c3689 curl-7.79.1.tar.xz sha256 6fd1a1c008b5ef4c4741dd188c3f8af6944c14c25afa881eb064f98fb98358e7 COPYING diff --git a/package/libcurl/libcurl.mk b/package/libcurl/libcurl.mk index 4e3c6d4523..a70ebe4113 100644 --- a/package/libcurl/libcurl.mk +++ b/package/libcurl/libcurl.mk @@ -4,7 +4,7 @@ # ################################################################################ -LIBCURL_VERSION = 7.78.0 +LIBCURL_VERSION = 7.79.1 LIBCURL_SOURCE = curl-$(LIBCURL_VERSION).tar.xz LIBCURL_SITE = https://curl.se/download LIBCURL_DEPENDENCIES = host-pkgconf \ -- 2.30.2 From cb18218ad125c1e4c13010c8ee946057ee07103c Mon Sep 17 00:00:00 2001 From: Peter Korsgaard Date: Wed, 22 Sep 2021 13:31:09 +0200 Subject: [PATCH 08/16] package/libsndfile: add security patch for CVE-2021-3246 A heap buffer overflow vulnerability in msadpcm_decode_block of libsndfile 1.0.30 allows attackers to execute arbitrary code via a crafted WAV file. https://nvd.nist.gov/vuln/detail/CVE-2021-3246 Signed-off-by: Peter Korsgaard Signed-off-by: Arnout Vandecappelle (Essensium/Mind) --- ...-ms_adpcm-Fix-and-extend-size-checks.patch | 40 +++++++++++++++++++ package/libsndfile/libsndfile.mk | 3 ++ 2 files changed, 43 insertions(+) create mode 100644 package/libsndfile/0001-ms_adpcm-Fix-and-extend-size-checks.patch diff --git a/package/libsndfile/0001-ms_adpcm-Fix-and-extend-size-checks.patch b/package/libsndfile/0001-ms_adpcm-Fix-and-extend-size-checks.patch new file mode 100644 index 0000000000..edacbda01a --- /dev/null +++ b/package/libsndfile/0001-ms_adpcm-Fix-and-extend-size-checks.patch @@ -0,0 +1,40 @@ +From deb669ee8be55a94565f6f8a6b60890c2e7c6f32 Mon Sep 17 00:00:00 2001 +From: bobsayshilol +Date: Thu, 18 Feb 2021 21:52:09 +0000 +Subject: [PATCH] ms_adpcm: Fix and extend size checks + +'blockalign' is the size of a block, and each block contains 7 samples +per channel as part of the preamble, so check against 'samplesperblock' +rather than 'blockalign'. Also add an additional check that the block +is big enough to hold the samples it claims to hold. + +https://bugs.chromium.org/p/oss-fuzz/issues/detail?id=26803 +Signed-off-by: Peter Korsgaard +--- + src/ms_adpcm.c | 10 ++++++++-- + 1 file changed, 8 insertions(+), 2 deletions(-) + +diff --git a/src/ms_adpcm.c b/src/ms_adpcm.c +index 5e8f1a31..a21cb994 100644 +--- a/src/ms_adpcm.c ++++ b/src/ms_adpcm.c +@@ -128,8 +128,14 @@ wavlike_msadpcm_init (SF_PRIVATE *psf, int blockalign, int samplesperblock) + if (psf->file.mode == SFM_WRITE) + samplesperblock = 2 + 2 * (blockalign - 7 * psf->sf.channels) / psf->sf.channels ; + +- if (blockalign < 7 * psf->sf.channels) +- { psf_log_printf (psf, "*** Error blockalign (%d) should be > %d.\n", blockalign, 7 * psf->sf.channels) ; ++ /* There's 7 samples per channel in the preamble of each block */ ++ if (samplesperblock < 7 * psf->sf.channels) ++ { psf_log_printf (psf, "*** Error samplesperblock (%d) should be >= %d.\n", samplesperblock, 7 * psf->sf.channels) ; ++ return SFE_INTERNAL ; ++ } ; ++ ++ if (2 * blockalign < samplesperblock * psf->sf.channels) ++ { psf_log_printf (psf, "*** Error blockalign (%d) should be >= %d.\n", blockalign, samplesperblock * psf->sf.channels / 2) ; + return SFE_INTERNAL ; + } ; + +-- +2.20.1 + diff --git a/package/libsndfile/libsndfile.mk b/package/libsndfile/libsndfile.mk index c955b9d088..ed9e8e3d14 100644 --- a/package/libsndfile/libsndfile.mk +++ b/package/libsndfile/libsndfile.mk @@ -12,6 +12,9 @@ LIBSNDFILE_LICENSE = LGPL-2.1+ LIBSNDFILE_LICENSE_FILES = COPYING LIBSNDFILE_CPE_ID_VENDOR = libsndfile_project +# 0001-ms_adpcm-Fix-and-extend-size-checks.patch +LIBSNDFILE_IGNORE_CVES += CVE-2021-3246 + # disputed, https://github.com/erikd/libsndfile/issues/398 LIBSNDFILE_IGNORE_CVES += CVE-2018-13419 -- 2.30.2 From 35f15db30ac769d158fae480668c51a583f9beea Mon Sep 17 00:00:00 2001 From: Petr Vorel Date: Tue, 21 Sep 2021 23:04:37 +0200 Subject: [PATCH 09/16] support: utils: use python3 explicitly Python 2 is EOL sice 2020 [1], it's still available on distros, but may not be installed by default (as being replaced by python3). Thus remove compatibility imports: from __future__ import print_function from __future__ import absolute_import Tested with python3 -m py_compile. [1] https://www.python.org/doc/sunset-python-2/ Signed-off-by: Petr Vorel Signed-off-by: Arnout Vandecappelle (Essensium/Mind) --- support/scripts/cve.py | 2 +- support/scripts/graph-build-time | 2 +- support/scripts/graph-depends | 2 +- support/scripts/pycompile.py | 4 +--- support/scripts/size-stats | 2 +- support/testing/tests/package/sample_gst1_python.py | 2 +- support/testing/tests/package/sample_python_gobject.py | 2 +- utils/check-package | 3 +-- utils/genrandconfig | 4 +--- utils/get-developers | 2 +- utils/getdeveloperlib.py | 1 - utils/size-stats-compare | 2 +- 12 files changed, 11 insertions(+), 17 deletions(-) diff --git a/support/scripts/cve.py b/support/scripts/cve.py index 13c29fabe0..7cd6fce4d8 100755 --- a/support/scripts/cve.py +++ b/support/scripts/cve.py @@ -1,4 +1,4 @@ -#!/usr/bin/env python +#!/usr/bin/env python3 # Copyright (C) 2009 by Thomas Petazzoni # Copyright (C) 2020 by Gregory CLEMENT diff --git a/support/scripts/graph-build-time b/support/scripts/graph-build-time index ba3cdad85b..742c9a7a50 100755 --- a/support/scripts/graph-build-time +++ b/support/scripts/graph-build-time @@ -1,4 +1,4 @@ -#!/usr/bin/env python +#!/usr/bin/env python3 # Copyright (C) 2011 by Thomas Petazzoni # Copyright (C) 2013 by Yann E. MORIN diff --git a/support/scripts/graph-depends b/support/scripts/graph-depends index d42bebce9d..a66fb28f41 100755 --- a/support/scripts/graph-depends +++ b/support/scripts/graph-depends @@ -1,4 +1,4 @@ -#!/usr/bin/env python +#!/usr/bin/env python3 # Usage (the graphviz package must be installed in your distribution) # ./support/scripts/graph-depends [-p package-name] > test.dot diff --git a/support/scripts/pycompile.py b/support/scripts/pycompile.py index b8cd3cee6c..8774144a90 100644 --- a/support/scripts/pycompile.py +++ b/support/scripts/pycompile.py @@ -1,4 +1,4 @@ -#!/usr/bin/env python +#!/usr/bin/env python3 """ Byte compile all .py files from provided directories. This script is an @@ -6,8 +6,6 @@ alternative implementation of compileall.compile_dir written with cross-compilation in mind. """ -from __future__ import print_function - import argparse import os import py_compile diff --git a/support/scripts/size-stats b/support/scripts/size-stats index dea3a6007c..bf3d12a9b7 100755 --- a/support/scripts/size-stats +++ b/support/scripts/size-stats @@ -1,4 +1,4 @@ -#!/usr/bin/env python +#!/usr/bin/env python3 # Copyright (C) 2014 by Thomas Petazzoni diff --git a/support/testing/tests/package/sample_gst1_python.py b/support/testing/tests/package/sample_gst1_python.py index fab7e74f40..2d7e0e1ed9 100644 --- a/support/testing/tests/package/sample_gst1_python.py +++ b/support/testing/tests/package/sample_gst1_python.py @@ -1,4 +1,4 @@ -#!/usr/bin/env python +#!/usr/bin/env python3 """A simple test that uses gst1-python to run a fake videotestsrc for 100 frames """ diff --git a/support/testing/tests/package/sample_python_gobject.py b/support/testing/tests/package/sample_python_gobject.py index 50564aa79f..4490a73613 100644 --- a/support/testing/tests/package/sample_python_gobject.py +++ b/support/testing/tests/package/sample_python_gobject.py @@ -1,4 +1,4 @@ -#!/usr/bin/env python +#!/usr/bin/env python3 """A simple test that uses python-gobject to find the path of sh.""" from gi.repository import GLib diff --git a/utils/check-package b/utils/check-package index dd18d19c25..a959fef079 100755 --- a/utils/check-package +++ b/utils/check-package @@ -1,7 +1,6 @@ -#!/usr/bin/env python +#!/usr/bin/env python3 # See utils/checkpackagelib/readme.txt before editing this file. -from __future__ import print_function import argparse import inspect import os diff --git a/utils/genrandconfig b/utils/genrandconfig index 622cfd4891..a1431bf1a8 100755 --- a/utils/genrandconfig +++ b/utils/genrandconfig @@ -1,4 +1,4 @@ -#!/usr/bin/env python +#!/usr/bin/env python3 # Copyright (C) 2014 by Thomas Petazzoni # @@ -18,8 +18,6 @@ # This script generates a random configuration for testing Buildroot. -from __future__ import print_function - import contextlib import csv import os diff --git a/utils/get-developers b/utils/get-developers index 9182b2d85f..22accaf181 100755 --- a/utils/get-developers +++ b/utils/get-developers @@ -1,4 +1,4 @@ -#!/usr/bin/env python +#!/usr/bin/env python3 import argparse import getdeveloperlib diff --git a/utils/getdeveloperlib.py b/utils/getdeveloperlib.py index ce822320f8..438d26d68d 100644 --- a/utils/getdeveloperlib.py +++ b/utils/getdeveloperlib.py @@ -1,4 +1,3 @@ -from __future__ import print_function from io import open import os import re diff --git a/utils/size-stats-compare b/utils/size-stats-compare index a3d7f250c6..422972e488 100755 --- a/utils/size-stats-compare +++ b/utils/size-stats-compare @@ -1,4 +1,4 @@ -#!/usr/bin/env python +#!/usr/bin/env python3 # Copyright (C) 2016 Thomas De Schampheleire -- 2.30.2 From d50290764ea3fd7f7fafd1a10aedbe652689ac29 Mon Sep 17 00:00:00 2001 From: Petr Vorel Date: Tue, 21 Sep 2021 23:04:38 +0200 Subject: [PATCH 10/16] utils/scanpypi: remove python2 compatibility imports ee8b680816 ("utils/scanpypi: use python3 explicitly") started to use python3, thus compatibility can be removed: from __future__ import print_function from __future__ import absolute_import Tested with python3 -m py_compile. Signed-off-by: Petr Vorel Signed-off-by: Arnout Vandecappelle (Essensium/Mind) --- utils/scanpypi | 2 -- 1 file changed, 2 deletions(-) diff --git a/utils/scanpypi b/utils/scanpypi index 9dede4e119..1f3326cf4d 100755 --- a/utils/scanpypi +++ b/utils/scanpypi @@ -6,8 +6,6 @@ Utility for building Buildroot packages for existing PyPI packages Any package built by scanpypi should be manually checked for errors. """ -from __future__ import print_function -from __future__ import absolute_import import argparse import json import sys -- 2.30.2 From 71b83227128be62c169313e85bb8f339f977ad67 Mon Sep 17 00:00:00 2001 From: Romain Naour Date: Sun, 12 Sep 2021 16:11:35 +0200 Subject: [PATCH 11/16] support/docker: bump docker image for the gitlab-ci to Debian bullseye Starting with Qemu 6.1.0, gcc 7.5 is needed to build. Since we build host-qemu package for qemu defconfig, we have to upgrade to (at least) Debian buster that provide gcc 8 as host compiler. While testing this upgrate, the test_edk2 failed since it actually requires Qemu >= 4.1.0 to support arm SBSA reference machine [1]. Debian Buster only provide Qemu 3.1. Finally, upgrade to Debian bullseye but it requires some linux kernel version bump in several defconfigs since host gcc is based on gcc-10 [2]. [1] https://git.qemu.org/?p=qemu.git;a=commit;h=64580903c2b3aee08d74d64e6248a313b246cb69 [2] http://git.kernel.org/cgit/linux/kernel/git/stable/linux-stable.git/commit/?id=621f2ded601546119fabccd1651b1ae29d26cd38 Signed-off-by: Romain Naour [Arnout: don't install python] Signed-off-by: Arnout Vandecappelle (Essensium/Mind) --- support/docker/Dockerfile | 2 +- support/docker/apt-sources.list | 8 ++++---- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/support/docker/Dockerfile b/support/docker/Dockerfile index a9bacca3a0..2aee129668 100644 --- a/support/docker/Dockerfile +++ b/support/docker/Dockerfile @@ -6,7 +6,7 @@ # We use a specific tag for the base image *and* the corresponding date # for the repository., so do not forget to update the apt-sources.list # file that is shipped next to this Dockerfile. -FROM debian:stretch-20171210 +FROM debian:bullseye-20210902 LABEL maintainer="Buildroot mailing list " \ vendor="Buildroot" \ diff --git a/support/docker/apt-sources.list b/support/docker/apt-sources.list index 789fb8fc17..0f872fd398 100644 --- a/support/docker/apt-sources.list +++ b/support/docker/apt-sources.list @@ -1,4 +1,4 @@ -# Latest just before 20171210T000000Z: -deb [check-valid-until=no] http://snapshot.debian.org/archive/debian/20171209T220346Z/ stretch main -deb [check-valid-until=no] http://snapshot.debian.org/archive/debian/20171209T220346Z/ stretch-updates main -deb [check-valid-until=no] http://snapshot.debian.org/archive/debian-security/20171209T224618Z/ stretch/updates main +# Latest just before 20210817T000000Z: +deb [check-valid-until=no] http://snapshot.debian.org/archive/debian/20210902T205533Z/ bullseye main +deb [check-valid-until=no] http://snapshot.debian.org/archive/debian-security/20210902T193650Z/ bullseye-security main +deb [check-valid-until=no] http://snapshot.debian.org/archive/debian/20210902T205533Z/ bullseye-updates main -- 2.30.2 From 44d5f1d05d9cf9dc03af22ae32d31cb3f647a339 Mon Sep 17 00:00:00 2001 From: Alexey Brodkin Date: Mon, 13 Sep 2021 15:59:11 +0300 Subject: [PATCH 12/16] package/ntp: Fix building with glibc 2.34+ On attempt to build ntp with glibc 2.34 the following error happens: -------------------------------->8------------------------------ In file included from .../output/host/lib/gcc/i586-buildroot-linux-gnu/10.3.0/include-fixed/pthread.h:42, from work_thread.c:13: work_thread.c:45:57: error: missing binary operator before token "(" 45 | #if defined(PTHREAD_STACK_MIN) && THREAD_MINSTACKSIZE < PTHREAD_STACK_MIN | ^~~~~~~~~~~~~~~~~ -------------------------------->8------------------------------ That's because starting from glibc 2.34 PTHREAD_STACK_MIN gets determined dynamically in runtime via sysconf(), see [1]. Original fix proposed by Khem Raj in OpenEmbedded, see [2]. [1] https://sourceware.org/git/?p=glibc.git;a=commit;h=5d98a7dae955bafa6740c26eaba9c86060ae0344 [2] https://github.com/openembedded/meta-openembedded/commit/7055c764c83150f9310ce04bcfb19330460582fc Suggested-by: Artem Panfilov Signed-off-by: Alexey Brodkin Signed-off-by: Arnout Vandecappelle (Essensium/Mind) --- ...o-not-use-PTHREAD_STACK_MIN-on-glibc.patch | 33 +++++++++++++++++++ 1 file changed, 33 insertions(+) create mode 100644 package/ntp/0004-libntp-Do-not-use-PTHREAD_STACK_MIN-on-glibc.patch diff --git a/package/ntp/0004-libntp-Do-not-use-PTHREAD_STACK_MIN-on-glibc.patch b/package/ntp/0004-libntp-Do-not-use-PTHREAD_STACK_MIN-on-glibc.patch new file mode 100644 index 0000000000..da03ad4aac --- /dev/null +++ b/package/ntp/0004-libntp-Do-not-use-PTHREAD_STACK_MIN-on-glibc.patch @@ -0,0 +1,33 @@ +From 082a504cfcc046c3d8adaae1164268bc94e5108a Mon Sep 17 00:00:00 2001 +From: Khem Raj +Date: Sat, 31 Jul 2021 10:51:41 -0700 +Subject: [PATCH] libntp: Do not use PTHREAD_STACK_MIN on glibc + +In glibc 2.34+ PTHREAD_STACK_MIN is not a compile-time constant which +could mean different stack sizes at runtime on different architectures +and it also causes compile failure. Default glibc thread stack size +or 64Kb set by ntp should be good in glibc these days. + +Signed-off-by: Khem Raj +[Copied from https://github.com/openembedded/meta-openembedded/blob/master/meta-networking/recipes-support/ntp/ntp/0001-libntp-Do-not-use-PTHREAD_STACK_MIN-on-glibc.patch] +Signed-off-by: Alexey Brodkin +--- + libntp/work_thread.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/libntp/work_thread.c b/libntp/work_thread.c +index 03a5647..3ddd751 100644 +--- a/libntp/work_thread.c ++++ b/libntp/work_thread.c +@@ -41,7 +41,7 @@ + #ifndef THREAD_MINSTACKSIZE + # define THREAD_MINSTACKSIZE (64U * 1024) + #endif +-#ifndef __sun ++#if !defined(__sun) && !defined(__GLIBC__) + #if defined(PTHREAD_STACK_MIN) && THREAD_MINSTACKSIZE < PTHREAD_STACK_MIN + # undef THREAD_MINSTACKSIZE + # define THREAD_MINSTACKSIZE PTHREAD_STACK_MIN +-- +2.32.0 + -- 2.30.2 From 4cc074f43f1009bdacba4395bd8b94988064e5b1 Mon Sep 17 00:00:00 2001 From: Fabrice Fontaine Date: Tue, 14 Sep 2021 18:15:11 +0200 Subject: [PATCH 13/16] package/mpv: disable vaapi with DRI driver Build of vaapi with BR2_PACKAGE_MESA3D_DRI_DRIVER is broken since commit 17a7abbafee9bf4a971e00da7870ae439910e47e because vaapi can only be enabled with x11, wayland or egl-drm (https://github.com/mpv-player/mpv/blob/ec0006bfa1aaf608a7141929f2871c89ac7a15d6/wscript#L632): 'deps': 'libdl && (x11 || wayland || egl-drm)', As a result, despite what is being displayed in the autobuilder log message, the build failure is not related to X11 but to the fact that we try to enable vaapi through a DRI driver but without egl. Fixes: - http://autobuild.buildroot.org/results/5ae706e94eb6e5a3aa69368f81c5d12e608b1a5a Signed-off-by: Fabrice Fontaine Signed-off-by: Arnout Vandecappelle (Essensium/Mind) --- package/mpv/Config.in | 2 +- package/mpv/mpv.mk | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/package/mpv/Config.in b/package/mpv/Config.in index 51c9799de8..81b1e24b5f 100644 --- a/package/mpv/Config.in +++ b/package/mpv/Config.in @@ -1,6 +1,6 @@ config BR2_PACKAGE_MPV_SUPPORTS_VAAPI bool - default y if BR2_PACKAGE_LIBDRM && BR2_PACKAGE_MESA3D_GBM + default y if BR2_PACKAGE_LIBDRM && BR2_PACKAGE_MESA3D_OPENGL_EGL default y if BR2_PACKAGE_WAYLAND default y if BR2_PACKAGE_XORG7 diff --git a/package/mpv/mpv.mk b/package/mpv/mpv.mk index a71a4b3114..ff77f248e5 100644 --- a/package/mpv/mpv.mk +++ b/package/mpv/mpv.mk @@ -184,7 +184,7 @@ endif ifeq ($(BR2_PACKAGE_LIBVA)$(BR2_PACKAGE_MPV_SUPPORTS_VAAPI),yy) MPV_CONF_OPTS += --enable-vaapi MPV_DEPENDENCIES += libva -ifeq ($(BR2_PACKAGE_LIBDRM)$(BR2_PACKAGE_MESA3D_GBM),yy) +ifeq ($(BR2_PACKAGE_LIBDRM)$(BR2_PACKAGE_MESA3D_OPENGL_EGL),yy) MPV_CONF_OPTS += --enable-vaapi-drm else MPV_CONF_OPTS += --disable-vaapi-drm -- 2.30.2 From 98503116b4c0dee6720eb7b12f8ea19e405fd7c3 Mon Sep 17 00:00:00 2001 From: Petr Vorel Date: Tue, 14 Sep 2021 19:22:43 +0200 Subject: [PATCH 14/16] package/busybox: bump version to 1.34.0 * backport fix from 1_34_stable branch * refresh patches Signed-off-by: Petr Vorel Signed-off-by: Arnout Vandecappelle (Essensium/Mind) --- ...route-use-linux-if_packet.h-instead-.patch | 18 ++++++--- ...trip-non-l-arguments-returned-by-pkg.patch | 15 +++---- ...003-udhcp-fix-build-breakage-on-MIPS.patch | 39 +++++++++++++++++++ package/busybox/busybox.hash | 4 +- package/busybox/busybox.mk | 2 +- 5 files changed, 63 insertions(+), 15 deletions(-) create mode 100644 package/busybox/0003-udhcp-fix-build-breakage-on-MIPS.patch diff --git a/package/busybox/0001-networking-libiproute-use-linux-if_packet.h-instead-.patch b/package/busybox/0001-networking-libiproute-use-linux-if_packet.h-instead-.patch index 3aabc96053..9b5eaf89bd 100644 --- a/package/busybox/0001-networking-libiproute-use-linux-if_packet.h-instead-.patch +++ b/package/busybox/0001-networking-libiproute-use-linux-if_packet.h-instead-.patch @@ -1,4 +1,4 @@ -From d4fec31889ad660a58dab633c511221feb66e817 Mon Sep 17 00:00:00 2001 +From 60da1d0763224698008d847eb8ad8d4d8c6f54ff Mon Sep 17 00:00:00 2001 From: Thomas Petazzoni Date: Sat, 5 Oct 2013 15:55:06 +0200 Subject: [PATCH] networking/libiproute: use instead of @@ -14,10 +14,15 @@ This commit fixes the build of iplink with the musl C library. Signed-off-by: Thomas Petazzoni [Gustavo: update for busybox 1.22.0] +Signed-off-by: Petr Vorel +--- + networking/libiproute/iplink.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) -diff -Nura busybox-1.22.0.orig/networking/libiproute/iplink.c busybox-1.22.0/networking/libiproute/iplink.c ---- busybox-1.22.0.orig/networking/libiproute/iplink.c 2014-01-01 09:42:40.301137882 -0300 -+++ busybox-1.22.0/networking/libiproute/iplink.c 2014-01-01 09:43:01.282827700 -0300 +diff --git a/networking/libiproute/iplink.c b/networking/libiproute/iplink.c +index 1a1064bdc..a4c3ad307 100644 +--- a/networking/libiproute/iplink.c ++++ b/networking/libiproute/iplink.c @@ -7,7 +7,7 @@ */ #include @@ -25,5 +30,8 @@ diff -Nura busybox-1.22.0.orig/networking/libiproute/iplink.c busybox-1.22.0/net -#include +#include #include - + #include +-- +2.33.0 + diff --git a/package/busybox/0002-Makefile.flags-strip-non-l-arguments-returned-by-pkg.patch b/package/busybox/0002-Makefile.flags-strip-non-l-arguments-returned-by-pkg.patch index 84435442c9..3a94241043 100644 --- a/package/busybox/0002-Makefile.flags-strip-non-l-arguments-returned-by-pkg.patch +++ b/package/busybox/0002-Makefile.flags-strip-non-l-arguments-returned-by-pkg.patch @@ -1,7 +1,8 @@ -From 67eb23d2be8aba3c474dac81a15b0fa11e5847b7 Mon Sep 17 00:00:00 2001 +From 59daea82e7b5abcdb42a4f97a0109f14d5a774ea Mon Sep 17 00:00:00 2001 From: Thomas Petazzoni Date: Mon, 25 Nov 2013 22:51:53 +0100 -Subject: [PATCH] Makefile.flags: strip non -l arguments returned by pkg-config +Subject: [PATCH] Makefile.flags: strip non -l arguments returned by + pkg-config Signed-off-by: Thomas Petazzoni [yann.morin.1998@free.fr: refresh for 1.29.0] @@ -13,10 +14,10 @@ Signed-off-by: Petr Vorel 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Makefile.flags b/Makefile.flags -index 307afa7..885e323 100644 +index 667481983..88d76efec 100644 --- a/Makefile.flags +++ b/Makefile.flags -@@ -176,7 +176,9 @@ ifeq ($(CONFIG_SELINUX),y) +@@ -180,7 +180,9 @@ ifeq ($(CONFIG_SELINUX),y) SELINUX_PC_MODULES = libselinux libsepol $(eval $(call pkg_check_modules,SELINUX,$(SELINUX_PC_MODULES))) CPPFLAGS += $(SELINUX_CFLAGS) @@ -25,8 +26,8 @@ index 307afa7..885e323 100644 + $(patsubst -l%,%,$(filter -l%,$(SELINUX_LIBS))),\ + $(SELINUX_PC_MODULES:lib%=%)) endif - + ifeq ($(CONFIG_FEATURE_NSLOOKUP_BIG),y) --- -1.8.1.2 +-- +2.33.0 diff --git a/package/busybox/0003-udhcp-fix-build-breakage-on-MIPS.patch b/package/busybox/0003-udhcp-fix-build-breakage-on-MIPS.patch new file mode 100644 index 0000000000..d54d45da43 --- /dev/null +++ b/package/busybox/0003-udhcp-fix-build-breakage-on-MIPS.patch @@ -0,0 +1,39 @@ +From 56824284b749e5b9d568b75d5c5bc471b1814d46 Mon Sep 17 00:00:00 2001 +From: Denys Vlasenko +Date: Fri, 20 Aug 2021 13:33:50 +0200 +Subject: [PATCH] udhcp: fix build breakage on MIPS + +Signed-off-by: Denys Vlasenko +Signed-off-by: Petr Vorel +--- +upstream status: 00adcdb64 ("udhcp: fix build breakage on MIPS") + + networking/udhcp/common.h | 12 ------------ + 1 file changed, 12 deletions(-) + +diff --git a/networking/udhcp/common.h b/networking/udhcp/common.h +index 8c678dd32..ca778dab8 100644 +--- a/networking/udhcp/common.h ++++ b/networking/udhcp/common.h +@@ -304,18 +304,6 @@ void udhcp_dump_packet(struct dhcp_packet *packet) FAST_FUNC; + # define log3s(msg) ((void)0) + #endif + +-#if defined(__mips__) +-/* +- * The 'simple' message functions have a negative impact on the size of the +- * DHCP code when compiled for MIPS, so don't use them in this case. +- */ +-#define bb_simple_info_msg bb_info_msg +-#define bb_simple_error_msg bb_error_msg +-#define bb_simple_perror_msg_and_die bb_perror_msg_and_die +-#undef log1s +-#define log1s log1 +-#endif +- + /*** Other shared functions ***/ + + /* 2nd param is "uint32_t*" */ +-- +2.33.0 + diff --git a/package/busybox/busybox.hash b/package/busybox/busybox.hash index 3e9c30cad0..4782f68819 100644 --- a/package/busybox/busybox.hash +++ b/package/busybox/busybox.hash @@ -1,5 +1,5 @@ -# From https://busybox.net/downloads/busybox-1.33.1.tar.bz2.sha256 -sha256 12cec6bd2b16d8a9446dd16130f2b92982f1819f6e1c5f5887b6db03f5660d28 busybox-1.33.1.tar.bz2 +# From https://busybox.net/downloads/busybox-1.34.0.tar.bz2.sha256 +sha256 ec8d1615edb045b83b81966604759c4d4ac921434ab4011da604f629c06074ce busybox-1.34.0.tar.bz2 # Locally computed sha256 bbfc9843646d483c334664f651c208b9839626891d8f17604db2146962f43548 LICENSE sha256 b5a136ed67798e51fe2e0ca0b2a21cb01b904ff0c9f7d563a6292e276607e58f archival/libarchive/bz/LICENSE diff --git a/package/busybox/busybox.mk b/package/busybox/busybox.mk index 560c4fe7b6..08b5c55c50 100644 --- a/package/busybox/busybox.mk +++ b/package/busybox/busybox.mk @@ -4,7 +4,7 @@ # ################################################################################ -BUSYBOX_VERSION = 1.33.1 +BUSYBOX_VERSION = 1.34.0 BUSYBOX_SITE = https://www.busybox.net/downloads BUSYBOX_SOURCE = busybox-$(BUSYBOX_VERSION).tar.bz2 BUSYBOX_LICENSE = GPL-2.0, bzip2-1.0.4 -- 2.30.2 From d30819f7fc779e2080dfdcced68fd231d085bf4c Mon Sep 17 00:00:00 2001 From: Joel Stanley Date: Tue, 5 May 2020 22:01:24 +0930 Subject: [PATCH 15/16] Add powerpc microwatt target This selects the correct compiler flags so we generate instructions that microwatt supports. Signed-off-by: Joel Stanley --- arch/Config.in.powerpc | 2 ++ package/Makefile.in | 3 +++ 2 files changed, 5 insertions(+) diff --git a/arch/Config.in.powerpc b/arch/Config.in.powerpc index ba56c9c721..03687bedd1 100644 --- a/arch/Config.in.powerpc +++ b/arch/Config.in.powerpc @@ -126,6 +126,8 @@ config BR2_powerpc_power7 config BR2_powerpc_power8 bool "power8" select BR2_POWERPC_CPU_HAS_ALTIVEC +config BR2_powerpc_microwatt + bool "microwatt" endchoice choice diff --git a/package/Makefile.in b/package/Makefile.in index 86db62ba5b..796011dd69 100644 --- a/package/Makefile.in +++ b/package/Makefile.in @@ -93,6 +93,9 @@ ifeq ($(BR2_powerpc_e500mc),y) TARGET_ABI += -mabi=spe -mfloat-gprs=double -Wa,-me500mc endif endif +ifeq ($(BR2_powerpc_microwatt),y) +TARGET_ABI += -mno-vsx -mno-altivec +endif # Use longcalls option for Xtensa globally. # The 'longcalls' option allows calls across a greater range of addresses, -- 2.30.2 From 40613adc61b65659eaef1aefc0ec4cd0f535d78f Mon Sep 17 00:00:00 2001 From: Joel Stanley Date: Fri, 6 Aug 2021 09:51:45 +0930 Subject: [PATCH 16/16] package/glibc: Fixes for CPUs without Altivec and VSX The first three patches are merged upstream to glibc master (after the 2.34 release). The fourth patch is a hack to disable float128 (which breaks normal builds). This should be optionally added when building for microwatt. When building for microwatt, disable VSX and AltiVec as these are not passed on from the TARGET_ABI flags set for all other packges. Signed-off-by: Joel Stanley --- ...e-some-PPC_FEATURE_HAS_VSX-with-PPC_.patch | 458 +++++++++++ ...cacheline-size-before-using-optimise.patch | 91 +++ ...ecks-for-Altivec-and-VSX-in-ifunc-se.patch | 736 ++++++++++++++++++ .../0004-Hack-out-float128-support.patch | 89 +++ package/glibc/glibc.mk | 4 + 5 files changed, 1378 insertions(+) create mode 100644 package/glibc/2.34-9-g9acab0bba6a5a57323b1f94bf95b21618a9e5aa4/0001-powerpc64-Replace-some-PPC_FEATURE_HAS_VSX-with-PPC_.patch create mode 100644 package/glibc/2.34-9-g9acab0bba6a5a57323b1f94bf95b21618a9e5aa4/0002-powerpc64-Check-cacheline-size-before-using-optimise.patch create mode 100644 package/glibc/2.34-9-g9acab0bba6a5a57323b1f94bf95b21618a9e5aa4/0003-powerpc64-Add-checks-for-Altivec-and-VSX-in-ifunc-se.patch create mode 100644 package/glibc/2.34-9-g9acab0bba6a5a57323b1f94bf95b21618a9e5aa4/0004-Hack-out-float128-support.patch diff --git a/package/glibc/2.34-9-g9acab0bba6a5a57323b1f94bf95b21618a9e5aa4/0001-powerpc64-Replace-some-PPC_FEATURE_HAS_VSX-with-PPC_.patch b/package/glibc/2.34-9-g9acab0bba6a5a57323b1f94bf95b21618a9e5aa4/0001-powerpc64-Replace-some-PPC_FEATURE_HAS_VSX-with-PPC_.patch new file mode 100644 index 0000000000..7360d0f72c --- /dev/null +++ b/package/glibc/2.34-9-g9acab0bba6a5a57323b1f94bf95b21618a9e5aa4/0001-powerpc64-Replace-some-PPC_FEATURE_HAS_VSX-with-PPC_.patch @@ -0,0 +1,458 @@ +From e4ca6de1bc5e4ba3f94cf0c501a293c5bc827b10 Mon Sep 17 00:00:00 2001 +From: Anton Blanchard +Date: Tue, 27 Jul 2021 15:47:49 +1000 +Subject: [PATCH 1/3] powerpc64: Replace some PPC_FEATURE_HAS_VSX with + PPC_FEATURE_ARCH_2_06 + +We use PPC_FEATURE_HAS_VSX to select a number of POWER7 optimised +functions. These functions don't use any VSX instructions, so +PPC_FEATURE_ARCH_2_06 seems like a better fit. + +Reviewed-by: Tulio Magno Quites Machado Filho +Signed-off-by: Joel Stanley +--- + .../powerpc64/multiarch/ifunc-impl-list.c | 38 +++++++++---------- + sysdeps/powerpc/powerpc64/multiarch/memchr.c | 2 +- + sysdeps/powerpc/powerpc64/multiarch/memcmp.c | 2 +- + sysdeps/powerpc/powerpc64/multiarch/memrchr.c | 2 +- + sysdeps/powerpc/powerpc64/multiarch/memset.c | 2 +- + .../powerpc/powerpc64/multiarch/rawmemchr.c | 2 +- + sysdeps/powerpc/powerpc64/multiarch/stpncpy.c | 2 +- + .../powerpc/powerpc64/multiarch/strcasecmp.c | 2 +- + .../powerpc64/multiarch/strcasecmp_l.c | 2 +- + sysdeps/powerpc/powerpc64/multiarch/strchr.c | 2 +- + .../powerpc/powerpc64/multiarch/strchrnul.c | 2 +- + sysdeps/powerpc/powerpc64/multiarch/strcmp.c | 2 +- + sysdeps/powerpc/powerpc64/multiarch/strlen.c | 2 +- + .../powerpc/powerpc64/multiarch/strncase.c | 2 +- + .../powerpc/powerpc64/multiarch/strncase_l.c | 2 +- + sysdeps/powerpc/powerpc64/multiarch/strncmp.c | 2 +- + sysdeps/powerpc/powerpc64/multiarch/strncpy.c | 2 +- + sysdeps/powerpc/powerpc64/multiarch/strnlen.c | 2 +- + sysdeps/powerpc/powerpc64/multiarch/strrchr.c | 2 +- + sysdeps/powerpc/powerpc64/multiarch/strstr.c | 2 +- + 20 files changed, 38 insertions(+), 38 deletions(-) + +diff --git a/sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c b/sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c +index 0acdf22ba374..32564c8f1f25 100644 +--- a/sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c ++++ b/sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c +@@ -95,7 +95,7 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array, + #endif + IFUNC_IMPL_ADD (array, i, memset, hwcap2 & PPC_FEATURE2_ARCH_2_07, + __memset_power8) +- IFUNC_IMPL_ADD (array, i, memset, hwcap & PPC_FEATURE_HAS_VSX, ++ IFUNC_IMPL_ADD (array, i, memset, hwcap & PPC_FEATURE_ARCH_2_06, + __memset_power7) + IFUNC_IMPL_ADD (array, i, memset, hwcap & PPC_FEATURE_ARCH_2_05, + __memset_power6) +@@ -139,7 +139,7 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array, + #endif + IFUNC_IMPL_ADD (array, i, strlen, hwcap2 & PPC_FEATURE2_ARCH_2_07, + __strlen_power8) +- IFUNC_IMPL_ADD (array, i, strlen, hwcap & PPC_FEATURE_HAS_VSX, ++ IFUNC_IMPL_ADD (array, i, strlen, hwcap & PPC_FEATURE_ARCH_2_06, + __strlen_power7) + IFUNC_IMPL_ADD (array, i, strlen, 1, + __strlen_ppc)) +@@ -152,7 +152,7 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array, + #endif + IFUNC_IMPL_ADD (array, i, strncmp, hwcap2 & PPC_FEATURE2_ARCH_2_07, + __strncmp_power8) +- IFUNC_IMPL_ADD (array, i, strncmp, hwcap & PPC_FEATURE_HAS_VSX, ++ IFUNC_IMPL_ADD (array, i, strncmp, hwcap & PPC_FEATURE_ARCH_2_06, + __strncmp_power7) + IFUNC_IMPL_ADD (array, i, strncmp, hwcap & PPC_FEATURE_POWER4, + __strncmp_power4) +@@ -165,7 +165,7 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array, + hwcap2 & PPC_FEATURE2_ARCH_2_07, + __strchr_power8) + IFUNC_IMPL_ADD (array, i, strchr, +- hwcap & PPC_FEATURE_HAS_VSX, ++ hwcap & PPC_FEATURE_ARCH_2_06, + __strchr_power7) + IFUNC_IMPL_ADD (array, i, strchr, 1, + __strchr_ppc)) +@@ -176,7 +176,7 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array, + hwcap2 & PPC_FEATURE2_ARCH_2_07, + __strchrnul_power8) + IFUNC_IMPL_ADD (array, i, strchrnul, +- hwcap & PPC_FEATURE_HAS_VSX, ++ hwcap & PPC_FEATURE_ARCH_2_06, + __strchrnul_power7) + IFUNC_IMPL_ADD (array, i, strchrnul, 1, + __strchrnul_ppc)) +@@ -192,7 +192,7 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array, + #endif + IFUNC_IMPL_ADD (array, i, memcmp, hwcap2 & PPC_FEATURE2_ARCH_2_07, + __memcmp_power8) +- IFUNC_IMPL_ADD (array, i, memcmp, hwcap & PPC_FEATURE_HAS_VSX, ++ IFUNC_IMPL_ADD (array, i, memcmp, hwcap & PPC_FEATURE_ARCH_2_06, + __memcmp_power7) + IFUNC_IMPL_ADD (array, i, memcmp, hwcap & PPC_FEATURE_POWER4, + __memcmp_power4) +@@ -244,7 +244,7 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array, + hwcap2 & PPC_FEATURE2_ARCH_2_07, + __memchr_power8) + IFUNC_IMPL_ADD (array, i, memchr, +- hwcap & PPC_FEATURE_HAS_VSX, ++ hwcap & PPC_FEATURE_ARCH_2_06, + __memchr_power7) + IFUNC_IMPL_ADD (array, i, memchr, 1, + __memchr_ppc)) +@@ -255,7 +255,7 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array, + hwcap2 & PPC_FEATURE2_ARCH_2_07, + __memrchr_power8) + IFUNC_IMPL_ADD (array, i, memrchr, +- hwcap & PPC_FEATURE_HAS_VSX, ++ hwcap & PPC_FEATURE_ARCH_2_06, + __memrchr_power7) + IFUNC_IMPL_ADD (array, i, memrchr, 1, + __memrchr_ppc)) +@@ -272,7 +272,7 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array, + __rawmemchr_power9) + #endif + IFUNC_IMPL_ADD (array, i, rawmemchr, +- hwcap & PPC_FEATURE_HAS_VSX, ++ hwcap & PPC_FEATURE_ARCH_2_06, + __rawmemchr_power7) + IFUNC_IMPL_ADD (array, i, rawmemchr, 1, + __rawmemchr_ppc)) +@@ -282,7 +282,7 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array, + IFUNC_IMPL_ADD (array, i, strnlen, + hwcap2 & PPC_FEATURE2_ARCH_2_07, + __strnlen_power8) +- IFUNC_IMPL_ADD (array, i, strnlen, hwcap & PPC_FEATURE_HAS_VSX, ++ IFUNC_IMPL_ADD (array, i, strnlen, hwcap & PPC_FEATURE_ARCH_2_06, + __strnlen_power7) + IFUNC_IMPL_ADD (array, i, strnlen, 1, + __strnlen_ppc)) +@@ -293,14 +293,14 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array, + hwcap2 & PPC_FEATURE2_ARCH_2_07, + __strcasecmp_power8) + IFUNC_IMPL_ADD (array, i, strcasecmp, +- hwcap & PPC_FEATURE_HAS_VSX, ++ hwcap & PPC_FEATURE_ARCH_2_06, + __strcasecmp_power7) + IFUNC_IMPL_ADD (array, i, strcasecmp, 1, __strcasecmp_ppc)) + + /* Support sysdeps/powerpc/powerpc64/multiarch/strcasecmp_l.c. */ + IFUNC_IMPL (i, name, strcasecmp_l, + IFUNC_IMPL_ADD (array, i, strcasecmp_l, +- hwcap & PPC_FEATURE_HAS_VSX, ++ hwcap & PPC_FEATURE_ARCH_2_06, + __strcasecmp_l_power7) + IFUNC_IMPL_ADD (array, i, strcasecmp_l, 1, + __strcasecmp_l_ppc)) +@@ -311,14 +311,14 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array, + hwcap2 & PPC_FEATURE2_ARCH_2_07, + __strncasecmp_power8) + IFUNC_IMPL_ADD (array, i, strncasecmp, +- hwcap & PPC_FEATURE_HAS_VSX, ++ hwcap & PPC_FEATURE_ARCH_2_06, + __strncasecmp_power7) + IFUNC_IMPL_ADD (array, i, strncasecmp, 1, __strncasecmp_ppc)) + + /* Support sysdeps/powerpc/powerpc64/multiarch/strncase_l.c. */ + IFUNC_IMPL (i, name, strncasecmp_l, + IFUNC_IMPL_ADD (array, i, strncasecmp_l, +- hwcap & PPC_FEATURE_HAS_VSX, ++ hwcap & PPC_FEATURE_ARCH_2_06, + __strncasecmp_l_power7) + IFUNC_IMPL_ADD (array, i, strncasecmp_l, 1, + __strncasecmp_l_ppc)) +@@ -329,7 +329,7 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array, + hwcap2 & PPC_FEATURE2_ARCH_2_07, + __strrchr_power8) + IFUNC_IMPL_ADD (array, i, strrchr, +- hwcap & PPC_FEATURE_HAS_VSX, ++ hwcap & PPC_FEATURE_ARCH_2_06, + __strrchr_power7) + IFUNC_IMPL_ADD (array, i, strrchr, 1, + __strrchr_ppc)) +@@ -357,7 +357,7 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array, + hwcap2 & PPC_FEATURE2_ARCH_2_07, + __strncpy_power8) + IFUNC_IMPL_ADD (array, i, strncpy, +- hwcap & PPC_FEATURE_HAS_VSX, ++ hwcap & PPC_FEATURE_ARCH_2_06, + __strncpy_power7) + IFUNC_IMPL_ADD (array, i, strncpy, 1, + __strncpy_ppc)) +@@ -374,7 +374,7 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array, + hwcap2 & PPC_FEATURE2_ARCH_2_07, + __stpncpy_power8) + IFUNC_IMPL_ADD (array, i, stpncpy, +- hwcap & PPC_FEATURE_HAS_VSX, ++ hwcap & PPC_FEATURE_ARCH_2_06, + __stpncpy_power7) + IFUNC_IMPL_ADD (array, i, stpncpy, 1, + __stpncpy_ppc)) +@@ -390,7 +390,7 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array, + hwcap2 & PPC_FEATURE2_ARCH_2_07, + __strcmp_power8) + IFUNC_IMPL_ADD (array, i, strcmp, +- hwcap & PPC_FEATURE_HAS_VSX, ++ hwcap & PPC_FEATURE_ARCH_2_06, + __strcmp_power7) + IFUNC_IMPL_ADD (array, i, strcmp, 1, + __strcmp_ppc)) +@@ -425,7 +425,7 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array, + /* Support sysdeps/powerpc/powerpc64/multiarch/strstr.c. */ + IFUNC_IMPL (i, name, strstr, + IFUNC_IMPL_ADD (array, i, strstr, +- hwcap & PPC_FEATURE_HAS_VSX, ++ hwcap & PPC_FEATURE_ARCH_2_06, + __strstr_power7) + IFUNC_IMPL_ADD (array, i, strstr, 1, + __strstr_ppc)) +diff --git a/sysdeps/powerpc/powerpc64/multiarch/memchr.c b/sysdeps/powerpc/powerpc64/multiarch/memchr.c +index 0c718d4f1522..c24186689e59 100644 +--- a/sysdeps/powerpc/powerpc64/multiarch/memchr.c ++++ b/sysdeps/powerpc/powerpc64/multiarch/memchr.c +@@ -30,7 +30,7 @@ extern __typeof (__memchr) __memchr_power8 attribute_hidden; + libc_ifunc (__memchr, + (hwcap2 & PPC_FEATURE2_ARCH_2_07) + ? __memchr_power8 : +- (hwcap & PPC_FEATURE_HAS_VSX) ++ (hwcap & PPC_FEATURE_ARCH_2_06) + ? __memchr_power7 + : __memchr_ppc); + +diff --git a/sysdeps/powerpc/powerpc64/multiarch/memcmp.c b/sysdeps/powerpc/powerpc64/multiarch/memcmp.c +index 4fd089aba71c..99559bce26f9 100644 +--- a/sysdeps/powerpc/powerpc64/multiarch/memcmp.c ++++ b/sysdeps/powerpc/powerpc64/multiarch/memcmp.c +@@ -40,7 +40,7 @@ libc_ifunc_redirected (__redirect_memcmp, memcmp, + #endif + (hwcap2 & PPC_FEATURE2_ARCH_2_07) + ? __memcmp_power8 : +- (hwcap & PPC_FEATURE_HAS_VSX) ++ (hwcap & PPC_FEATURE_ARCH_2_06) + ? __memcmp_power7 + : (hwcap & PPC_FEATURE_POWER4) + ? __memcmp_power4 +diff --git a/sysdeps/powerpc/powerpc64/multiarch/memrchr.c b/sysdeps/powerpc/powerpc64/multiarch/memrchr.c +index e06d6468b8bd..16bb6f004214 100644 +--- a/sysdeps/powerpc/powerpc64/multiarch/memrchr.c ++++ b/sysdeps/powerpc/powerpc64/multiarch/memrchr.c +@@ -30,7 +30,7 @@ extern __typeof (__memrchr) __memrchr_power8 attribute_hidden; + libc_ifunc (__memrchr, + (hwcap2 & PPC_FEATURE2_ARCH_2_07) + ? __memrchr_power8 : +- (hwcap & PPC_FEATURE_HAS_VSX) ++ (hwcap & PPC_FEATURE_ARCH_2_06) + ? __memrchr_power7 + : __memrchr_ppc); + +diff --git a/sysdeps/powerpc/powerpc64/multiarch/memset.c b/sysdeps/powerpc/powerpc64/multiarch/memset.c +index 5994bf02e622..c1aa143f607d 100644 +--- a/sysdeps/powerpc/powerpc64/multiarch/memset.c ++++ b/sysdeps/powerpc/powerpc64/multiarch/memset.c +@@ -48,7 +48,7 @@ libc_ifunc (__libc_memset, + # endif + (hwcap2 & PPC_FEATURE2_ARCH_2_07) + ? __memset_power8 : +- (hwcap & PPC_FEATURE_HAS_VSX) ++ (hwcap & PPC_FEATURE_ARCH_2_06) + ? __memset_power7 : + (hwcap & PPC_FEATURE_ARCH_2_05) + ? __memset_power6 : +diff --git a/sysdeps/powerpc/powerpc64/multiarch/rawmemchr.c b/sysdeps/powerpc/powerpc64/multiarch/rawmemchr.c +index c0ffea2b9376..b5d2d3a63542 100644 +--- a/sysdeps/powerpc/powerpc64/multiarch/rawmemchr.c ++++ b/sysdeps/powerpc/powerpc64/multiarch/rawmemchr.c +@@ -41,7 +41,7 @@ libc_ifunc_redirected (__redirect___rawmemchr, __rawmemchr, + (hwcap2 & PPC_FEATURE2_ARCH_3_00) + ? __rawmemchr_power9 : + # endif +- (hwcap & PPC_FEATURE_HAS_VSX) ++ (hwcap & PPC_FEATURE_ARCH_2_06) + ? __rawmemchr_power7 + : __rawmemchr_ppc); + +diff --git a/sysdeps/powerpc/powerpc64/multiarch/stpncpy.c b/sysdeps/powerpc/powerpc64/multiarch/stpncpy.c +index bebd377fd97f..e7035761a72e 100644 +--- a/sysdeps/powerpc/powerpc64/multiarch/stpncpy.c ++++ b/sysdeps/powerpc/powerpc64/multiarch/stpncpy.c +@@ -40,7 +40,7 @@ libc_ifunc_redirected (__redirect___stpncpy, __stpncpy, + # endif + (hwcap2 & PPC_FEATURE2_ARCH_2_07) + ? __stpncpy_power8 +- : (hwcap & PPC_FEATURE_HAS_VSX) ++ : (hwcap & PPC_FEATURE_ARCH_2_06) + ? __stpncpy_power7 + : __stpncpy_ppc); + weak_alias (__stpncpy, stpncpy) +diff --git a/sysdeps/powerpc/powerpc64/multiarch/strcasecmp.c b/sysdeps/powerpc/powerpc64/multiarch/strcasecmp.c +index dcd777440377..55ca6c85c416 100644 +--- a/sysdeps/powerpc/powerpc64/multiarch/strcasecmp.c ++++ b/sysdeps/powerpc/powerpc64/multiarch/strcasecmp.c +@@ -29,7 +29,7 @@ extern __typeof (__strcasecmp) __strcasecmp_power8 attribute_hidden; + libc_ifunc (__libc_strcasecmp, + (hwcap2 & PPC_FEATURE2_ARCH_2_07) + ? __strcasecmp_power8: +- (hwcap & PPC_FEATURE_HAS_VSX) ++ (hwcap & PPC_FEATURE_ARCH_2_06) + ? __strcasecmp_power7 + : __strcasecmp_ppc); + +diff --git a/sysdeps/powerpc/powerpc64/multiarch/strcasecmp_l.c b/sysdeps/powerpc/powerpc64/multiarch/strcasecmp_l.c +index 96a70b8b118c..1afee5d7fd12 100644 +--- a/sysdeps/powerpc/powerpc64/multiarch/strcasecmp_l.c ++++ b/sysdeps/powerpc/powerpc64/multiarch/strcasecmp_l.c +@@ -32,7 +32,7 @@ extern __typeof (__strcasecmp_l) __strcasecmp_l_power7 attribute_hidden; + + extern __typeof (__strcasecmp_l) __libc_strcasecmp_l; + libc_ifunc (__libc_strcasecmp_l, +- (hwcap & PPC_FEATURE_HAS_VSX) ++ (hwcap & PPC_FEATURE_ARCH_2_06) + ? __strcasecmp_l_power7 + : __strcasecmp_l_ppc); + +diff --git a/sysdeps/powerpc/powerpc64/multiarch/strchr.c b/sysdeps/powerpc/powerpc64/multiarch/strchr.c +index ea9ac1134f4e..27c794c6b735 100644 +--- a/sysdeps/powerpc/powerpc64/multiarch/strchr.c ++++ b/sysdeps/powerpc/powerpc64/multiarch/strchr.c +@@ -35,7 +35,7 @@ extern __typeof (strchr) __strchr_power8 attribute_hidden; + libc_ifunc_redirected (__redirect_strchr, strchr, + (hwcap2 & PPC_FEATURE2_ARCH_2_07) + ? __strchr_power8 : +- (hwcap & PPC_FEATURE_HAS_VSX) ++ (hwcap & PPC_FEATURE_ARCH_2_06) + ? __strchr_power7 + : __strchr_ppc); + weak_alias (strchr, index) +diff --git a/sysdeps/powerpc/powerpc64/multiarch/strchrnul.c b/sysdeps/powerpc/powerpc64/multiarch/strchrnul.c +index 4688e7c3f0d4..4a07b4a2420e 100644 +--- a/sysdeps/powerpc/powerpc64/multiarch/strchrnul.c ++++ b/sysdeps/powerpc/powerpc64/multiarch/strchrnul.c +@@ -30,7 +30,7 @@ extern __typeof (__strchrnul) __strchrnul_power8 attribute_hidden; + libc_ifunc (__strchrnul, + (hwcap2 & PPC_FEATURE2_ARCH_2_07) + ? __strchrnul_power8 : +- (hwcap & PPC_FEATURE_HAS_VSX) ++ (hwcap & PPC_FEATURE_ARCH_2_06) + ? __strchrnul_power7 + : __strchrnul_ppc); + +diff --git a/sysdeps/powerpc/powerpc64/multiarch/strcmp.c b/sysdeps/powerpc/powerpc64/multiarch/strcmp.c +index 72f9a639bfbf..4b0b25fff6ea 100644 +--- a/sysdeps/powerpc/powerpc64/multiarch/strcmp.c ++++ b/sysdeps/powerpc/powerpc64/multiarch/strcmp.c +@@ -40,7 +40,7 @@ libc_ifunc_redirected (__redirect_strcmp, strcmp, + # endif + (hwcap2 & PPC_FEATURE2_ARCH_2_07) + ? __strcmp_power8 +- : (hwcap & PPC_FEATURE_HAS_VSX) ++ : (hwcap & PPC_FEATURE_ARCH_2_06) + ? __strcmp_power7 + : __strcmp_ppc); + #endif +diff --git a/sysdeps/powerpc/powerpc64/multiarch/strlen.c b/sysdeps/powerpc/powerpc64/multiarch/strlen.c +index 109c8a90bdfa..0cd1c6faff14 100644 +--- a/sysdeps/powerpc/powerpc64/multiarch/strlen.c ++++ b/sysdeps/powerpc/powerpc64/multiarch/strlen.c +@@ -42,7 +42,7 @@ libc_ifunc (__libc_strlen, + # endif + (hwcap2 & PPC_FEATURE2_ARCH_2_07) + ? __strlen_power8 : +- (hwcap & PPC_FEATURE_HAS_VSX) ++ (hwcap & PPC_FEATURE_ARCH_2_06) + ? __strlen_power7 + : __strlen_ppc); + +diff --git a/sysdeps/powerpc/powerpc64/multiarch/strncase.c b/sysdeps/powerpc/powerpc64/multiarch/strncase.c +index 2013a5d75a54..644046bd742b 100644 +--- a/sysdeps/powerpc/powerpc64/multiarch/strncase.c ++++ b/sysdeps/powerpc/powerpc64/multiarch/strncase.c +@@ -29,7 +29,7 @@ extern __typeof (__strncasecmp) __strncasecmp_power8 attribute_hidden; + libc_ifunc (__libc_strncasecmp, + (hwcap2 & PPC_FEATURE2_ARCH_2_07) + ? __strncasecmp_power8: +- (hwcap & PPC_FEATURE_HAS_VSX) ++ (hwcap & PPC_FEATURE_ARCH_2_06) + ? __strncasecmp_power7 + : __strncasecmp_ppc); + +diff --git a/sysdeps/powerpc/powerpc64/multiarch/strncase_l.c b/sysdeps/powerpc/powerpc64/multiarch/strncase_l.c +index cad6da302dbd..d2d761af7226 100644 +--- a/sysdeps/powerpc/powerpc64/multiarch/strncase_l.c ++++ b/sysdeps/powerpc/powerpc64/multiarch/strncase_l.c +@@ -34,7 +34,7 @@ extern __typeof (__strncasecmp_l) __strncasecmp_l_power7 attribute_hidden; + ifunc symbol properly. */ + extern __typeof (__strncasecmp_l) __libc_strncasecmp_l; + libc_ifunc (__libc_strncasecmp_l, +- (hwcap & PPC_FEATURE_HAS_VSX) ++ (hwcap & PPC_FEATURE_ARCH_2_06) + ? __strncasecmp_l_power7 + : __strncasecmp_l_ppc); + +diff --git a/sysdeps/powerpc/powerpc64/multiarch/strncmp.c b/sysdeps/powerpc/powerpc64/multiarch/strncmp.c +index eef524ddfbd0..1f689e5c05c5 100644 +--- a/sysdeps/powerpc/powerpc64/multiarch/strncmp.c ++++ b/sysdeps/powerpc/powerpc64/multiarch/strncmp.c +@@ -43,7 +43,7 @@ libc_ifunc_redirected (__redirect_strncmp, strncmp, + # endif + (hwcap2 & PPC_FEATURE2_ARCH_2_07) + ? __strncmp_power8 +- : (hwcap & PPC_FEATURE_HAS_VSX) ++ : (hwcap & PPC_FEATURE_ARCH_2_06) + ? __strncmp_power7 + : (hwcap & PPC_FEATURE_POWER4) + ? __strncmp_power4 +diff --git a/sysdeps/powerpc/powerpc64/multiarch/strncpy.c b/sysdeps/powerpc/powerpc64/multiarch/strncpy.c +index 7da9def35862..d4d3463bd196 100644 +--- a/sysdeps/powerpc/powerpc64/multiarch/strncpy.c ++++ b/sysdeps/powerpc/powerpc64/multiarch/strncpy.c +@@ -43,7 +43,7 @@ libc_ifunc_redirected (__redirect_strncpy, strncpy, + # endif + (hwcap2 & PPC_FEATURE2_ARCH_2_07) + ? __strncpy_power8 +- : (hwcap & PPC_FEATURE_HAS_VSX) ++ : (hwcap & PPC_FEATURE_ARCH_2_06) + ? __strncpy_power7 + : __strncpy_ppc); + +diff --git a/sysdeps/powerpc/powerpc64/multiarch/strnlen.c b/sysdeps/powerpc/powerpc64/multiarch/strnlen.c +index 264b7a752d32..baf375a75a1c 100644 +--- a/sysdeps/powerpc/powerpc64/multiarch/strnlen.c ++++ b/sysdeps/powerpc/powerpc64/multiarch/strnlen.c +@@ -31,7 +31,7 @@ extern __typeof (__strnlen) __strnlen_power8 attribute_hidden; + libc_ifunc_redirected (__redirect___strnlen, __strnlen, + (hwcap2 & PPC_FEATURE2_ARCH_2_07) + ? __strnlen_power8 : +- (hwcap & PPC_FEATURE_HAS_VSX) ++ (hwcap & PPC_FEATURE_ARCH_2_06) + ? __strnlen_power7 + : __strnlen_ppc); + weak_alias (__strnlen, strnlen) +diff --git a/sysdeps/powerpc/powerpc64/multiarch/strrchr.c b/sysdeps/powerpc/powerpc64/multiarch/strrchr.c +index bb06b93d19a1..1c9eea1817f5 100644 +--- a/sysdeps/powerpc/powerpc64/multiarch/strrchr.c ++++ b/sysdeps/powerpc/powerpc64/multiarch/strrchr.c +@@ -33,7 +33,7 @@ extern __typeof (strrchr) __strrchr_power8 attribute_hidden; + libc_ifunc_redirected (__redirect_strrchr, strrchr, + (hwcap2 & PPC_FEATURE2_ARCH_2_07) + ? __strrchr_power8 : +- (hwcap & PPC_FEATURE_HAS_VSX) ++ (hwcap & PPC_FEATURE_ARCH_2_06) + ? __strrchr_power7 + : __strrchr_ppc); + weak_alias (strrchr, rindex) +diff --git a/sysdeps/powerpc/powerpc64/multiarch/strstr.c b/sysdeps/powerpc/powerpc64/multiarch/strstr.c +index bb0588844eeb..6582798dda75 100644 +--- a/sysdeps/powerpc/powerpc64/multiarch/strstr.c ++++ b/sysdeps/powerpc/powerpc64/multiarch/strstr.c +@@ -30,7 +30,7 @@ extern __typeof (strstr) __strstr_power7 attribute_hidden; + /* Avoid DWARF definition DIE on ifunc symbol so that GDB can handle + ifunc symbol properly. */ + libc_ifunc_redirected (__redirect_strstr, strstr, +- (hwcap & PPC_FEATURE_HAS_VSX) ++ (hwcap & PPC_FEATURE_ARCH_2_06) + ? __strstr_power7 + : __strstr_ppc); + #endif +-- +2.32.0 + diff --git a/package/glibc/2.34-9-g9acab0bba6a5a57323b1f94bf95b21618a9e5aa4/0002-powerpc64-Check-cacheline-size-before-using-optimise.patch b/package/glibc/2.34-9-g9acab0bba6a5a57323b1f94bf95b21618a9e5aa4/0002-powerpc64-Check-cacheline-size-before-using-optimise.patch new file mode 100644 index 0000000000..c7a4534352 --- /dev/null +++ b/package/glibc/2.34-9-g9acab0bba6a5a57323b1f94bf95b21618a9e5aa4/0002-powerpc64-Check-cacheline-size-before-using-optimise.patch @@ -0,0 +1,91 @@ +From f2a15dd668913c5a1388ba7e1131b25162b2ea75 Mon Sep 17 00:00:00 2001 +From: Anton Blanchard +Date: Tue, 27 Jul 2021 15:47:50 +1000 +Subject: [PATCH 2/3] powerpc64: Check cacheline size before using optimised + memset routines + +A number of optimised memset routines assume the cacheline size is 128B, +so we better check before using them. + +Reviewed-by: Tulio Magno Quites Machado Filho +Signed-off-by: Joel Stanley +--- + .../powerpc64/multiarch/ifunc-impl-list.c | 18 +++++++++++++----- + sysdeps/powerpc/powerpc64/multiarch/memset.c | 15 ++++++++++----- + 2 files changed, 23 insertions(+), 10 deletions(-) + +diff --git a/sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c b/sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c +index 32564c8f1f25..a3fdcd43bd58 100644 +--- a/sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c ++++ b/sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c +@@ -35,6 +35,9 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array, + + unsigned long int hwcap = GLRO(dl_hwcap); + unsigned long int hwcap2 = GLRO(dl_hwcap2); ++#ifdef SHARED ++ int cacheline_size = GLRO(dl_cache_line_size); ++#endif + + /* hwcap contains only the latest supported ISA, the code checks which is + and fills the previous supported ones. */ +@@ -90,16 +93,21 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array, + IFUNC_IMPL_ADD (array, i, memset, + hwcap2 & PPC_FEATURE2_ARCH_3_1 + && hwcap2 & PPC_FEATURE2_HAS_ISEL +- && hwcap & PPC_FEATURE_HAS_VSX, ++ && hwcap & PPC_FEATURE_HAS_VSX ++ && cacheline_size == 128, + __memset_power10) + #endif +- IFUNC_IMPL_ADD (array, i, memset, hwcap2 & PPC_FEATURE2_ARCH_2_07, ++ IFUNC_IMPL_ADD (array, i, memset, hwcap2 & PPC_FEATURE2_ARCH_2_07 ++ && cacheline_size == 128, + __memset_power8) +- IFUNC_IMPL_ADD (array, i, memset, hwcap & PPC_FEATURE_ARCH_2_06, ++ IFUNC_IMPL_ADD (array, i, memset, hwcap & PPC_FEATURE_ARCH_2_06 ++ && cacheline_size == 128, + __memset_power7) +- IFUNC_IMPL_ADD (array, i, memset, hwcap & PPC_FEATURE_ARCH_2_05, ++ IFUNC_IMPL_ADD (array, i, memset, hwcap & PPC_FEATURE_ARCH_2_05 ++ && cacheline_size == 128, + __memset_power6) +- IFUNC_IMPL_ADD (array, i, memset, hwcap & PPC_FEATURE_POWER4, ++ IFUNC_IMPL_ADD (array, i, memset, hwcap & PPC_FEATURE_POWER4 ++ && cacheline_size == 128, + __memset_power4) + IFUNC_IMPL_ADD (array, i, memset, 1, __memset_ppc)) + +diff --git a/sysdeps/powerpc/powerpc64/multiarch/memset.c b/sysdeps/powerpc/powerpc64/multiarch/memset.c +index c1aa143f607d..056e911699b2 100644 +--- a/sysdeps/powerpc/powerpc64/multiarch/memset.c ++++ b/sysdeps/powerpc/powerpc64/multiarch/memset.c +@@ -43,16 +43,21 @@ libc_ifunc (__libc_memset, + # ifdef __LITTLE_ENDIAN__ + (hwcap2 & PPC_FEATURE2_ARCH_3_1 + && hwcap2 & PPC_FEATURE2_HAS_ISEL +- && hwcap & PPC_FEATURE_HAS_VSX) ++ && hwcap & PPC_FEATURE_HAS_VSX ++ && GLRO(dl_cache_line_size) == 128) + ? __memset_power10 : + # endif +- (hwcap2 & PPC_FEATURE2_ARCH_2_07) ++ (hwcap2 & PPC_FEATURE2_ARCH_2_07 ++ && GLRO(dl_cache_line_size) == 128) + ? __memset_power8 : +- (hwcap & PPC_FEATURE_ARCH_2_06) ++ (hwcap & PPC_FEATURE_ARCH_2_06 ++ && GLRO(dl_cache_line_size) == 128) + ? __memset_power7 : +- (hwcap & PPC_FEATURE_ARCH_2_05) ++ (hwcap & PPC_FEATURE_ARCH_2_05 ++ && GLRO(dl_cache_line_size) == 128) + ? __memset_power6 : +- (hwcap & PPC_FEATURE_POWER4) ++ (hwcap & PPC_FEATURE_POWER4 ++ && GLRO(dl_cache_line_size) == 128) + ? __memset_power4 + : __memset_ppc); + +-- +2.32.0 + diff --git a/package/glibc/2.34-9-g9acab0bba6a5a57323b1f94bf95b21618a9e5aa4/0003-powerpc64-Add-checks-for-Altivec-and-VSX-in-ifunc-se.patch b/package/glibc/2.34-9-g9acab0bba6a5a57323b1f94bf95b21618a9e5aa4/0003-powerpc64-Add-checks-for-Altivec-and-VSX-in-ifunc-se.patch new file mode 100644 index 0000000000..89a418f962 --- /dev/null +++ b/package/glibc/2.34-9-g9acab0bba6a5a57323b1f94bf95b21618a9e5aa4/0003-powerpc64-Add-checks-for-Altivec-and-VSX-in-ifunc-se.patch @@ -0,0 +1,736 @@ +From 60b4dd25790342b40e8942e3a4115f511a6b6911 Mon Sep 17 00:00:00 2001 +From: Anton Blanchard +Date: Tue, 27 Jul 2021 15:47:51 +1000 +Subject: [PATCH 3/3] powerpc64: Add checks for Altivec and VSX in ifunc + selection + +We'd like to support processors without Altivec or VSX, so check +the relevant hwcap bits before selecting them. + +Reviewed-by: Tulio Magno Quites Machado Filho +Signed-off-by: Joel Stanley +--- + sysdeps/powerpc/powerpc64/multiarch/bzero.c | 6 +- + .../powerpc64/multiarch/ifunc-impl-list.c | 103 ++++++++++++------ + sysdeps/powerpc/powerpc64/multiarch/memchr.c | 3 +- + sysdeps/powerpc/powerpc64/multiarch/memcmp.c | 3 +- + sysdeps/powerpc/powerpc64/multiarch/memcpy.c | 7 +- + sysdeps/powerpc/powerpc64/multiarch/memmove.c | 3 +- + sysdeps/powerpc/powerpc64/multiarch/mempcpy.c | 3 +- + sysdeps/powerpc/powerpc64/multiarch/memrchr.c | 3 +- + sysdeps/powerpc/powerpc64/multiarch/memset.c | 1 + + .../powerpc/powerpc64/multiarch/rawmemchr.c | 3 +- + sysdeps/powerpc/powerpc64/multiarch/stpcpy.c | 9 +- + .../powerpc/powerpc64/multiarch/strcasecmp.c | 3 +- + .../powerpc/powerpc64/multiarch/strcasestr.c | 3 +- + sysdeps/powerpc/powerpc64/multiarch/strcat.c | 6 +- + sysdeps/powerpc/powerpc64/multiarch/strchr.c | 3 +- + .../powerpc/powerpc64/multiarch/strchrnul.c | 3 +- + sysdeps/powerpc/powerpc64/multiarch/strcmp.c | 3 +- + sysdeps/powerpc/powerpc64/multiarch/strcpy.c | 9 +- + sysdeps/powerpc/powerpc64/multiarch/strcspn.c | 3 +- + sysdeps/powerpc/powerpc64/multiarch/strlen.c | 9 +- + .../powerpc/powerpc64/multiarch/strncase.c | 3 +- + sysdeps/powerpc/powerpc64/multiarch/strncat.c | 6 +- + sysdeps/powerpc/powerpc64/multiarch/strncmp.c | 3 +- + sysdeps/powerpc/powerpc64/multiarch/strnlen.c | 3 +- + sysdeps/powerpc/powerpc64/multiarch/strrchr.c | 3 +- + sysdeps/powerpc/powerpc64/multiarch/strspn.c | 3 +- + 26 files changed, 139 insertions(+), 68 deletions(-) + +diff --git a/sysdeps/powerpc/powerpc64/multiarch/bzero.c b/sysdeps/powerpc/powerpc64/multiarch/bzero.c +index 660d7dc686ec..c8ffbea01cda 100644 +--- a/sysdeps/powerpc/powerpc64/multiarch/bzero.c ++++ b/sysdeps/powerpc/powerpc64/multiarch/bzero.c +@@ -38,11 +38,13 @@ libc_ifunc (__bzero, + && hwcap & PPC_FEATURE_HAS_VSX) + ? __bzero_power10 : + # endif +- (hwcap2 & PPC_FEATURE2_ARCH_2_07) ++ (hwcap2 & PPC_FEATURE2_ARCH_2_07 ++ && hwcap & PPC_FEATURE_HAS_ALTIVEC) + ? __bzero_power8 : + (hwcap & PPC_FEATURE_HAS_VSX) + ? __bzero_power7 : +- (hwcap & PPC_FEATURE_ARCH_2_05) ++ (hwcap & PPC_FEATURE_ARCH_2_05 ++ && hwcap & PPC_FEATURE_HAS_ALTIVEC) + ? __bzero_power6 : + (hwcap & PPC_FEATURE_POWER4) + ? __bzero_power4 +diff --git a/sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c b/sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c +index a3fdcd43bd58..c3e25c59814c 100644 +--- a/sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c ++++ b/sysdeps/powerpc/powerpc64/multiarch/ifunc-impl-list.c +@@ -60,9 +60,11 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array, + && hwcap & PPC_FEATURE_HAS_VSX, + __memcpy_power10) + #endif +- IFUNC_IMPL_ADD (array, i, memcpy, hwcap2 & PPC_FEATURE2_ARCH_2_07, ++ IFUNC_IMPL_ADD (array, i, memcpy, hwcap2 & PPC_FEATURE2_ARCH_2_07 ++ && hwcap & PPC_FEATURE_HAS_ALTIVEC, + __memcpy_power8_cached) +- IFUNC_IMPL_ADD (array, i, memcpy, hwcap & PPC_FEATURE_HAS_VSX, ++ IFUNC_IMPL_ADD (array, i, memcpy, hwcap & PPC_FEATURE_ARCH_2_06 ++ && hwcap & PPC_FEATURE_HAS_ALTIVEC, + __memcpy_power7) + IFUNC_IMPL_ADD (array, i, memcpy, hwcap & PPC_FEATURE_ARCH_2_06, + __memcpy_a2) +@@ -83,7 +85,8 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array, + && hwcap & PPC_FEATURE_HAS_VSX, + __memmove_power10) + #endif +- IFUNC_IMPL_ADD (array, i, memmove, hwcap & PPC_FEATURE_HAS_VSX, ++ IFUNC_IMPL_ADD (array, i, memmove, hwcap & PPC_FEATURE_ARCH_2_06 ++ && hwcap & PPC_FEATURE_HAS_ALTIVEC, + __memmove_power7) + IFUNC_IMPL_ADD (array, i, memmove, 1, __memmove_ppc)) + +@@ -98,6 +101,7 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array, + __memset_power10) + #endif + IFUNC_IMPL_ADD (array, i, memset, hwcap2 & PPC_FEATURE2_ARCH_2_07 ++ && hwcap & PPC_FEATURE_HAS_ALTIVEC + && cacheline_size == 128, + __memset_power8) + IFUNC_IMPL_ADD (array, i, memset, hwcap & PPC_FEATURE_ARCH_2_06 +@@ -114,12 +118,15 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array, + /* Support sysdeps/powerpc/powerpc64/multiarch/strcpy.c. */ + IFUNC_IMPL (i, name, strcpy, + #ifdef __LITTLE_ENDIAN__ +- IFUNC_IMPL_ADD (array, i, strcpy, hwcap2 & PPC_FEATURE2_ARCH_3_00, ++ IFUNC_IMPL_ADD (array, i, strcpy, hwcap2 & PPC_FEATURE2_ARCH_3_00 ++ && hwcap & PPC_FEATURE_HAS_VSX, + __strcpy_power9) + #endif +- IFUNC_IMPL_ADD (array, i, strcpy, hwcap2 & PPC_FEATURE2_ARCH_2_07, ++ IFUNC_IMPL_ADD (array, i, strcpy, hwcap2 & PPC_FEATURE2_ARCH_2_07 ++ && hwcap & PPC_FEATURE_HAS_ALTIVEC, + __strcpy_power8) +- IFUNC_IMPL_ADD (array, i, strcpy, hwcap & PPC_FEATURE_HAS_VSX, ++ IFUNC_IMPL_ADD (array, i, strcpy, hwcap & PPC_FEATURE_ARCH_2_06 ++ && hwcap & PPC_FEATURE_HAS_VSX, + __strcpy_power7) + IFUNC_IMPL_ADD (array, i, strcpy, 1, + __strcpy_ppc)) +@@ -127,12 +134,15 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array, + /* Support sysdeps/powerpc/powerpc64/multiarch/stpcpy.c. */ + IFUNC_IMPL (i, name, stpcpy, + #ifdef __LITTLE_ENDIAN__ +- IFUNC_IMPL_ADD (array, i, stpcpy, hwcap2 & PPC_FEATURE2_ARCH_3_00, ++ IFUNC_IMPL_ADD (array, i, stpcpy, hwcap2 & PPC_FEATURE2_ARCH_3_00 ++ && hwcap & PPC_FEATURE_HAS_VSX, + __stpcpy_power9) + #endif +- IFUNC_IMPL_ADD (array, i, stpcpy, hwcap2 & PPC_FEATURE2_ARCH_2_07, ++ IFUNC_IMPL_ADD (array, i, stpcpy, hwcap2 & PPC_FEATURE2_ARCH_2_07 ++ && hwcap & PPC_FEATURE_HAS_ALTIVEC, + __stpcpy_power8) +- IFUNC_IMPL_ADD (array, i, stpcpy, hwcap & PPC_FEATURE_HAS_VSX, ++ IFUNC_IMPL_ADD (array, i, stpcpy, hwcap & PPC_FEATURE_ARCH_2_06 ++ && hwcap & PPC_FEATURE_HAS_VSX, + __stpcpy_power7) + IFUNC_IMPL_ADD (array, i, stpcpy, 1, + __stpcpy_ppc)) +@@ -140,12 +150,15 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array, + /* Support sysdeps/powerpc/powerpc64/multiarch/strlen.c. */ + IFUNC_IMPL (i, name, strlen, + #ifdef __LITTLE_ENDIAN__ +- IFUNC_IMPL_ADD (array, i, strlen, hwcap2 & PPC_FEATURE2_ARCH_3_1, ++ IFUNC_IMPL_ADD (array, i, strlen, hwcap2 & PPC_FEATURE2_ARCH_3_1 ++ && hwcap & PPC_FEATURE_HAS_VSX, + __strlen_power10) +- IFUNC_IMPL_ADD (array, i, strlen, hwcap2 & PPC_FEATURE2_ARCH_3_00, ++ IFUNC_IMPL_ADD (array, i, strlen, hwcap2 & PPC_FEATURE2_ARCH_3_00 ++ && hwcap & PPC_FEATURE_HAS_VSX, + __strlen_power9) + #endif +- IFUNC_IMPL_ADD (array, i, strlen, hwcap2 & PPC_FEATURE2_ARCH_2_07, ++ IFUNC_IMPL_ADD (array, i, strlen, hwcap2 & PPC_FEATURE2_ARCH_2_07 ++ && hwcap & PPC_FEATURE_HAS_ALTIVEC, + __strlen_power8) + IFUNC_IMPL_ADD (array, i, strlen, hwcap & PPC_FEATURE_ARCH_2_06, + __strlen_power7) +@@ -155,7 +168,8 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array, + /* Support sysdeps/powerpc/powerpc64/multiarch/strncmp.c. */ + IFUNC_IMPL (i, name, strncmp, + #ifdef __LITTLE_ENDIAN__ +- IFUNC_IMPL_ADD (array, i, strncmp, hwcap2 & PPC_FEATURE2_ARCH_3_00, ++ IFUNC_IMPL_ADD (array, i, strncmp, hwcap2 & PPC_FEATURE2_ARCH_3_00 ++ && hwcap & PPC_FEATURE_HAS_ALTIVEC, + __strncmp_power9) + #endif + IFUNC_IMPL_ADD (array, i, strncmp, hwcap2 & PPC_FEATURE2_ARCH_2_07, +@@ -170,7 +184,8 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array, + /* Support sysdeps/powerpc/powerpc64/multiarch/strchr.c. */ + IFUNC_IMPL (i, name, strchr, + IFUNC_IMPL_ADD (array, i, strchr, +- hwcap2 & PPC_FEATURE2_ARCH_2_07, ++ hwcap2 & PPC_FEATURE2_ARCH_2_07 ++ && hwcap & PPC_FEATURE_HAS_ALTIVEC, + __strchr_power8) + IFUNC_IMPL_ADD (array, i, strchr, + hwcap & PPC_FEATURE_ARCH_2_06, +@@ -181,7 +196,8 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array, + /* Support sysdeps/powerpc/powerpc64/multiarch/strchrnul.c. */ + IFUNC_IMPL (i, name, strchrnul, + IFUNC_IMPL_ADD (array, i, strchrnul, +- hwcap2 & PPC_FEATURE2_ARCH_2_07, ++ hwcap2 & PPC_FEATURE2_ARCH_2_07 ++ && hwcap & PPC_FEATURE_HAS_ALTIVEC, + __strchrnul_power8) + IFUNC_IMPL_ADD (array, i, strchrnul, + hwcap & PPC_FEATURE_ARCH_2_06, +@@ -198,7 +214,8 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array, + && hwcap & PPC_FEATURE_HAS_VSX, + __memcmp_power10) + #endif +- IFUNC_IMPL_ADD (array, i, memcmp, hwcap2 & PPC_FEATURE2_ARCH_2_07, ++ IFUNC_IMPL_ADD (array, i, memcmp, hwcap2 & PPC_FEATURE2_ARCH_2_07 ++ && hwcap & PPC_FEATURE_HAS_ALTIVEC, + __memcmp_power8) + IFUNC_IMPL_ADD (array, i, memcmp, hwcap & PPC_FEATURE_ARCH_2_06, + __memcmp_power7) +@@ -215,11 +232,13 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array, + && hwcap & PPC_FEATURE_HAS_VSX, + __bzero_power10) + #endif +- IFUNC_IMPL_ADD (array, i, bzero, hwcap2 & PPC_FEATURE2_ARCH_2_07, ++ IFUNC_IMPL_ADD (array, i, bzero, hwcap2 & PPC_FEATURE2_ARCH_2_07 ++ && hwcap & PPC_FEATURE_HAS_ALTIVEC, + __bzero_power8) + IFUNC_IMPL_ADD (array, i, bzero, hwcap & PPC_FEATURE_HAS_VSX, + __bzero_power7) +- IFUNC_IMPL_ADD (array, i, bzero, hwcap & PPC_FEATURE_ARCH_2_05, ++ IFUNC_IMPL_ADD (array, i, bzero, hwcap & PPC_FEATURE_ARCH_2_05 ++ && hwcap & PPC_FEATURE_HAS_ALTIVEC, + __bzero_power6) + IFUNC_IMPL_ADD (array, i, bzero, hwcap & PPC_FEATURE_POWER4, + __bzero_power4) +@@ -241,7 +260,8 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array, + /* Support sysdeps/powerpc/powerpc64/multiarch/mempcpy.c. */ + IFUNC_IMPL (i, name, mempcpy, + IFUNC_IMPL_ADD (array, i, mempcpy, +- hwcap & PPC_FEATURE_HAS_VSX, ++ hwcap & PPC_FEATURE_ARCH_2_06 ++ && hwcap & PPC_FEATURE_HAS_ALTIVEC, + __mempcpy_power7) + IFUNC_IMPL_ADD (array, i, mempcpy, 1, + __mempcpy_ppc)) +@@ -249,7 +269,8 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array, + /* Support sysdeps/powerpc/powerpc64/multiarch/memchr.c. */ + IFUNC_IMPL (i, name, memchr, + IFUNC_IMPL_ADD (array, i, memchr, +- hwcap2 & PPC_FEATURE2_ARCH_2_07, ++ hwcap2 & PPC_FEATURE2_ARCH_2_07 ++ && hwcap & PPC_FEATURE_HAS_ALTIVEC, + __memchr_power8) + IFUNC_IMPL_ADD (array, i, memchr, + hwcap & PPC_FEATURE_ARCH_2_06, +@@ -260,7 +281,8 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array, + /* Support sysdeps/powerpc/powerpc64/multiarch/memrchr.c. */ + IFUNC_IMPL (i, name, memrchr, + IFUNC_IMPL_ADD (array, i, memrchr, +- hwcap2 & PPC_FEATURE2_ARCH_2_07, ++ hwcap2 & PPC_FEATURE2_ARCH_2_07 ++ && hwcap & PPC_FEATURE_HAS_ALTIVEC, + __memrchr_power8) + IFUNC_IMPL_ADD (array, i, memrchr, + hwcap & PPC_FEATURE_ARCH_2_06, +@@ -276,7 +298,8 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array, + && (hwcap & PPC_FEATURE_HAS_VSX), + __rawmemchr_power10) + IFUNC_IMPL_ADD (array, i, rawmemchr, +- hwcap2 & PPC_FEATURE2_ARCH_3_00, ++ hwcap2 & PPC_FEATURE2_ARCH_3_00 ++ && hwcap & PPC_FEATURE_HAS_VSX, + __rawmemchr_power9) + #endif + IFUNC_IMPL_ADD (array, i, rawmemchr, +@@ -288,7 +311,8 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array, + /* Support sysdeps/powerpc/powerpc64/multiarch/strnlen.c. */ + IFUNC_IMPL (i, name, strnlen, + IFUNC_IMPL_ADD (array, i, strnlen, +- hwcap2 & PPC_FEATURE2_ARCH_2_07, ++ hwcap2 & PPC_FEATURE2_ARCH_2_07 ++ && hwcap & PPC_FEATURE_HAS_ALTIVEC, + __strnlen_power8) + IFUNC_IMPL_ADD (array, i, strnlen, hwcap & PPC_FEATURE_ARCH_2_06, + __strnlen_power7) +@@ -298,7 +322,8 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array, + /* Support sysdeps/powerpc/powerpc64/multiarch/strcasecmp.c. */ + IFUNC_IMPL (i, name, strcasecmp, + IFUNC_IMPL_ADD (array, i, strcasecmp, +- hwcap2 & PPC_FEATURE2_ARCH_2_07, ++ hwcap2 & PPC_FEATURE2_ARCH_2_07 ++ && hwcap & PPC_FEATURE_HAS_ALTIVEC, + __strcasecmp_power8) + IFUNC_IMPL_ADD (array, i, strcasecmp, + hwcap & PPC_FEATURE_ARCH_2_06, +@@ -316,7 +341,8 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array, + /* Support sysdeps/powerpc/powerpc64/multiarch/strncase.c. */ + IFUNC_IMPL (i, name, strncasecmp, + IFUNC_IMPL_ADD (array, i, strncasecmp, +- hwcap2 & PPC_FEATURE2_ARCH_2_07, ++ hwcap2 & PPC_FEATURE2_ARCH_2_07 ++ && hwcap & PPC_FEATURE_HAS_ALTIVEC, + __strncasecmp_power8) + IFUNC_IMPL_ADD (array, i, strncasecmp, + hwcap & PPC_FEATURE_ARCH_2_06, +@@ -334,7 +360,8 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array, + /* Support sysdeps/powerpc/powerpc64/multiarch/strrchr.c. */ + IFUNC_IMPL (i, name, strrchr, + IFUNC_IMPL_ADD (array, i, strrchr, +- hwcap2 & PPC_FEATURE2_ARCH_2_07, ++ hwcap2 & PPC_FEATURE2_ARCH_2_07 ++ && hwcap & PPC_FEATURE_HAS_ALTIVEC, + __strrchr_power8) + IFUNC_IMPL_ADD (array, i, strrchr, + hwcap & PPC_FEATURE_ARCH_2_06, +@@ -345,10 +372,12 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array, + /* Support sysdeps/powerpc/powerpc64/multiarch/strncat.c. */ + IFUNC_IMPL (i, name, strncat, + IFUNC_IMPL_ADD (array, i, strncat, +- hwcap2 & PPC_FEATURE2_ARCH_2_07, ++ hwcap2 & PPC_FEATURE2_ARCH_2_07 ++ && hwcap & PPC_FEATURE_HAS_VSX, + __strncat_power8) + IFUNC_IMPL_ADD (array, i, strncat, +- hwcap & PPC_FEATURE_HAS_VSX, ++ hwcap & PPC_FEATURE_ARCH_2_06 ++ && hwcap & PPC_FEATURE_HAS_VSX, + __strncat_power7) + IFUNC_IMPL_ADD (array, i, strncat, 1, + __strncat_ppc)) +@@ -391,7 +420,8 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array, + IFUNC_IMPL (i, name, strcmp, + #ifdef __LITTLE_ENDIAN__ + IFUNC_IMPL_ADD (array, i, strcmp, +- hwcap2 & PPC_FEATURE2_ARCH_3_00, ++ hwcap2 & PPC_FEATURE2_ARCH_3_00 ++ && hwcap & PPC_FEATURE_HAS_ALTIVEC, + __strcmp_power9) + #endif + IFUNC_IMPL_ADD (array, i, strcmp, +@@ -406,10 +436,12 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array, + /* Support sysdeps/powerpc/powerpc64/multiarch/strcat.c. */ + IFUNC_IMPL (i, name, strcat, + IFUNC_IMPL_ADD (array, i, strcat, +- hwcap2 & PPC_FEATURE2_ARCH_2_07, ++ hwcap2 & PPC_FEATURE2_ARCH_2_07 ++ && hwcap & PPC_FEATURE_HAS_VSX, + __strcat_power8) + IFUNC_IMPL_ADD (array, i, strcat, +- hwcap & PPC_FEATURE_HAS_VSX, ++ hwcap & PPC_FEATURE_ARCH_2_06 ++ && hwcap & PPC_FEATURE_HAS_VSX, + __strcat_power7) + IFUNC_IMPL_ADD (array, i, strcat, 1, + __strcat_ppc)) +@@ -417,7 +449,8 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array, + /* Support sysdeps/powerpc/powerpc64/multiarch/strspn.c. */ + IFUNC_IMPL (i, name, strspn, + IFUNC_IMPL_ADD (array, i, strspn, +- hwcap2 & PPC_FEATURE2_ARCH_2_07, ++ hwcap2 & PPC_FEATURE2_ARCH_2_07 ++ && hwcap & PPC_FEATURE_HAS_VSX, + __strspn_power8) + IFUNC_IMPL_ADD (array, i, strspn, 1, + __strspn_ppc)) +@@ -425,7 +458,8 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array, + /* Support sysdeps/powerpc/powerpc64/multiarch/strcspn.c. */ + IFUNC_IMPL (i, name, strcspn, + IFUNC_IMPL_ADD (array, i, strcspn, +- hwcap2 & PPC_FEATURE2_ARCH_2_07, ++ hwcap2 & PPC_FEATURE2_ARCH_2_07 ++ && hwcap & PPC_FEATURE_HAS_VSX, + __strcspn_power8) + IFUNC_IMPL_ADD (array, i, strcspn, 1, + __strcspn_ppc)) +@@ -442,7 +476,8 @@ __libc_ifunc_impl_list (const char *name, struct libc_ifunc_impl *array, + /* Support sysdeps/powerpc/powerpc64/multiarch/strcasestr.c. */ + IFUNC_IMPL (i, name, strcasestr, + IFUNC_IMPL_ADD (array, i, strcasestr, +- hwcap2 & PPC_FEATURE2_ARCH_2_07, ++ hwcap2 & PPC_FEATURE2_ARCH_2_07 ++ && hwcap & PPC_FEATURE_HAS_ALTIVEC, + __strcasestr_power8) + IFUNC_IMPL_ADD (array, i, strcasestr, 1, + __strcasestr_ppc)) +diff --git a/sysdeps/powerpc/powerpc64/multiarch/memchr.c b/sysdeps/powerpc/powerpc64/multiarch/memchr.c +index c24186689e59..f40013e06113 100644 +--- a/sysdeps/powerpc/powerpc64/multiarch/memchr.c ++++ b/sysdeps/powerpc/powerpc64/multiarch/memchr.c +@@ -28,7 +28,8 @@ extern __typeof (__memchr) __memchr_power8 attribute_hidden; + /* Avoid DWARF definition DIE on ifunc symbol so that GDB can handle + ifunc symbol properly. */ + libc_ifunc (__memchr, +- (hwcap2 & PPC_FEATURE2_ARCH_2_07) ++ (hwcap2 & PPC_FEATURE2_ARCH_2_07 ++ && hwcap & PPC_FEATURE_HAS_ALTIVEC) + ? __memchr_power8 : + (hwcap & PPC_FEATURE_ARCH_2_06) + ? __memchr_power7 +diff --git a/sysdeps/powerpc/powerpc64/multiarch/memcmp.c b/sysdeps/powerpc/powerpc64/multiarch/memcmp.c +index 99559bce26f9..89b56c103bbf 100644 +--- a/sysdeps/powerpc/powerpc64/multiarch/memcmp.c ++++ b/sysdeps/powerpc/powerpc64/multiarch/memcmp.c +@@ -38,7 +38,8 @@ libc_ifunc_redirected (__redirect_memcmp, memcmp, + && hwcap & PPC_FEATURE_HAS_VSX) + ? __memcmp_power10 : + #endif +- (hwcap2 & PPC_FEATURE2_ARCH_2_07) ++ (hwcap2 & PPC_FEATURE2_ARCH_2_07 ++ && hwcap & PPC_FEATURE_HAS_ALTIVEC) + ? __memcmp_power8 : + (hwcap & PPC_FEATURE_ARCH_2_06) + ? __memcmp_power7 +diff --git a/sysdeps/powerpc/powerpc64/multiarch/memcpy.c b/sysdeps/powerpc/powerpc64/multiarch/memcpy.c +index 53ab32ef26c7..684ee064f23f 100644 +--- a/sysdeps/powerpc/powerpc64/multiarch/memcpy.c ++++ b/sysdeps/powerpc/powerpc64/multiarch/memcpy.c +@@ -45,9 +45,12 @@ libc_ifunc (__libc_memcpy, + (hwcap2 & PPC_FEATURE2_ARCH_3_1 && hwcap & PPC_FEATURE_HAS_VSX) + ? __memcpy_power10 : + # endif +- ((hwcap2 & PPC_FEATURE2_ARCH_2_07) && use_cached_memopt) ++ (hwcap2 & PPC_FEATURE2_ARCH_2_07 ++ && hwcap & PPC_FEATURE_HAS_ALTIVEC ++ && use_cached_memopt) + ? __memcpy_power8_cached : +- (hwcap & PPC_FEATURE_HAS_VSX) ++ (hwcap & PPC_FEATURE_ARCH_2_06 ++ && hwcap & PPC_FEATURE_HAS_ALTIVEC) + ? __memcpy_power7 : + (hwcap & PPC_FEATURE_ARCH_2_06) + ? __memcpy_a2 : +diff --git a/sysdeps/powerpc/powerpc64/multiarch/memmove.c b/sysdeps/powerpc/powerpc64/multiarch/memmove.c +index 637b2cbf7f35..50253b4554f9 100644 +--- a/sysdeps/powerpc/powerpc64/multiarch/memmove.c ++++ b/sysdeps/powerpc/powerpc64/multiarch/memmove.c +@@ -41,7 +41,8 @@ libc_ifunc (__libc_memmove, + && hwcap & PPC_FEATURE_HAS_VSX) + ? __memmove_power10 : + #endif +- (hwcap & PPC_FEATURE_HAS_VSX) ++ (hwcap & PPC_FEATURE_ARCH_2_06 ++ && hwcap & PPC_FEATURE_HAS_ALTIVEC) + ? __memmove_power7 + : __memmove_ppc); + +diff --git a/sysdeps/powerpc/powerpc64/multiarch/mempcpy.c b/sysdeps/powerpc/powerpc64/multiarch/mempcpy.c +index b37e0f35b504..563095a5ec98 100644 +--- a/sysdeps/powerpc/powerpc64/multiarch/mempcpy.c ++++ b/sysdeps/powerpc/powerpc64/multiarch/mempcpy.c +@@ -33,7 +33,8 @@ extern __typeof (__mempcpy) __mempcpy_power7 attribute_hidden; + /* Avoid DWARF definition DIE on ifunc symbol so that GDB can handle + ifunc symbol properly. */ + libc_ifunc_redirected (__redirect___mempcpy, __mempcpy, +- (hwcap & PPC_FEATURE_HAS_VSX) ++ (hwcap & PPC_FEATURE_ARCH_2_06 ++ && hwcap & PPC_FEATURE_HAS_ALTIVEC) + ? __mempcpy_power7 + : __mempcpy_ppc); + +diff --git a/sysdeps/powerpc/powerpc64/multiarch/memrchr.c b/sysdeps/powerpc/powerpc64/multiarch/memrchr.c +index 16bb6f004214..a8b985b06a89 100644 +--- a/sysdeps/powerpc/powerpc64/multiarch/memrchr.c ++++ b/sysdeps/powerpc/powerpc64/multiarch/memrchr.c +@@ -28,7 +28,8 @@ extern __typeof (__memrchr) __memrchr_power8 attribute_hidden; + /* Avoid DWARF definition DIE on ifunc symbol so that GDB can handle + ifunc symbol properly. */ + libc_ifunc (__memrchr, +- (hwcap2 & PPC_FEATURE2_ARCH_2_07) ++ (hwcap2 & PPC_FEATURE2_ARCH_2_07 ++ && hwcap & PPC_FEATURE_HAS_ALTIVEC) + ? __memrchr_power8 : + (hwcap & PPC_FEATURE_ARCH_2_06) + ? __memrchr_power7 +diff --git a/sysdeps/powerpc/powerpc64/multiarch/memset.c b/sysdeps/powerpc/powerpc64/multiarch/memset.c +index 056e911699b2..a2bc223bcc91 100644 +--- a/sysdeps/powerpc/powerpc64/multiarch/memset.c ++++ b/sysdeps/powerpc/powerpc64/multiarch/memset.c +@@ -48,6 +48,7 @@ libc_ifunc (__libc_memset, + ? __memset_power10 : + # endif + (hwcap2 & PPC_FEATURE2_ARCH_2_07 ++ && hwcap & PPC_FEATURE_HAS_ALTIVEC + && GLRO(dl_cache_line_size) == 128) + ? __memset_power8 : + (hwcap & PPC_FEATURE_ARCH_2_06 +diff --git a/sysdeps/powerpc/powerpc64/multiarch/rawmemchr.c b/sysdeps/powerpc/powerpc64/multiarch/rawmemchr.c +index b5d2d3a63542..43eb459e025d 100644 +--- a/sysdeps/powerpc/powerpc64/multiarch/rawmemchr.c ++++ b/sysdeps/powerpc/powerpc64/multiarch/rawmemchr.c +@@ -38,7 +38,8 @@ libc_ifunc_redirected (__redirect___rawmemchr, __rawmemchr, + (hwcap2 & PPC_FEATURE2_ARCH_3_1) + && (hwcap & PPC_FEATURE_HAS_VSX) + ? __rawmemchr_power10 : +- (hwcap2 & PPC_FEATURE2_ARCH_3_00) ++ (hwcap2 & PPC_FEATURE2_ARCH_3_00 ++ && hwcap & PPC_FEATURE_HAS_VSX) + ? __rawmemchr_power9 : + # endif + (hwcap & PPC_FEATURE_ARCH_2_06) +diff --git a/sysdeps/powerpc/powerpc64/multiarch/stpcpy.c b/sysdeps/powerpc/powerpc64/multiarch/stpcpy.c +index d4eb4285fc3f..5be413405ee8 100644 +--- a/sysdeps/powerpc/powerpc64/multiarch/stpcpy.c ++++ b/sysdeps/powerpc/powerpc64/multiarch/stpcpy.c +@@ -32,12 +32,15 @@ extern __typeof (__stpcpy) __stpcpy_power9 attribute_hidden; + + libc_ifunc_hidden (__stpcpy, __stpcpy, + # ifdef __LITTLE_ENDIAN__ +- (hwcap2 & PPC_FEATURE2_ARCH_3_00) ++ (hwcap2 & PPC_FEATURE2_ARCH_3_00 ++ && hwcap & PPC_FEATURE_HAS_VSX) + ? __stpcpy_power9 : + # endif +- (hwcap2 & PPC_FEATURE2_ARCH_2_07) ++ (hwcap2 & PPC_FEATURE2_ARCH_2_07 ++ && hwcap & PPC_FEATURE_HAS_ALTIVEC) + ? __stpcpy_power8 +- : (hwcap & PPC_FEATURE_HAS_VSX) ++ : (hwcap & PPC_FEATURE_ARCH_2_06 ++ && hwcap & PPC_FEATURE_HAS_VSX) + ? __stpcpy_power7 + : __stpcpy_ppc); + +diff --git a/sysdeps/powerpc/powerpc64/multiarch/strcasecmp.c b/sysdeps/powerpc/powerpc64/multiarch/strcasecmp.c +index 55ca6c85c416..21ce2d279b99 100644 +--- a/sysdeps/powerpc/powerpc64/multiarch/strcasecmp.c ++++ b/sysdeps/powerpc/powerpc64/multiarch/strcasecmp.c +@@ -27,7 +27,8 @@ extern __typeof (__strcasecmp) __strcasecmp_power7 attribute_hidden; + extern __typeof (__strcasecmp) __strcasecmp_power8 attribute_hidden; + + libc_ifunc (__libc_strcasecmp, +- (hwcap2 & PPC_FEATURE2_ARCH_2_07) ++ (hwcap2 & PPC_FEATURE2_ARCH_2_07 ++ && hwcap & PPC_FEATURE_HAS_ALTIVEC) + ? __strcasecmp_power8: + (hwcap & PPC_FEATURE_ARCH_2_06) + ? __strcasecmp_power7 +diff --git a/sysdeps/powerpc/powerpc64/multiarch/strcasestr.c b/sysdeps/powerpc/powerpc64/multiarch/strcasestr.c +index 7e4bd3b5ac98..5bb301602288 100644 +--- a/sysdeps/powerpc/powerpc64/multiarch/strcasestr.c ++++ b/sysdeps/powerpc/powerpc64/multiarch/strcasestr.c +@@ -27,7 +27,8 @@ extern __typeof (__strcasestr) __strcasestr_power8 attribute_hidden; + /* Avoid DWARF definition DIE on ifunc symbol so that GDB can handle + ifunc symbol properly. */ + libc_ifunc (__strcasestr, +- (hwcap2 & PPC_FEATURE2_ARCH_2_07) ++ (hwcap2 & PPC_FEATURE2_ARCH_2_07 ++ && hwcap & PPC_FEATURE_HAS_ALTIVEC) + ? __strcasestr_power8 + : __strcasestr_ppc); + +diff --git a/sysdeps/powerpc/powerpc64/multiarch/strcat.c b/sysdeps/powerpc/powerpc64/multiarch/strcat.c +index 6d342324c4de..d8d98708249f 100644 +--- a/sysdeps/powerpc/powerpc64/multiarch/strcat.c ++++ b/sysdeps/powerpc/powerpc64/multiarch/strcat.c +@@ -28,9 +28,11 @@ extern __typeof (strcat) __strcat_power8 attribute_hidden; + # undef strcat + + libc_ifunc_redirected (__redirect_strcat, strcat, +- (hwcap2 & PPC_FEATURE2_ARCH_2_07) ++ (hwcap2 & PPC_FEATURE2_ARCH_2_07 ++ && hwcap & PPC_FEATURE_HAS_VSX) + ? __strcat_power8 +- : (hwcap & PPC_FEATURE_HAS_VSX) ++ : (hwcap & PPC_FEATURE_ARCH_2_06 ++ && hwcap & PPC_FEATURE_HAS_VSX) + ? __strcat_power7 + : __strcat_ppc); + #endif +diff --git a/sysdeps/powerpc/powerpc64/multiarch/strchr.c b/sysdeps/powerpc/powerpc64/multiarch/strchr.c +index 27c794c6b735..62b202baf908 100644 +--- a/sysdeps/powerpc/powerpc64/multiarch/strchr.c ++++ b/sysdeps/powerpc/powerpc64/multiarch/strchr.c +@@ -33,7 +33,8 @@ extern __typeof (strchr) __strchr_power8 attribute_hidden; + /* Avoid DWARF definition DIE on ifunc symbol so that GDB can handle + ifunc symbol properly. */ + libc_ifunc_redirected (__redirect_strchr, strchr, +- (hwcap2 & PPC_FEATURE2_ARCH_2_07) ++ (hwcap2 & PPC_FEATURE2_ARCH_2_07 ++ && hwcap & PPC_FEATURE_HAS_ALTIVEC) + ? __strchr_power8 : + (hwcap & PPC_FEATURE_ARCH_2_06) + ? __strchr_power7 +diff --git a/sysdeps/powerpc/powerpc64/multiarch/strchrnul.c b/sysdeps/powerpc/powerpc64/multiarch/strchrnul.c +index 4a07b4a2420e..40e529b9d984 100644 +--- a/sysdeps/powerpc/powerpc64/multiarch/strchrnul.c ++++ b/sysdeps/powerpc/powerpc64/multiarch/strchrnul.c +@@ -28,7 +28,8 @@ extern __typeof (__strchrnul) __strchrnul_power8 attribute_hidden; + /* Avoid DWARF definition DIE on ifunc symbol so that GDB can handle + ifunc symbol properly. */ + libc_ifunc (__strchrnul, +- (hwcap2 & PPC_FEATURE2_ARCH_2_07) ++ (hwcap2 & PPC_FEATURE2_ARCH_2_07 ++ && hwcap & PPC_FEATURE_HAS_ALTIVEC) + ? __strchrnul_power8 : + (hwcap & PPC_FEATURE_ARCH_2_06) + ? __strchrnul_power7 +diff --git a/sysdeps/powerpc/powerpc64/multiarch/strcmp.c b/sysdeps/powerpc/powerpc64/multiarch/strcmp.c +index 4b0b25fff6ea..8132682a992e 100644 +--- a/sysdeps/powerpc/powerpc64/multiarch/strcmp.c ++++ b/sysdeps/powerpc/powerpc64/multiarch/strcmp.c +@@ -35,7 +35,8 @@ extern __typeof (strcmp) __strcmp_power9 attribute_hidden; + + libc_ifunc_redirected (__redirect_strcmp, strcmp, + # ifdef __LITTLE_ENDIAN__ +- (hwcap2 & PPC_FEATURE2_ARCH_3_00) ++ (hwcap2 & PPC_FEATURE2_ARCH_3_00 ++ && hwcap & PPC_FEATURE_HAS_ALTIVEC) + ? __strcmp_power9 : + # endif + (hwcap2 & PPC_FEATURE2_ARCH_2_07) +diff --git a/sysdeps/powerpc/powerpc64/multiarch/strcpy.c b/sysdeps/powerpc/powerpc64/multiarch/strcpy.c +index b733fa5a239c..5af1d45cc17b 100644 +--- a/sysdeps/powerpc/powerpc64/multiarch/strcpy.c ++++ b/sysdeps/powerpc/powerpc64/multiarch/strcpy.c +@@ -32,12 +32,15 @@ extern __typeof (strcpy) __strcpy_power9 attribute_hidden; + + libc_ifunc_redirected (__redirect_strcpy, strcpy, + # ifdef __LITTLE_ENDIAN__ +- (hwcap2 & PPC_FEATURE2_ARCH_3_00) ++ (hwcap2 & PPC_FEATURE2_ARCH_3_00 ++ && hwcap & PPC_FEATURE_HAS_VSX) + ? __strcpy_power9 : + # endif +- (hwcap2 & PPC_FEATURE2_ARCH_2_07) ++ (hwcap2 & PPC_FEATURE2_ARCH_2_07 ++ && hwcap & PPC_FEATURE_HAS_ALTIVEC) + ? __strcpy_power8 +- : (hwcap & PPC_FEATURE_HAS_VSX) ++ : (hwcap & PPC_FEATURE_ARCH_2_06 ++ && hwcap & PPC_FEATURE_HAS_VSX) + ? __strcpy_power7 + : __strcpy_ppc); + #endif +diff --git a/sysdeps/powerpc/powerpc64/multiarch/strcspn.c b/sysdeps/powerpc/powerpc64/multiarch/strcspn.c +index 683aa104d709..8ba01c13b179 100644 +--- a/sysdeps/powerpc/powerpc64/multiarch/strcspn.c ++++ b/sysdeps/powerpc/powerpc64/multiarch/strcspn.c +@@ -27,7 +27,8 @@ extern __typeof (strcspn) __strcspn_ppc attribute_hidden; + extern __typeof (strcspn) __strcspn_power8 attribute_hidden; + + libc_ifunc (__libc_strcspn, +- (hwcap2 & PPC_FEATURE2_ARCH_2_07) ++ (hwcap2 & PPC_FEATURE2_ARCH_2_07 ++ && hwcap & PPC_FEATURE_HAS_VSX) + ? __strcspn_power8 + : __strcspn_ppc); + +diff --git a/sysdeps/powerpc/powerpc64/multiarch/strlen.c b/sysdeps/powerpc/powerpc64/multiarch/strlen.c +index 0cd1c6faff14..f1e28414e0e5 100644 +--- a/sysdeps/powerpc/powerpc64/multiarch/strlen.c ++++ b/sysdeps/powerpc/powerpc64/multiarch/strlen.c +@@ -35,12 +35,15 @@ extern __typeof (__redirect_strlen) __strlen_power10 attribute_hidden; + + libc_ifunc (__libc_strlen, + # ifdef __LITTLE_ENDIAN__ +- (hwcap2 & PPC_FEATURE2_ARCH_3_1) ++ (hwcap2 & PPC_FEATURE2_ARCH_3_1 ++ && hwcap & PPC_FEATURE_HAS_VSX) + ? __strlen_power10 : +- (hwcap2 & PPC_FEATURE2_ARCH_3_00) ++ (hwcap2 & PPC_FEATURE2_ARCH_3_00 ++ && hwcap & PPC_FEATURE_HAS_VSX) + ? __strlen_power9 : + # endif +- (hwcap2 & PPC_FEATURE2_ARCH_2_07) ++ (hwcap2 & PPC_FEATURE2_ARCH_2_07 ++ && hwcap & PPC_FEATURE_HAS_ALTIVEC) + ? __strlen_power8 : + (hwcap & PPC_FEATURE_ARCH_2_06) + ? __strlen_power7 +diff --git a/sysdeps/powerpc/powerpc64/multiarch/strncase.c b/sysdeps/powerpc/powerpc64/multiarch/strncase.c +index 644046bd742b..2802cf2c3f38 100644 +--- a/sysdeps/powerpc/powerpc64/multiarch/strncase.c ++++ b/sysdeps/powerpc/powerpc64/multiarch/strncase.c +@@ -27,7 +27,8 @@ extern __typeof (__strncasecmp) __strncasecmp_power7 attribute_hidden; + extern __typeof (__strncasecmp) __strncasecmp_power8 attribute_hidden; + + libc_ifunc (__libc_strncasecmp, +- (hwcap2 & PPC_FEATURE2_ARCH_2_07) ++ (hwcap2 & PPC_FEATURE2_ARCH_2_07 ++ && hwcap & PPC_FEATURE_HAS_ALTIVEC) + ? __strncasecmp_power8: + (hwcap & PPC_FEATURE_ARCH_2_06) + ? __strncasecmp_power7 +diff --git a/sysdeps/powerpc/powerpc64/multiarch/strncat.c b/sysdeps/powerpc/powerpc64/multiarch/strncat.c +index 0036fca91a1b..9ea294a72db2 100644 +--- a/sysdeps/powerpc/powerpc64/multiarch/strncat.c ++++ b/sysdeps/powerpc/powerpc64/multiarch/strncat.c +@@ -26,9 +26,11 @@ extern __typeof (strncat) __strncat_power7 attribute_hidden; + extern __typeof (strncat) __strncat_power8 attribute_hidden; + + libc_ifunc (strncat, +- (hwcap2 & PPC_FEATURE2_ARCH_2_07) ++ (hwcap2 & PPC_FEATURE2_ARCH_2_07 ++ && hwcap & PPC_FEATURE_HAS_VSX) + ? __strncat_power8 +- : (hwcap & PPC_FEATURE_HAS_VSX) ++ : (hwcap & PPC_FEATURE_ARCH_2_06 ++ && hwcap & PPC_FEATURE_HAS_VSX) + ? __strncat_power7 + : __strncat_ppc); + #endif +diff --git a/sysdeps/powerpc/powerpc64/multiarch/strncmp.c b/sysdeps/powerpc/powerpc64/multiarch/strncmp.c +index 1f689e5c05c5..2d2112285445 100644 +--- a/sysdeps/powerpc/powerpc64/multiarch/strncmp.c ++++ b/sysdeps/powerpc/powerpc64/multiarch/strncmp.c +@@ -38,7 +38,8 @@ extern __typeof (strncmp) __strncmp_power9 attribute_hidden; + ifunc symbol properly. */ + libc_ifunc_redirected (__redirect_strncmp, strncmp, + # ifdef __LITTLE_ENDIAN__ +- (hwcap2 & PPC_FEATURE2_ARCH_3_00) ++ (hwcap2 & PPC_FEATURE2_ARCH_3_00 ++ && hwcap & PPC_FEATURE_HAS_ALTIVEC) + ? __strncmp_power9 : + # endif + (hwcap2 & PPC_FEATURE2_ARCH_2_07) +diff --git a/sysdeps/powerpc/powerpc64/multiarch/strnlen.c b/sysdeps/powerpc/powerpc64/multiarch/strnlen.c +index baf375a75a1c..e68e9d9f8818 100644 +--- a/sysdeps/powerpc/powerpc64/multiarch/strnlen.c ++++ b/sysdeps/powerpc/powerpc64/multiarch/strnlen.c +@@ -29,7 +29,8 @@ extern __typeof (__strnlen) __strnlen_power8 attribute_hidden; + # undef strnlen + # undef __strnlen + libc_ifunc_redirected (__redirect___strnlen, __strnlen, +- (hwcap2 & PPC_FEATURE2_ARCH_2_07) ++ (hwcap2 & PPC_FEATURE2_ARCH_2_07 ++ && hwcap & PPC_FEATURE_HAS_ALTIVEC) + ? __strnlen_power8 : + (hwcap & PPC_FEATURE_ARCH_2_06) + ? __strnlen_power7 +diff --git a/sysdeps/powerpc/powerpc64/multiarch/strrchr.c b/sysdeps/powerpc/powerpc64/multiarch/strrchr.c +index 1c9eea1817f5..7f0cf2a1b754 100644 +--- a/sysdeps/powerpc/powerpc64/multiarch/strrchr.c ++++ b/sysdeps/powerpc/powerpc64/multiarch/strrchr.c +@@ -31,7 +31,8 @@ extern __typeof (strrchr) __strrchr_power8 attribute_hidden; + /* Avoid DWARF definition DIE on ifunc symbol so that GDB can handle + ifunc symbol properly. */ + libc_ifunc_redirected (__redirect_strrchr, strrchr, +- (hwcap2 & PPC_FEATURE2_ARCH_2_07) ++ (hwcap2 & PPC_FEATURE2_ARCH_2_07 ++ && hwcap & PPC_FEATURE_HAS_ALTIVEC) + ? __strrchr_power8 : + (hwcap & PPC_FEATURE_ARCH_2_06) + ? __strrchr_power7 +diff --git a/sysdeps/powerpc/powerpc64/multiarch/strspn.c b/sysdeps/powerpc/powerpc64/multiarch/strspn.c +index 70167a176bc2..7613ab3d55df 100644 +--- a/sysdeps/powerpc/powerpc64/multiarch/strspn.c ++++ b/sysdeps/powerpc/powerpc64/multiarch/strspn.c +@@ -27,7 +27,8 @@ extern __typeof (strspn) __strspn_ppc attribute_hidden; + extern __typeof (strspn) __strspn_power8 attribute_hidden; + + libc_ifunc (__libc_strspn, +- (hwcap2 & PPC_FEATURE2_ARCH_2_07) ++ (hwcap2 & PPC_FEATURE2_ARCH_2_07 ++ && hwcap & PPC_FEATURE_HAS_VSX) + ? __strspn_power8 + : __strspn_ppc); + +-- +2.32.0 + diff --git a/package/glibc/2.34-9-g9acab0bba6a5a57323b1f94bf95b21618a9e5aa4/0004-Hack-out-float128-support.patch b/package/glibc/2.34-9-g9acab0bba6a5a57323b1f94bf95b21618a9e5aa4/0004-Hack-out-float128-support.patch new file mode 100644 index 0000000000..e48e4b865b --- /dev/null +++ b/package/glibc/2.34-9-g9acab0bba6a5a57323b1f94bf95b21618a9e5aa4/0004-Hack-out-float128-support.patch @@ -0,0 +1,89 @@ +From 4b25e59e0f41dd32512f2114b53f8673d3dfb777 Mon Sep 17 00:00:00 2001 +From: Anton Blanchard +Date: Tue, 6 Jul 2021 15:55:53 +1000 +Subject: [PATCH 4/4] Hack out float128 support + +--- + sysdeps/powerpc/powerpc64/le/Implies-before | 4 ++-- + sysdeps/powerpc/powerpc64/le/Makefile | 2 ++ + sysdeps/powerpc/powerpc64/le/configure | 10 +++++----- + sysdeps/powerpc/powerpc64/le/fpu/multiarch/Makefile | 1 + + 4 files changed, 10 insertions(+), 7 deletions(-) + +diff --git a/sysdeps/powerpc/powerpc64/le/Implies-before b/sysdeps/powerpc/powerpc64/le/Implies-before +index 2139f4dae8..8fbed8b898 100644 +--- a/sysdeps/powerpc/powerpc64/le/Implies-before ++++ b/sysdeps/powerpc/powerpc64/le/Implies-before +@@ -1,7 +1,7 @@ + # On PowerPC we use the IBM extended long double format. +-ieee754/ldbl-128ibm-compat ++#ieee754/ldbl-128ibm-compat + ieee754/ldbl-128ibm + ieee754/ldbl-opt + ieee754/dbl-64 + ieee754/flt-32 +-ieee754/float128 ++#ieee754/float128 +diff --git a/sysdeps/powerpc/powerpc64/le/Makefile b/sysdeps/powerpc/powerpc64/le/Makefile +index 7c036b45fc..11f831838e 100644 +--- a/sysdeps/powerpc/powerpc64/le/Makefile ++++ b/sysdeps/powerpc/powerpc64/le/Makefile +@@ -55,6 +55,8 @@ endif # ifeq ($(ibm128-fcts),yes) + # GCC BZ 84914, and marked as will-not-fix. + type-float128-CFLAGS += $(type-ldouble-CFLAGS) + ++type-float128-CFLAGS = ++ + ifeq ($(subdir),math) + # sqrtf128 requires emulation before POWER9. + CPPFLAGS += -I../soft-fp +diff --git a/sysdeps/powerpc/powerpc64/le/configure b/sysdeps/powerpc/powerpc64/le/configure +index 98a4889945..487475a239 100644 +--- a/sysdeps/powerpc/powerpc64/le/configure ++++ b/sysdeps/powerpc/powerpc64/le/configure +@@ -27,9 +27,9 @@ rm -f core conftest.err conftest.$ac_objext conftest.$ac_ext + fi + { $as_echo "$as_me:${as_lineno-$LINENO}: result: $libc_cv_target_power8_ok" >&5 + $as_echo "$libc_cv_target_power8_ok" >&6; } +-if test "$libc_cv_target_power8_ok" != "yes"; then : +- critic_missing="$critic_missing POWER8 or newer is required on powerpc64le." +-fi ++#if test "$libc_cv_target_power8_ok" != "yes"; then : ++ #critic_missing="$critic_missing POWER8 or newer is required on powerpc64le." ++#fi + CFLAGS="$OLD_CFLAGS" + + OLD_CFLAGS="$CFLAGS" +@@ -65,7 +65,7 @@ if ${libc_cv_compiler_powerpc64le_ice+:} false; then : + $as_echo_n "(cached) " >&6 + else + save_CFLAGS="$CFLAGS" +-CFLAGS="$CFLAGS -mabi=ieeelongdouble -Wno-psabi" ++#CFLAGS="$CFLAGS -mabi=ieeelongdouble -Wno-psabi" + cat confdefs.h - <<_ACEOF >conftest.$ac_ext + /* end confdefs.h. */ + +@@ -96,7 +96,7 @@ if ${libc_cv_compiler_powerpc64le_ldbl128_mabi+:} false; then : + $as_echo_n "(cached) " >&6 + else + save_CFLAGS="$CFLAGS" +-CFLAGS="$CFLAGS -mabi=ieeelongdouble -mlong-double-128" ++#CFLAGS="$CFLAGS -mabi=ieeelongdouble -mlong-double-128" + cat confdefs.h - <<_ACEOF >conftest.$ac_ext + /* end confdefs.h. */ + +diff --git a/sysdeps/powerpc/powerpc64/le/fpu/multiarch/Makefile b/sysdeps/powerpc/powerpc64/le/fpu/multiarch/Makefile +index 767805b510..003f4f8460 100644 +--- a/sysdeps/powerpc/powerpc64/le/fpu/multiarch/Makefile ++++ b/sysdeps/powerpc/powerpc64/le/fpu/multiarch/Makefile +@@ -6,6 +6,7 @@ ifeq ($(subdir),math) + ifneq (yes,$(libc-submachine-power9)) + do_f128_multiarch = yes + endif ++do_f128_multiarch = no + + # + # This is an ugly, but contained, mechanism to provide hardware optimized +-- +2.31.1 + diff --git a/package/glibc/glibc.mk b/package/glibc/glibc.mk index c911c29554..d0b6f15ce1 100644 --- a/package/glibc/glibc.mk +++ b/package/glibc/glibc.mk @@ -54,6 +54,10 @@ else ifeq ($(BR2_MIPS_OABI32),y) GLIBC_EXTRA_CFLAGS += -mabi=32 endif +ifeq ($(BR2_powerpc_microwatt),y) +GLIBC_EXTRA_CFLAGS += -mno-altivec -mno-vsx +endif + ifeq ($(BR2_ENABLE_DEBUG),y) GLIBC_EXTRA_CFLAGS += -g endif -- 2.30.2