2019-10-31 |
Giacomo Travaglini | configs: Add baremetal.py example script ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-10-30 |
Giacomo Travaglini | base: Name segments after their index ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-10-22 |
Giacomo Travaglini | configs: Clean setupBootLoader signature ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-10-22 |
Giacomo Travaglini | configs: Do not assume bootmem is a System child ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-10-22 |
Giacomo Travaglini | dev-arm, configs: Using _on_chip_memory for on chip... ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-10-16 |
Giacomo Travaglini | base: Using scoped string in DPRINTFNR ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-10-16 |
Giacomo Travaglini | base: Fix gem5.fast compilation ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-10-15 |
Giacomo Travaglini | dev-arm: Carve out a portion of VExpress_GEM5 for the... ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-10-15 |
Giacomo Travaglini | configs: Add simpleSystem helper to generate devices... ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-10-10 |
Giacomo Travaglini | arch-arm: Move generateDtb to ArmSystem ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-10-10 |
Giacomo Travaglini | dev-arm, configs: Remove RealViewPBX platform ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-10-03 |
Giacomo Travaglini | arch-arm: Annotate CM flag in AA64 CM Instructions ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-10-03 |
Giacomo Travaglini | arch-arm: Set CM bit in DataAbort ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-10-02 |
Giacomo Travaglini | sim: Mark System::getThreadContext method as const ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-10-02 |
Marc Mari Barcelo | dev-arm: Improve fault message on SMMUv3 translation... Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-10-02 |
Marc Mari Barcelo | dev-arm: Fix address used to update the SMMUv3 Walk... Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-10-02 |
Giacomo Travaglini | arch-arm: Create helper for sending events (SEV) ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-19 |
Giacomo Travaglini | dev-arm: Conditionally enable HDLcd when doing DTB... ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-19 |
Giacomo Travaglini | dev-arm: Add HDLcd DTB autogeneration ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-19 |
Giacomo Travaglini | arch-arm: PSTATE.PAN changes should inval cached regs... ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-18 |
Adrian Herrera | system-arm: Add ITS node in platforms/vexpress_gem5_v2_base...
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2019-09-18 |
Giacomo Travaglini | arch-arm: Fix Data Abort ISS when caused by Atomic... ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-18 |
Giacomo Travaglini | arch-arm: ISV bit in DataAbort should check for translation... ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-18 |
Giacomo Travaglini | arch-arm: PSTATE.PAN affecting EL2 only when HCR_EL2... ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-16 |
Giacomo Travaglini | dev-arm: Allow IOMMU binding to HDLcd ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-13 |
Giacomo Travaglini | dev-arm: Store the IOMMU reference from within the... ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-13 |
Giacomo Travaglini | dev: Enable DTB IOMMU binding with a DMA object ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-09 |
Giacomo Travaglini | dev-arm: Reset HPPI when clearing an LPI ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-09 |
Giacomo Travaglini | dev-arm: Add resetHppi method in the GICv3 cpu interface ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-09 |
Giacomo Travaglini | dev-arm: Cleanup GICv3 initialization ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-09 |
Giacomo Travaglini | dev-arm: Initialize GICD_TYPER once at construction... ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-09 |
Giacomo Travaglini | dev-arm: Writes to IGRPEN1_EL3 triggering update ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-09 |
Giacomo Travaglini | dev-arm: Fix GICv3 ITS cmdq wrapping ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-09 |
Giacomo Travaglini | dev-arm: Fix mapping between IGRPEN1_EL3 and IGRPEN1_EL1 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-09 |
Giacomo Travaglini | dev-arm: Implement message-based SPIs ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-07 |
Giacomo Travaglini | dev-arm: Add GICD_SGIR register ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-06 |
Giacomo Travaglini | dev: Enable Terminal output's dump to stdout ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-06 |
Giacomo Travaglini | dev-arm: State update when setting MISCREG_ICC_IGRPENx... ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-06 |
Giacomo Travaglini | arch-arm, dev-arm: MISCREG_ICC_IGRPEN1_EL1 using AA64... ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-06 |
Giacomo Travaglini | arch-arm, dev-arm: MISCREG_ICC_AP1R0_EL1 using AA64... ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-06 |
Giacomo Travaglini | arch-arm, dev-arm: MISCREG_ICC_CTLR_EL1 using AA64... ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-06 |
Giacomo Travaglini | arch-arm: MISCREG_ICC_BPR1_EL1 using AA64 banking
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2019-09-06 |
Giacomo Travaglini | dev-arm: Add read/writeBanked helpers to GICv3 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-06 |
Giacomo Travaglini | arch-arm: Add explicit AArch64 MiscReg banking ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-06 |
Giacomo Travaglini | arch-arm: Use same template across all MSR inst ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-06 |
Giacomo Travaglini | arch-arm: SySDC64 Instructions (CMO) using MiscRegIndex ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-06 |
Giacomo Travaglini | dev-arm: Rewrite ICC_BPR0/ICC_BPR1 handling ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-06 |
Giacomo Travaglini | dev-arm: Add GICv3 unimplemented Hyp Active Priorities... ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-06 |
Giacomo Travaglini | dev-arm: Allow 32-bit access to GITS_TYPER ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-06 |
Giacomo Travaglini | dev-arm: Cpu interface groupEnabled check for global... ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-06 |
Giacomo Travaglini | dev-arm: Check if INTID group is enabled when reading... ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-06 |
Giacomo Travaglini | dev-arm: Writing GICD_CTLR should trigger an update ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-06 |
Giacomo Travaglini | dev-arm: Rewrite GICv3 update ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-06 |
Giacomo Travaglini | dev-arm: Fix GICv3 IGRPMOD writes ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-06 |
Giacomo Travaglini | arch-arm: SGI registers undecoded in AArch32 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-06 |
Giacomo Travaglini | arch-arm: Fix read/setMiscReg for AArch32 GICv3 ICC... ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-06 |
Giacomo Travaglini | dev-arm: Fix SGI generation ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-06 |
Adrian Herrera | dev-arm: Gicv3 ITS device tree autogen Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-06 |
Adrian Herrera | dev-arm: modify GICv3 ITS default addr Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-05 |
Giacomo Travaglini | dev-arm: Improper translation slot release in SMMUv3 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-05 |
Jan-Peter Larsson | dev-arm: Implement invalidateASID in SMMUv3 WalkCache Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-05 |
Adrian Herrera | dev-arm: Implement invalidateVA/VAA in SMMUv3 WalkCache Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-08-30 |
Giacomo Travaglini | arm,kvm: Fix python imports from global namespace ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-08-26 |
Giacomo Travaglini | dev-arm: Fix GICv3 ITS indexing error ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-08-26 |
Giacomo Travaglini | dev-arm: Fix GITS_BASER initialization/access ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-08-22 |
Giacomo Travaglini | dev-arm: Start using GITS_CTLR.quiescent bit ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-08-22 |
Giacomo Travaglini | dev-arm: Allow 32 bit accesses to GITS_C(WRITER/READR... ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-08-22 |
Adrian Herrera | dev-arm,system-arm: missing GICv3 ranges property Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-08-20 |
Giacomo Travaglini | dev-arm: Add redistributor-stride property to GICv3 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-08-20 |
Giacomo Travaglini | arch-arm: Replace occ of opModeToEL(currOpMode/cpsr... ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-08-20 |
Giacomo Travaglini | arch-arm: Replace direct use cpsr.el with currEL helper ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-08-20 |
Giacomo Travaglini | arch-arm: Overload currEL helper with CPSR argument ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-08-20 |
Giacomo Travaglini | arch-arm: Rewrite the currEL helper method to use opModeToEL ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-08-20 |
Giacomo Travaglini | dev-arm: Add GITS_PIDR2 register to the ITS memory map ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-08-20 |
Giacomo Travaglini | dev-arm: Add Gicv3Distributor members for GICv3 GICD_PIDRx ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-08-12 |
Giacomo Travaglini | dev-arm: Enable DTB autogeneration in GICv3 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-08-12 |
Giacomo Travaglini | dev-arm: Fix PCI node's interrupt-map property ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-08-12 |
Giacomo Travaglini | dev-arm: Use FdtState to generate GIC properites ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-08-12 |
Giacomo Travaglini | python: FdtState using interrupt-cells
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2019-08-07 |
Giacomo Travaglini | dev-arm: Perform SMMUv3 CFG Invalidation at device... ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-08-05 |
Giacomo Travaglini | arch-arm: Implement ARMv8.1-PAN, Privileged access... ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-08-05 |
Giacomo Travaglini | arch-arm: Rewrite MSR immediate instruction class ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-07-30 |
Giacomo Travaglini | dev-arm: Rewrite SMMUv3 Commands ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-07-25 |
Giacomo Travaglini | dev-arm: Fix SMMUv3 CMDQ wrapping ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-07-25 |
Giacomo Travaglini | dev-arm: Polish SMMUv3 CMDQ setup ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-07-25 |
Giacomo Travaglini | dev-arm: Define enum masks for SMMU_CR0 register ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-07-25 |
Giacomo Travaglini | dev-arm: TnSZ fields need to be cached in SMMUv3::ConfigCache ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-07-25 |
Giacomo Travaglini | dev-arm: SMMUv3 Table walks using TnSZ ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-07-25 |
Giacomo Travaglini | dev-arm: Use override keyword for SMMUv3 PTOPS ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-07-25 |
Michiel Van Tol | dev-arm: Add 16K granule support to SMMUv3 model
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2019-07-19 |
Giacomo Travaglini | arch-arm: Implement ARMv8.1-HPD, Hierarchical permission... ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-07-19 |
Giacomo Travaglini | arch-arm: Add HPD bit for TCR_EL2/EL3 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-07-19 |
Giacomo Travaglini | arch-arm: Clean Fault generation when processing Long... ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-07-19 |
Matteo Andreozzi | dev-arm: clang compatibility fix, added missing overrides Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-07-18 |
Gabor Dozsa | arch-arm: Add first-/non-faulting load instructions Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-07-18 |
Gabor Dozsa | sim: Add getter to fault virtual address Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-07-17 |
Giacomo Travaglini | arch-arm: Use ExceptionLevel type in TlbEntry ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-07-16 |
Giacomo Travaglini | dev-arm: Fix SMMUv3 ContextDescriptor pointer shift ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-07-16 |
Giacomo Travaglini | cpu: isDrained renamed to isCpuDrained ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-06-28 |
Michiel W. van Tol | base: Add argument to Coroutine class to not run on...
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