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ice40_opt to ignore (* keep *) -ed cells
2019-12-02
David Shah
Merge pull request #1542 from YosysHQ/dave/abc9-loop-fix
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2019-12-01
David Shah
abc9: Fix breaking of SCCs
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-11-22
David Shah
Update CHANGELOG and README
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-11-21
David Shah
sv: Add tests for SV always types
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-11-21
David Shah
proc_dlatch: Add error handling for incorrect always_...
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-11-21
David Shah
sv: Correct parsing of always_comb, always_ff and always_latch
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-11-18
David Shah
memory_collect: Copy attr from RTLIL::Memory to cell
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-11-15
David Shah
ecp5: Use new autoname pass for better cell/net names
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-11-14
David Shah
wreduce: Don't trim zeros or sext when not matching...
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-10-24
David Shah
Merge pull request #1455 from YosysHQ/dave/ultrascaleplus
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2019-10-23
David Shah
ice40: Add post-pnr ICESTORM_RAM model and fix FFs
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-10-23
David Shah
ice40: Support for post-pnr timing simulation
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-10-23
David Shah
xilinx: Add URAM288 mapping for xcup
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-10-23
David Shah
xilinx: Add support for UltraScale[+] BRAM mapping
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-10-20
David Shah
ecp5: Pass -nomfs to abc9
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-10-14
David Shah
Merge pull request #1446 from YosysHQ/dave/ecp5-ioff
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2019-10-11
David Shah
ecp5: Add ECLKBRIDGECS blackbox
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-10-10
David Shah
ecp5: Add attrmvcp to copy syn_useioff to driving FF
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-10-10
David Shah
ecp5: Set syn_useioff on IO FFs to enable packing
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-10-03
David Shah
frontends/ast: code style
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-10-03
David Shah
sv: Improve tests
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-10-03
David Shah
sv: Fix typedefs in blocks
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-10-03
David Shah
sv: Disambiguate interface ports
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-10-03
David Shah
Update CHANGELOG and README
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-10-03
David Shah
sv: Add test scripts for typedefs
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-10-03
David Shah
sv: Fix memories of typedefs
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-10-03
David Shah
sv: Add %expect
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-10-03
David Shah
sv: Add support for memories of a typedef
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-10-03
David Shah
sv: Add support for memory typedefs
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-10-03
David Shah
sv: Fix typedefs in packages
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-10-03
David Shah
sv: Fix typedef parameters
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-10-03
David Shah
sv: Switch parser to glr, prep for typedef
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-10-03
David Shah
Merge pull request #1425 from YosysHQ/dave/ecp5_pdp16
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2019-10-01
David Shah
ecp5: Fix shuffle_enable port
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-10-01
David Shah
ecp5: Add support for mapping 36-bit wide PDP BRAMs
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-09-12
David Shah
Merge pull request #1370 from YosysHQ/dave/equiv_opt_multiclock
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2019-09-11
David Shah
Add equiv_opt -multiclock
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-09-11
David Shah
Merge pull request #1362 from xobs/smtbmc-msvc2-build...
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2019-09-01
David Shah
Merge pull request #1346 from mmicko/fix_ecp5_cells_sim
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2019-08-31
David Shah
ecp5_gsr: Fix typo
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-08-30
David Shah
Merge branch 'master' into xc7dsp
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2019-08-30
David Shah
Merge pull request #1343 from whitequark/diamond-ffs
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2019-08-30
David Shah
ecp5: Add simulation equivalence check for Diamond...
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-08-28
David Shah
Merge pull request #1332 from YosysHQ/dave/ecp5gsr
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2019-08-27
David Shah
ecp5: Add GSR support
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-08-13
David Shah
xilinx: Rework labels for faster Verilator testing
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-08-10
David Shah
Revert "Wrap SB_LUT+SB_CARRY into $__ICE40_CARRY_WRAPPER"
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2019-08-08
David Shah
ecp5: Replace '-dsp' with inverse logic '-nodsp' to...
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-08-08
David Shah
ecp5: Bring up to date with mul2dsp changes
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-08-08
David Shah
Merge branch 'xc7dsp' of github.com:YosysHQ/yosys into...
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2019-08-08
David Shah
DSP48E1 sim model: add SIMD tests
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-08-08
David Shah
DSP48E1 model: test CE inputs
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-08-08
David Shah
DSP48E1 sim model: fix seq tests and add preadder tests
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-08-08
David Shah
DSP48E1 sim model: seq test working
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-08-08
David Shah
DSP48E1 sim model: Comb, no pre-adder, mode working
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-08-08
David Shah
[wip] sim model testing
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-08-08
David Shah
[wip] sim model testing
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-08-07
David Shah
Merge pull request #1260 from YosysHQ/dave/ecp5_cell_fixes
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2019-08-07
David Shah
ecp5: Make cells_sim.v consistent with nextpnr
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-08-07
David Shah
[wip] DSP48E1 sim model improvements
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-08-07
David Shah
Update CHANGELOG
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-08-07
David Shah
Merge pull request #1241 from YosysHQ/clifford/jsonfix
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2019-08-06
David Shah
Merge pull request #1232 from YosysHQ/dave/write_gzip
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2019-08-06
David Shah
[wip] DSP48E1 sim model improvements
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-08-06
David Shah
Add test for writing gzip-compressed files
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-08-06
David Shah
Add support for writing gzip-compressed files
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-08-06
David Shah
[wip] DSP48E1 sim model improvements
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-07-29
David Shah
Merge pull request #1234 from mmicko/fix_gzip_no_exist
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2019-07-27
David Shah
Merge pull request #1226 from YosysHQ/dave/gzip
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2019-07-26
David Shah
Update CHANGELOG
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-07-26
David Shah
Update CHANGELOG
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-07-26
David Shah
verilog_lexer: Increase YY_BUF_SIZE to 65536
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-07-26
David Shah
Fix frontend auto-detection for gzipped input
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-07-26
David Shah
Add support for reading gzip'd input files
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-07-25
David Shah
xilinx: Fix missing cell name underscore in cells_map.v
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-07-19
David Shah
ice40: Fix test_dsp_model.sh
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-07-19
David Shah
ice40/cells_sim.v: Fix sign of J and K partial products
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-07-19
David Shah
ice40/cells_sim.v: LSB of A/B only signed in 8x8 mode
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-07-18
David Shah
Merge pull request #1208 from ZirconiumX/intel_cleanups
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2019-07-18
David Shah
Merge pull request #1207 from ZirconiumX/intel_new_pass_names
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2019-07-18
David Shah
mul2dsp: Lower partial products always have unsigned...
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-07-17
David Shah
Merge pull request #1204 from smunaut/fix_1187
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2019-07-16
David Shah
xilinx: Add correct signed behaviour to DSP48E1 model
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-07-16
David Shah
xilinx: Treat DSP48E1 as 24x17 unsigned for now (actual...
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-07-16
David Shah
mul2dsp: Fix edge case where Y_WIDTH is less than B_WIDTH...
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-07-16
David Shah
mul2dsp: Fix indentation
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-07-09
David Shah
synth_ecp5: Fix typo in copyright header
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-07-09
David Shah
Update CHANGELOG
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-07-09
David Shah
Merge pull request #1153 from YosysHQ/dave/fix_multi_mux
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2019-07-08
David Shah
Merge pull request #1160 from ZirconiumX/cyclone_v
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2019-07-08
David Shah
xc7: Map combinational DSP48E1s
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-07-08
David Shah
mul2dsp: Fix typo
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-07-08
David Shah
Add mul2dsp multiplier splitting rule and ECP5 mapping
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-07-02
David Shah
Merge pull request #1153 from YosysHQ/dave/fix_multi_mux
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2019-07-02
David Shah
memory_dff: Fix checking of feedback mux input when...
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-06-26
David Shah
tests: Check that Icarus can parse arch sim models
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-06-26
David Shah
abc9: Add wire delays to synth_ice40
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-06-21
David Shah
ecp5: Improve mapping of $alu when BI is used
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-06-14
David Shah
ecp5: Add abc9 option
Signed-off-by:
David Shah
<dave@ds0.me>
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2019-06-10
David Shah
Merge pull request #1082 from corecode/u4k
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