2020-05-28 |
Luke Kenneth Casson... | debug-print rd/wr rel in test_alu_compunit
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2020-05-28 |
Luke Kenneth Casson... | add quick test of 3-operand DummyALU in MultiCompALU
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2020-05-28 |
Luke Kenneth Casson... | add 3rd parameter to DummyALU
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2020-05-28 |
Luke Kenneth Casson... | debugging test_alu_compunit.py
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2020-05-28 |
Luke Kenneth Casson... | start on a compunit ALU test
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2020-05-28 |
Luke Kenneth Casson... | update comment
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2020-05-28 |
Luke Kenneth Casson... | remove trick of not setting SO
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2020-05-28 |
Luke Kenneth Casson... | hmm....
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2020-05-27 |
Luke Kenneth Casson... | do not use range(0, x) - just range(x)
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2020-05-27 |
Luke Kenneth Casson... | remove write-block on register zero
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2020-05-27 |
Luke Kenneth Casson... | code-morph, add TODO on OP_RFID, OP_SC, OP_ADDPCIS
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2020-05-27 |
Luke Kenneth Casson... | add LD/ST pipe_data
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2020-05-27 |
Luke Kenneth Casson... | LogicalOutputData does not need XER.so
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2020-05-27 |
Luke Kenneth Casson... | comments
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2020-05-27 |
Luke Kenneth Casson... | remove XER.ca from logical Input Data - not needed
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2020-05-27 |
Luke Kenneth Casson... | cleanup logical main proof
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2020-05-27 |
Luke Kenneth Casson... | check cr0, ov and ca ok signals in ALU main_stage proof
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2020-05-27 |
Luke Kenneth Casson... | add carry-out, overflow and cr0 ok setting in ALU main_stage
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2020-05-27 |
Luke Kenneth Casson... | add SRR0 to TrapInputData
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2020-05-27 |
Luke Kenneth Casson... | add links to bugreports into ALu formal proof as well
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2020-05-27 |
Luke Kenneth Casson... | add links to bugreports into alu output stage proof
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2020-05-27 |
Luke Kenneth Casson... | check reg output Data.ok in shift_rot formal proof
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2020-05-27 |
Luke Kenneth Casson... | rename CROutputData.cr_o to just CROutputData.cr
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2020-05-27 |
Luke Kenneth Casson... | test Data.ok for cr output and full cr output
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2020-05-27 |
Luke Kenneth Casson... | assign and test on Data, TODO add Data.ok checking...
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2020-05-27 |
Luke Kenneth Casson... | make power function unit enum bitmasked
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2020-05-27 |
Luke Kenneth Casson... | add extra INT regs port for now, add Fast Regfile
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2020-05-27 |
Luke Kenneth Casson... | added XER and CR regfiles, using new VirtualRegPort
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2020-05-26 |
Luke Kenneth Casson... | check assertions
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2020-05-26 |
Luke Kenneth Casson... | make read/write regs properly internal
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2020-05-26 |
Luke Kenneth Casson... | add VirtualRegPort test, seems to demonstrate it working
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2020-05-26 |
Luke Kenneth Casson... | remove sync (not needed)
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2020-05-26 |
Luke Kenneth Casson... | get score6600_multi.py working again
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2020-05-26 |
Luke Kenneth Casson... | redo focus of virtual reg port to do only full datawidth...
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2020-05-26 |
Luke Kenneth Casson... | sort-of (maybe) implemented a virtual port on top of...
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2020-05-26 |
Luke Kenneth Casson... | try new variant of VirtualRegFile
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2020-05-26 |
Luke Kenneth Casson... | use nmutil treereduce
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2020-05-26 |
Luke Kenneth Casson... | continue virtual regfile port
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2020-05-26 |
Luke Kenneth Casson... | whitespace, add commentary
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2020-05-25 |
Luke Kenneth Casson... | document shadown inversion
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2020-05-25 |
Luke Kenneth Casson... | update comments on compalu_multi.py
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2020-05-25 |
Luke Kenneth Casson... | add some more stub comments
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2020-05-25 |
Luke Kenneth Casson... | yield blank so test passes
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commit | commitdiff | tree |
2020-05-25 |
Luke Kenneth Casson... | add stubs
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commit | commitdiff | tree |
2020-05-25 |
Luke Kenneth Casson... | add comments
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commit | commitdiff | tree |
2020-05-25 |
Luke Kenneth Casson... | correct links in regfile docstring
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commit | commitdiff | tree |
2020-05-25 |
Luke Kenneth Casson... | document regfiles
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2020-05-25 |
Luke Kenneth Casson... | argh! frickin MACos terminal expanded out to 86x30...
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commit | commitdiff | tree |
2020-05-25 |
Luke Kenneth Casson... | add docstring
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2020-05-25 |
Luke Kenneth Casson... | add INT, SPR and CR regfiles
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2020-05-25 |
Luke Kenneth Casson... | quick addition of zero+immed test to LDSTCompUnit
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2020-05-25 |
Luke Kenneth Casson... | must not do rd-req checking when both imm and zero...
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2020-05-25 |
Luke Kenneth Casson... | add zero immed on LDST, untested
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2020-05-25 |
Luke Kenneth Casson... | comment out invalid test
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commit | commitdiff | tree |
2020-05-25 |
Luke Kenneth Casson... | lots of greater than 80 chars
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2020-05-25 |
Luke Kenneth Casson... | switch out req rel if immediate enabled
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2020-05-25 |
Luke Kenneth Casson... | mention zeroing
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commit | commitdiff | tree |
2020-05-25 |
Luke Kenneth Casson... | add links to pseudocode
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commit | commitdiff | tree |
2020-05-24 |
Luke Kenneth Casson... | spelling
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commit | commitdiff | tree |
2020-05-24 |
Luke Kenneth Casson... | spelling
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commit | commitdiff | tree |
2020-05-24 |
Luke Kenneth Casson... | add comments for SPR pipe_data
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2020-05-24 |
Luke Kenneth Casson... | add SPR pipe_data.py
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commit | commitdiff | tree |
2020-05-24 |
Luke Kenneth Casson... | over 80 char limit
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2020-05-24 |
Luke Kenneth Casson... | add test of reg output, for MFCRF and ISEL
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2020-05-24 |
Luke Kenneth Casson... | add gitignore for branch fu formal
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2020-05-24 |
Luke Kenneth Casson... | add OP_CMPB formal proof
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2020-05-24 |
Luke Kenneth Casson... | split out Popcount into separate module: visually it...
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2020-05-24 |
Luke Kenneth Casson... | copy code for MTMSR from microwatt into comments
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2020-05-24 |
Luke Kenneth Casson... | add links for trap main stage
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2020-05-24 |
Luke Kenneth Casson... | add untested OP_MTMSR and OP_MFMSR
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2020-05-24 |
Luke Kenneth Casson... | update to new CSV files in submodule
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2020-05-24 |
Luke Kenneth Casson... | add MFMSR and MTMSRD enums to Function
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2020-05-24 |
Luke Kenneth Casson... | comment and add links to branch formal proof
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2020-05-24 |
Luke Kenneth Casson... | add copy of bpermd proof to logical formal proof (not...
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2020-05-24 |
Luke Kenneth Casson... | track down overwrite of variable b
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2020-05-24 |
Luke Kenneth Casson... | add stub regfiles.py
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2020-05-24 |
Luke Kenneth Casson... | hmm...
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2020-05-24 |
Luke Kenneth Casson... | add very rapid DummyALU for test purposes in MultiCompUnit
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2020-05-24 |
Luke Kenneth Casson... | comments on branch pipeline
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2020-05-24 |
Luke Kenneth Casson... | convert CR pipeline to Data.ok
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2020-05-24 |
Luke Kenneth Casson... | convert ALU to output Data on int reg
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commit | commitdiff | tree |
2020-05-24 |
Luke Kenneth Casson... | convert logical to output Data on int reg
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commit | commitdiff | tree |
2020-05-24 |
Luke Kenneth Casson... | start using Data in pipelines
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commit | commitdiff | tree |
2020-05-24 |
Luke Kenneth Casson... | cleanup/code-munge on ALU main stage proof
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commit | commitdiff | tree |
2020-05-24 |
Luke Kenneth Casson... | error in alu output stage formal proof setup
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commit | commitdiff | tree |
2020-05-24 |
Luke Kenneth Casson... | output registers need to be Data type (consistently)
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commit | commitdiff | tree |
2020-05-24 |
Luke Kenneth Casson... | spelling mistake in variable
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commit | commitdiff | tree |
2020-05-24 |
Luke Kenneth Casson... | TODO mention OP_MTMSR/OP_MFMSR
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2020-05-24 |
Luke Kenneth Casson... | add RA to trap pipeline, for OP_MTMSR/OP_MFMSR
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commit | commitdiff | tree |
2020-05-24 |
Luke Kenneth Casson... | move docstring to wiki for compunit
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commit | commitdiff | tree |
2020-05-23 |
Luke Kenneth Casson... | add input / output stage missing modules
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commit | commitdiff | tree |
2020-05-23 |
Luke Kenneth Casson... | common function for op zero and op immed
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commit | commitdiff | tree |
2020-05-23 |
Luke Kenneth Casson... | update docs on compunits
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2020-05-23 |
Luke Kenneth Casson... | remove extraneous test_isel
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commit | commitdiff | tree |
2020-05-23 |
Luke Kenneth Casson... | add comments
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commit | commitdiff | tree |
2020-05-23 |
Luke Kenneth Casson... | document purpose of regspec module
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commit | commitdiff | tree |
2020-05-23 |
Luke Kenneth Casson... | split out RegSpecs into separate module
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2020-05-23 |
Luke Kenneth Casson... | add TODO on multi-in multi-out Function Units
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2020-05-23 |
Luke Kenneth Casson... | split out RegSpec API into separate class (TODO: move...
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2020-05-23 |
Luke Kenneth Casson... | add notes on FunctionUnit API
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