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Merge remote-tracking branch 'upstream/master'
2019-02-06
Clifford Wolf
Add missing blackslash-to-slash convertion to smtio...
Signed-off-by:
Clifford Wolf
<clifford@clifford.at>
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2019-01-27
Clifford Wolf
Merge pull request #798 from mmicko/master
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2019-01-27
Clifford Wolf
Merge pull request #800 from whitequark/write_verilog_tribuf
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2019-01-27
Clifford Wolf
Merge branch 'whitequark-write_verilog_keyword'
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2019-01-27
Clifford Wolf
Remove asicworld tests for (unsupported) switch-level...
Signed-off-by:
Clifford Wolf
<clifford@clifford.at>
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2019-01-19
Clifford Wolf
Merge pull request #793 from whitequark/proc_clean_fix_fully_def
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2019-01-17
Clifford Wolf
Cleanups in igloo2 example design
Signed-off-by:
Clifford Wolf
<clifford@clifford.at>
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2019-01-17
Clifford Wolf
Add SF2 IO buffer insertion
Signed-off-by:
Clifford Wolf
<clifford@clifford.at>
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2019-01-17
Clifford Wolf
Improve Igloo2 example
Signed-off-by:
Clifford Wolf
<clifford@clifford.at>
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2019-01-17
Clifford Wolf
Add "synth_sf2 -vlog", fix "synth_sf2 -edif"
Signed-off-by:
Clifford Wolf
<clifford@clifford.at>
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2019-01-17
Clifford Wolf
Add "write_edif -gndvccy"
Signed-off-by:
Clifford Wolf
<clifford@clifford.at>
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2019-01-15
Clifford Wolf
Add optional nullstr argument to log_id()
Signed-off-by:
Clifford Wolf
<clifford@clifford.at>
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2019-01-15
Clifford Wolf
Fix handling of $shiftx in Verilog back-end
Signed-off-by:
Clifford Wolf
<clifford@clifford.at>
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2019-01-15
Clifford Wolf
Merge pull request #788 from whitequark/master
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2019-01-15
Clifford Wolf
Merge pull request #787 from whitequark/flowmap_relax
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2019-01-08
Clifford Wolf
Improve igloo2 example
Signed-off-by:
Clifford Wolf
<clifford@clifford.at>
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2019-01-07
Clifford Wolf
Fix typo in manual
Signed-off-by:
Clifford Wolf
<clifford@clifford.at>
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2019-01-07
Clifford Wolf
Bugfix in $memrd sharing
Signed-off-by:
Clifford Wolf
<clifford@clifford.at>
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2019-01-07
Clifford Wolf
Merge pull request #782 from whitequark/flowmap_dfs
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2019-01-07
Clifford Wolf
Switch "bugpoint" from system() to run_command()
Signed-off-by:
Clifford Wolf
<clifford@clifford.at>
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2019-01-07
Clifford Wolf
Merge pull request #783 from whitequark/bugpoint
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2019-01-06
Clifford Wolf
Merge pull request #780 from phire/rename_from_wire
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2019-01-05
Clifford Wolf
Add skeleton Yosys-Libero igloo2 example project
Signed-off-by:
Clifford Wolf
<clifford@clifford.at>
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2019-01-05
Clifford Wolf
Bugfix in Verilog string handling
Signed-off-by:
Clifford Wolf
<clifford@clifford.at>
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2019-01-04
Clifford Wolf
Merge pull request #777 from mmicko/achronix_cell_sim_fix
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2019-01-04
Clifford Wolf
Remove -m32 Verific eval lib build instructions
Signed-off-by:
Clifford Wolf
<clifford@clifford.at>
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2019-01-04
Clifford Wolf
Merge pull request #776 from mmicko/unify_noflatten
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2019-01-04
Clifford Wolf
Update Verific default path
Signed-off-by:
Clifford Wolf
<clifford@clifford.at>
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2019-01-03
Clifford Wolf
Merge pull request #775 from whitequark/opt_flowmap
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2019-01-02
Clifford Wolf
Merge pull request #770 from whitequark/opt_expr_cmp
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2019-01-02
Clifford Wolf
Merge pull request #755 from Icenowy/anlogic-dram-init
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2019-01-02
Clifford Wolf
Merge branch 'master' of github.com:YosysHQ/yosys
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2019-01-02
Clifford Wolf
Merge pull request #750 from Icenowy/anlogic-ff-init
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2019-01-02
Clifford Wolf
Merge pull request #773 from whitequark/opt_lut_elim_fixes
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2019-01-02
Clifford Wolf
Merge pull request #772 from whitequark/synth_lut
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2019-01-02
Clifford Wolf
Merge pull request #771 from whitequark/techmap_cmp2lut
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2019-01-02
Clifford Wolf
Improve VerificImporter support for writes to asymmetric...
Signed-off-by:
Clifford Wolf
<clifford@clifford.at>
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2019-01-02
Clifford Wolf
Fix VerificImporter asymmetric memories error message
Signed-off-by:
Clifford Wolf
<clifford@clifford.at>
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2019-01-02
Clifford Wolf
Merge pull request #769 from whitequark/typos
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2019-01-01
Clifford Wolf
Merge pull request #768 from whitequark/opt_lut_elim
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2018-12-31
Clifford Wolf
Fix handling of (* keep *) wires in wreduce
Signed-off-by:
Clifford Wolf
<clifford@clifford.at>
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2018-12-31
Clifford Wolf
Merge pull request #766 from Icenowy/anlogic-latches
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2018-12-23
Clifford Wolf
Merge pull request #761 from whitequark/proc_clean_partial
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2018-12-23
Clifford Wolf
Add "read_ilang -[no]overwrite"
Signed-off-by:
Clifford Wolf
<clifford@clifford.at>
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2018-12-23
Clifford Wolf
Merge branch 'master' of github.com:YosysHQ/yosys
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2018-12-22
Clifford Wolf
Merge pull request #757 from whitequark/manual_mem
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2018-12-21
Clifford Wolf
Merge pull request #758 from whitequark/tcl_script_args
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2018-12-21
Clifford Wolf
Merge pull request #759 from whitequark/memory_collect_init_x
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2018-12-19
Clifford Wolf
Merge pull request #752 from Icenowy/anlogic-lut-cost
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2018-12-19
Clifford Wolf
Merge pull request #753 from Icenowy/anlogic-makefile-fix
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2018-12-19
Clifford Wolf
Merge pull request #749 from Icenowy/anlogic-dram-fix
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2018-12-18
Clifford Wolf
Minor style fixes
Signed-off-by:
Clifford Wolf
<clifford@clifford.at>
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2018-12-18
Clifford Wolf
Merge pull request #748 from makaimann/add-btor-ops
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2018-12-18
Clifford Wolf
Merge pull request #751 from daveshah1/fix_589
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2018-12-18
Clifford Wolf
Fix segfault in AST simplify
Signed-off-by:
Clifford Wolf
<clifford@clifford.at>
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2018-12-18
Clifford Wolf
Improve src tagging (using names and attrs) of cells...
Signed-off-by:
Clifford Wolf
<clifford@clifford.at>
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2018-12-17
Clifford Wolf
Merge pull request #746 from Icenowy/anlogic-dram
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2018-12-17
Clifford Wolf
Merge pull request #742 from whitequark/changelog
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2018-12-17
Clifford Wolf
Merge pull request #741 from whitequark/ilang_slice_sigspec
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2018-12-17
Clifford Wolf
Merge pull request #744 from whitequark/write_verilog_...
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2018-12-16
Clifford Wolf
Merge pull request #745 from YosysHQ/revert-714-abc_preserve...
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2018-12-16
Clifford Wolf
Revert "Proof-of-concept: preserve naming through ABC...
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2018-12-16
Clifford Wolf
Merge pull request #736 from whitequark/select_assert_list
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2018-12-16
Clifford Wolf
Rename "fine:" label to "map:" in "synth_ice40"
Signed-off-by:
Clifford Wolf
<clifford@clifford.at>
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2018-12-16
Clifford Wolf
Merge pull request #704 from webhat/feature/fix-awk
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2018-12-16
Clifford Wolf
Merge pull request #738 from smunaut/issue_737
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2018-12-16
Clifford Wolf
Merge pull request #735 from daveshah1/trifixes
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2018-12-16
Clifford Wolf
Merge pull request #739 from whitequark/patch-1
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2018-12-16
Clifford Wolf
Fix equiv_opt indenting
Signed-off-by:
Clifford Wolf
<clifford@clifford.at>
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2018-12-16
Clifford Wolf
Merge pull request #724 from whitequark/equiv_opt
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2018-12-16
Clifford Wolf
Merge pull request #734 from grahamedgecombe/fix-shuffled...
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2018-12-16
Clifford Wolf
Merge pull request #730 from smunaut/ffssr_dont_touch
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2018-12-16
Clifford Wolf
Merge pull request #729 from whitequark/write_verilog_initial
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2018-12-16
Clifford Wolf
Merge pull request #725 from olofk/ram4k-init
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2018-12-16
Clifford Wolf
Merge pull request #714 from daveshah1/abc_preserve_naming
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2018-12-16
Clifford Wolf
Merge pull request #723 from whitequark/synth_ice40_map_gates
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2018-12-16
Clifford Wolf
Merge pull request #722 from whitequark/rename_src
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2018-12-16
Clifford Wolf
Merge pull request #720 from whitequark/master
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2018-12-10
Clifford Wolf
Add yosys-smtbmc support for btor witness
Signed-off-by:
Clifford Wolf
<clifford@clifford.at>
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2018-12-08
Clifford Wolf
Add "yosys-smtbmc --btorwit" skeleton
Signed-off-by:
Clifford Wolf
<clifford@clifford.at>
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2018-12-08
Clifford Wolf
Fix btor init value handling
Signed-off-by:
Clifford Wolf
<clifford@clifford.at>
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2018-12-06
Clifford Wolf
Add missing .gitignore
Signed-off-by:
Clifford Wolf
<clifford@clifford.at>
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2018-12-06
Clifford Wolf
Bugfix in opt_expr handling of a<0 and a>=0
Signed-off-by:
Clifford Wolf
<clifford@clifford.at>
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2018-12-06
Clifford Wolf
Verific updates
Signed-off-by:
Clifford Wolf
<clifford@clifford.at>
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2018-12-05
Clifford Wolf
Merge pull request #709 from smunaut/issue_708
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2018-12-05
Clifford Wolf
Merge pull request #718 from whitequark/gate2lut
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2018-12-05
Clifford Wolf
Merge pull request #713 from Diego-HR/master
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2018-12-05
Clifford Wolf
Merge pull request #712 from mmicko/anlogic-support
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2018-12-05
Clifford Wolf
Rename opt_lut.cpp to opt_lut.cc
Signed-off-by:
Clifford Wolf
<clifford@clifford.at>
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2018-12-05
Clifford Wolf
Merge pull request #717 from whitequark/opt_lut
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2018-12-05
Clifford Wolf
Merge pull request #716 from whitequark/ice40_unlut
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2018-12-04
Clifford Wolf
Fix typo
Signed-off-by:
Clifford Wolf
<clifford@clifford.at>
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2018-12-04
Clifford Wolf
Merge pull request #702 from smunaut/min_ce_use
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2018-12-01
Clifford Wolf
Merge pull request #676 from rafaeltp/master
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2018-11-29
Clifford Wolf
Improve ConstEval error handling for non-eval cell...
Signed-off-by:
Clifford Wolf
<clifford@clifford.at>
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2018-11-20
Clifford Wolf
Add iteration limit to "opt_muxtree"
Signed-off-by:
Clifford Wolf
<clifford@clifford.at>
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2018-11-13
Clifford Wolf
Update ABC to git rev 2ddc57d
Signed-off-by:
Clifford Wolf
<clifford@clifford.at>
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2018-11-12
Clifford Wolf
Add "write_aiger -I -O -B"
Signed-off-by:
Clifford Wolf
<clifford@clifford.at>
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2018-11-12
Clifford Wolf
Merge branch 'master' of github.com:YosysHQ/yosys
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2018-11-12
Clifford Wolf
Merge pull request #697 from eddiehung/xilinx_ps7
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