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2019-10-28	Sagar Ghuge	intel/isl: Support lossless compression with multisamples Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>	commit \| commitdiff \| tree
2019-10-28	Sagar Ghuge	iris: Get correct resource aux usage for copy Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>	commit \| commitdiff \| tree
2019-10-28	Sagar Ghuge	intel/blorp: Use isl_aux_usage_has_mcs instead of comparing Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>	commit \| commitdiff \| tree
2019-10-28	Sagar Ghuge	iris: Define MCS_CCS state transitions and usages Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>	commit \| commitdiff \| tree
2019-10-28	Sagar Ghuge	iris: Initialize CCS to fast clear while using with MCS Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>	commit \| commitdiff \| tree
2019-10-28	Sagar Ghuge	intel/isl: Don't reconfigure aux surfaces for MCS Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>	commit \| commitdiff \| tree
2019-10-22	Sagar Ghuge	intel/compiler: Refactor disassembly of sources in... Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>	commit \| commitdiff \| tree
2019-10-22	Sagar Ghuge	intel/compiler: Don't move immediate in register Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>	commit \| commitdiff \| tree
2019-10-22	Sagar Ghuge	intel/compiler: Set bits according to source file Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>	commit \| commitdiff \| tree
2019-10-22	Sagar Ghuge	intel/compiler: Add Immediate support for 3 source... Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>	commit \| commitdiff \| tree
2019-10-21	Sagar Ghuge	intel: Add missing entry for brw_nir_lower_alpha_to_coverage... Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>	commit \| commitdiff \| tree
2019-10-21	Sagar Ghuge	intel/compiler: Remove emit_alpha_to_coverage workaround... Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>	commit \| commitdiff \| tree
2019-10-21	Sagar Ghuge	nir: Add alpha_to_coverage lowering pass Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>	commit \| commitdiff \| tree
2019-07-30	Sagar Ghuge	iris: Enable EXT_texture_shadow_lod Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>	commit \| commitdiff \| tree
2019-07-30	Sagar Ghuge	gallium: Add PIPE_CAP_TEXTURE_SHADOW_LOD Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>	commit \| commitdiff \| tree
2019-07-30	Sagar Ghuge	i965: Enable EXT_texture_shadow_lod Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>	commit \| commitdiff \| tree
2019-07-30	Paulo Zanoni	glsl: Add builtin functions for EXT_texture_shadow_lod	commit \| commitdiff \| tree
2019-07-30	Paulo Zanoni	glsl: Allow _textureCubeArrayShadow function to accept...	commit \| commitdiff \| tree
2019-07-30	Paulo Zanoni	mesa: extension boilerplate for EXT_texture_shadow_lod	commit \| commitdiff \| tree
2019-07-26	Sagar Ghuge	nir: Optimize umod lowering Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>	commit \| commitdiff \| tree
2019-07-24	Sagar Ghuge	nir: Add lowering for nir_op_irem and nir_op_imod Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>	commit \| commitdiff \| tree
2019-07-23	Sagar Ghuge	anv: Implement VK_KHR_imageless_framebuffer Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>	commit \| commitdiff \| tree
2019-07-01	Sagar Ghuge	intel/tools: Add assembler unit tests for ROL/ROR instructions Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>	commit \| commitdiff \| tree
2019-07-01	Sagar Ghuge	intel/tools: Add ROL/ROR support in assembler Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>	commit \| commitdiff \| tree
2019-07-01	Sagar Ghuge	nir: Add lower_rotate flag and set to true in all drivers Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>	commit \| commitdiff \| tree
2019-07-01	Sagar Ghuge	intel/compiler: Emit ROR and ROL instruction Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>	commit \| commitdiff \| tree
2019-07-01	Sagar Ghuge	nir: Add optimization to use ROR/ROL instructions Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>	commit \| commitdiff \| tree
2019-07-01	Sagar Ghuge	nir: Add urol and uror opcodes Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>	commit \| commitdiff \| tree
2019-07-01	Sagar Ghuge	intel/compiler: Enable the emission of ROR/ROL instructions Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>	commit \| commitdiff \| tree
2019-06-25	Sagar Ghuge	glsl: Fix round64 conversion function Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>	commit \| commitdiff \| tree
2019-06-04	Sagar Ghuge	intel/compiler: Fix assertions in brw_alu3 Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>	commit \| commitdiff \| tree
2019-04-12	Sagar Ghuge	intel/fs: Remove unused condition from opt_algebraic... Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>	commit \| commitdiff \| tree
2019-03-08	Sagar Ghuge	iris: Track last VS URB entry size Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>	commit \| commitdiff \| tree
2019-03-08	Sagar Ghuge	iris: Refactor code to share 3DSTATE_URB_* packet Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>	commit \| commitdiff \| tree
2019-03-04	Sagar Ghuge	spirv: Allow [i/u]mulExtended to use new nir opcode Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>	commit \| commitdiff \| tree
2019-03-04	Sagar Ghuge	nir/algebraic: Optimize low 32 bit extraction Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>	commit \| commitdiff \| tree
2019-03-04	Sagar Ghuge	glsl: [u/i]mulExtended optimization for GLSL Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>	commit \| commitdiff \| tree
2019-03-04	Sagar Ghuge	nir/glsl: Add another way of doing lower_imul64 for... Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>	commit \| commitdiff \| tree
2018-12-18	Sagar Ghuge	nir: Add a new lowering option to lower 3D surfaces... Signed-off-by: Sagar Ghuge <sagar.ghuge@intel.com>	commit \| commitdiff \| tree

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