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Blackboxes
2019-04-22
Eddie Hung
Merge pull request #914 from YosysHQ/xc7srl
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2019-04-22
Eddie Hung
Add synth_xilinx -nomux option
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2019-04-22
Eddie Hung
Cleanup, call pmux2shiftx even without -nosrl
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2019-04-22
Eddie Hung
Merge branch 'xaig' into xc7mux
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2019-04-22
Eddie Hung
Temporarily remove 'r' extension
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2019-04-22
Eddie Hung
Merge remote-tracking branch 'origin/xc7srl' into xc7mux
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2019-04-22
Eddie Hung
Update help message
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2019-04-22
Eddie Hung
Allow POs to be PIs in XAIG
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2019-04-22
Eddie Hung
Remove kernel/cost.cc since master has refactored it
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2019-04-22
Eddie Hung
Merge remote-tracking branch 'origin/master' into xaig
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2019-04-22
Eddie Hung
Move 'shregmap -tech xilinx' into map_cells
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2019-04-22
Eddie Hung
Merge remote-tracking branch 'origin/master' into xc7srl
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2019-04-22
Eddie Hung
Merge remote-tracking branch 'origin/clifford/libwb...
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2019-04-21
Eddie Hung
Tidy up, fix for -nosrl
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2019-04-21
Eddie Hung
Convert to use #945
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2019-04-21
Eddie Hung
Merge remote-tracking branch 'origin/clifford/libwb...
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2019-04-21
Eddie Hung
Merge branch 'map_cells_before_map_luts' into xc7srl
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2019-04-21
Eddie Hung
Merge branch 'master' into map_cells_before_map_luts
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2019-04-21
Eddie Hung
Add comments
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2019-04-21
Eddie Hung
Use new pmux2shiftx from #944, remove my old attempt
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2019-04-21
Eddie Hung
Merge remote-tracking branch 'origin/clifford/pmux2shiftx...
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2019-04-21
Eddie Hung
Merge remote-tracking branch 'origin/master' into xc7srl
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2019-04-20
Eddie Hung
Merge remote-tracking branch 'origin/master' into xaig
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2019-04-20
Eddie Hung
Merge remote-tracking branch 'origin/pmux2shiftx' into...
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2019-04-20
Eddie Hung
Merge remote-tracking branch 'origin' into xc7srl
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2019-04-20
Eddie Hung
ABC_FLOPS -> ABC_MODEL -- only whitebox if ABC_MODEL set
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2019-04-19
Eddie Hung
Select to find union of both sets on stack
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2019-04-19
Eddie Hung
Fixes for simple_abc9 tests
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2019-04-19
Eddie Hung
Do not assume inst_module is always present
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2019-04-19
Eddie Hung
ignore_boxes -> holes_mode
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2019-04-19
Eddie Hung
Make SB_DFF whitebox
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2019-04-19
Eddie Hung
Spelling fixes
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2019-04-19
Eddie Hung
Fix SB_DFF comb model
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2019-04-19
Eddie Hung
Revert "write_json to not write contents (cells/wires...
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2019-04-19
Eddie Hung
Missing close bracket
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2019-04-19
Eddie Hung
Annotate SB_DFF* with abc_flop and abc_box_id
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2019-04-19
Eddie Hung
Add SB_DFF* to boxes
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2019-04-19
Eddie Hung
Add flop support for write_xaiger
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2019-04-19
Eddie Hung
read_aiger to parse 'r' extension
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2019-04-19
Eddie Hung
Spelling
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2019-04-18
Eddie Hung
Merge pull request #917 from YosysHQ/eddie/fix_retime
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2019-04-18
Eddie Hung
Use new -wb flag for ABC flow
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2019-04-18
Eddie Hung
write_json to not write contents (cells/wires) of whiteboxes
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2019-04-18
Eddie Hung
Ignore 'whitebox' attr in flatten with "-wb" option
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2019-04-18
Eddie Hung
write_json to not write contents (cells/wires) of whiteboxes
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2019-04-18
Eddie Hung
Ignore 'whitebox' attr in flatten with "-wb" option
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2019-04-18
Eddie Hung
Also update Makefile.inc
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2019-04-18
Eddie Hung
Fix abc's remap_name to not ignore [^0-9] when extracting sid
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2019-04-18
Eddie Hung
Make SB_LUT4 a blackbox
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2019-04-18
Eddie Hung
Fix rename
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2019-04-18
Eddie Hung
Rename to abc_*.{box,lut}
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2019-04-18
Eddie Hung
Merge remote-tracking branch 'origin/clifford/whitebox...
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2019-04-18
Eddie Hung
ABC to call retime all the time
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2019-04-18
Eddie Hung
Revert "synth_* with -retime option now calls abc with...
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2019-04-18
Eddie Hung
Merge branch 'master' into eddie/fix_retime
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2019-04-17
Eddie Hung
Skip if abc_box_id earlier
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2019-04-17
Eddie Hung
Remove use of abc_box_id in stat
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2019-04-17
Eddie Hung
Fix $anyseq warning and cleanup
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2019-04-17
Eddie Hung
Update Makefile.inc too
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2019-04-17
Eddie Hung
Reduce to three devices: hx, lp, u
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2019-04-17
Eddie Hung
Do not print slack histogram
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2019-04-17
Eddie Hung
Add up5k timings
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2019-04-17
Eddie Hung
Fix grammar
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2019-04-17
Eddie Hung
Update error message
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2019-04-17
Eddie Hung
Add "-device" argument to synth_ice40
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2019-04-17
Eddie Hung
Missing abc_flop_q attribute on SPRAM
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2019-04-17
Eddie Hung
Cope with inout ports
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2019-04-17
Eddie Hung
Map to SB_LUT4 from fastest input first
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2019-04-17
Eddie Hung
Working ABC9 script
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2019-04-17
Eddie Hung
Stop topological sort at abc_flop_q
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2019-04-17
Eddie Hung
Mark seq output ports with "abc_flop_q" attr
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2019-04-17
Eddie Hung
Also update Makefile.inc
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2019-04-17
Eddie Hung
synth_ice40 to use renamed files
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2019-04-17
Eddie Hung
Rename to abc.*
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2019-04-17
Eddie Hung
Revert "Try using an ICE40_CARRY_LUT primitive to avoid...
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2019-04-17
Eddie Hung
Try using an ICE40_CARRY_LUT primitive to avoid ABC...
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2019-04-17
Eddie Hung
Remove init* from xaiger, also topo-sort cells for...
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2019-04-17
Eddie Hung
Merge remote-tracking branch 'origin/master' into xaig
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2019-04-17
Eddie Hung
Ignore a/i/o/h XAIGER extensions
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2019-04-17
Eddie Hung
Fix spacing
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2019-04-17
Eddie Hung
Optimise
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2019-04-17
Eddie Hung
Add SB_LUT4 to box library
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2019-04-16
Eddie Hung
Add ice40 box files
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2019-04-16
Eddie Hung
abc9 to output some more info
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2019-04-16
Eddie Hung
CIs before PIs; also sort each cell's connections before...
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2019-04-16
Eddie Hung
Merge remote-tracking branch 'origin/master' into xaig
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2019-04-16
Eddie Hung
Port from xc7mux branch
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2019-04-16
Eddie Hung
Add MUXCY and XORCY to cells_box.v
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2019-04-16
Eddie Hung
Fix wire numbering
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2019-04-16
Eddie Hung
Do not put constants into output_bits
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2019-04-16
Eddie Hung
Remove write_verilog call
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2019-04-16
Eddie Hung
Fix spacing
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2019-04-16
Eddie Hung
Merge branch 'xaig' into xc7mux
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2019-04-16
Eddie Hung
Re-enable partsel.v test
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2019-04-16
Eddie Hung
abc9 to call "setundef -zero" behaving as for abc
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2019-04-16
Eddie Hung
NULL check before use
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2019-04-16
Eddie Hung
WIP for box support
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2019-04-16
Eddie Hung
ABC to read_box before reading netlist
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2019-04-16
Eddie Hung
Make cells.box whiteboxes not blackboxes
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2019-04-16
Eddie Hung
read_verilog cells_box.v before techmap
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