| 2021-12-28 |
jiawei | ld: Fix testcase errors due to -shared not support.
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commit | commitdiff | tree |
| 2021-12-24 |
Nelson Chu | RISC-V: Rewrite the csr testcases.
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commit | commitdiff | tree |
| 2021-12-24 |
Vineet Gupta | RISC-V: Hypervisor ext: support Privileged Spec 1.12
Reviewed-by: Nelson Chu <nelson.chu@sifive.com>
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commit | commitdiff | tree |
| 2021-12-24 |
Vineet Gupta | RISC-V: Hypervisor ext: drop Privileged Spec 1.9.1...
Reviewed-by: Nelson Chu <nelson.chu@sifive.com>
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commit | commitdiff | tree |
| 2021-12-22 |
jiawei | RISC-V: Update Scalar Crypto testcases.
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commit | commitdiff | tree |
| 2021-12-16 |
Nelson Chu | RISC-V: Support svinval extension with frozen version...
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commit | commitdiff | tree |
| 2021-12-14 |
Nelson Chu | RISC-V: Added ld testcases for the medlow and medany...
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commit | commitdiff | tree |
| 2021-12-09 |
Nelson Chu | RISC-V: Clarify the behavior of .option arch directive.
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commit | commitdiff | tree |
| 2021-11-30 |
Nelson Chu | RISC-V: The vtype immediate with more than the defined...
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commit | commitdiff | tree |
| 2021-11-30 |
Nelson Chu | RISC-V: Dump vset[i]vli immediate as numbers once vsew...
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commit | commitdiff | tree |
| 2021-11-22 |
Nelson Chu | RISC-V: Removed the redundant NULL pointer check in...
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commit | commitdiff | tree |
| 2021-11-22 |
Nelson Chu | RISC-V: Replace .option rvc/norvc with .option arch...
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commit | commitdiff | tree |
| 2021-11-22 |
Nelson Chu | RISC-V: PR28610, Fix ASAN heap-buffer-overflow error...
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commit | commitdiff | tree |
| 2021-11-19 |
Nelson Chu | RISC-V: Support new .option arch directive.
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commit | commitdiff | tree |
| 2021-11-19 |
Nelson Chu | RISC-V: Support STO_RISCV_VARIANT_CC and DT_RISCV_VARIANT_CC.
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commit | commitdiff | tree |
| 2021-11-18 |
jiawei | RISC-V: Add testcases for z[fdq]inx
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commit | commitdiff | tree |
| 2021-11-18 |
jiawei | RISC-V: Add instructions and operand set for z[fdq]inx
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commit | commitdiff | tree |
| 2021-11-18 |
jiawei | RISC-V: Add mininal support for z[fdq]inx
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commit | commitdiff | tree |
| 2021-11-17 |
Nelson Chu | RISC-V: Support rvv extension with released version...
Nelson Chu <nelson.chu@sifive.com>
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commit | commitdiff | tree |
| 2021-11-16 |
jiawei | RISC-V: Scalar crypto instruction and entropy source...
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commit | commitdiff | tree |
| 2021-11-16 |
jiawei | RISC-V: Scalar crypto instructions and operand set.
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commit | commitdiff | tree |
| 2021-11-16 |
jiawei | RISC-V: Minimal support of scalar crypto extension.
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commit | commitdiff | tree |
| 2021-11-11 |
Nelson Chu | RISC-V: Dump objects according to the elf architecture...
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commit | commitdiff | tree |
| 2021-11-04 |
Nelson Chu | RISC-V: Clarify the behavior of .option rvc or norvc.
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commit | commitdiff | tree |
| 2021-10-27 |
Nelson Chu | RISC-V: Tidy riscv assembler and disassembler.
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commit | commitdiff | tree |
| 2021-10-22 |
Lewis Revill | RISC-V: Added ld testcase for pcgp relaxation.
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commit | commitdiff | tree |
| 2021-10-22 |
Lewis Revill | RISC-V: Don't separate pcgp relaxation to another relax...
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commit | commitdiff | tree |
| 2021-10-07 |
Philipp Tomsich | RISC-V: Support aliases for Zbs instructions
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commit | commitdiff | tree |
| 2021-10-07 |
Philipp Tomsich | RISC-V: Add support for Zbs instructions
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commit | commitdiff | tree |
| 2021-10-07 |
Philipp Tomsich | RISC-V: Update extension version for Zb[abc] to 1.0.0
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commit | commitdiff | tree |
| 2021-10-07 |
Philipp Tomsich | RISC-V: Split Zb[abc] into commented sections
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commit | commitdiff | tree |
| 2021-09-28 |
Cooper Qu | RISC-V: Fix wrong version number when arch contains...
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commit | commitdiff | tree |
| 2021-09-28 |
Nelson Chu | RISC-V: Allow to add numbers in the prefixed extension...
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commit | commitdiff | tree |
| 2021-09-17 |
Nelson Chu | RISC-V: Merged extension string tables and their version...
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commit | commitdiff | tree |
| 2021-09-13 |
Nelson Chu | RISC-V: Update the assembler insn testcase.
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commit | commitdiff | tree |
| 2021-08-31 |
Nelson Chu | RISC-V: Extend .insn directive to support hardcode...
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commit | commitdiff | tree |
| 2021-08-30 |
Nelson Chu | RISC-V: PR28291, Fix the gdb fails that PR27916 caused.
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commit | commitdiff | tree |
| 2021-08-30 |
Nelson Chu | RISC-V: PR27916, Support mapping symbols.
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commit | commitdiff | tree |
| 2021-07-20 |
Nelson Chu | RISC-V: Minor updates for architecture parser.
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commit | commitdiff | tree |
| 2021-07-13 |
Nelson Chu | RISC-V: Enable elf attributes when default configure...
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commit | commitdiff | tree |
| 2021-07-06 |
Nelson Chu | RISC-V: Fix the build broken with -Werror.
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commit | commitdiff | tree |
| 2021-07-06 |
Kito Cheng | RISC-V: Add PT_RISCV_ATTRIBUTES and add it to PHDR.
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commit | commitdiff | tree |
| 2021-06-22 |
Nelson Chu | RISC-V: Clarify the addends of pc-relative access.
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commit | commitdiff | tree |
| 2021-06-11 |
Nelson Chu | RISC-V: Update the riscv_opts.[rvc|rve] in the riscv_set_arch.
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commit | commitdiff | tree |
| 2021-05-31 |
Nelson Chu | RISC-V: PR27566, Do not relax when data segment phase...
2021-05-31 Nelson Chu <nelson.chu@sifive.com>
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commit | commitdiff | tree |
| 2021-05-26 |
Nelson Chu | RISC-V: Allow to link the objects with unknown prefixed...
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commit | commitdiff | tree |
| 2021-05-24 |
Nelson Chu | RISC-V: PR25212, Report errors for invalid march and...
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commit | commitdiff | tree |
| 2021-05-18 |
Job Noorman | RISC-V: PR27814, Objdump crashes when disassembling...
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commit | commitdiff | tree |
| 2021-05-14 |
Nelson Chu | RISC-V: Check the overflow for %pcrel_lo addend more...
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commit | commitdiff | tree |
| 2021-05-13 |
Nelson Chu | RISC-V: Record implicit subsets in a table, to avoid...
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commit | commitdiff | tree |
| 2021-04-16 |
Nelson Chu | RISC-V: PR27436, make operand C> work the same as >.
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commit | commitdiff | tree |
| 2021-04-16 |
Nelson Chu | Update the ChangeLog, and add the missing entries.
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commit | commitdiff | tree |
| 2021-04-15 |
Nelson Chu | RISC-V: PR27584, surpress local and empty name symbols...
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commit | commitdiff | tree |
| 2021-04-13 |
Nelson Chu | RISC-V: Don't report the mismatched version warning...
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commit | commitdiff | tree |
| 2021-04-12 |
Nelson Chu | RISC-V: The version of i-ext should be RISCV_UNKNOWN_VERSION...
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commit | commitdiff | tree |
| 2021-04-12 |
Nelson Chu | RISC-V: Add i-ext as the implicit extension when e...
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commit | commitdiff | tree |
| 2021-04-12 |
Nelson Chu | RISC-V: Support to parse the multi-letter prefix in...
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commit | commitdiff | tree |
| 2021-03-11 |
Nelson Chu | RISC-V: Improve multiple relax passes problem.
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commit | commitdiff | tree |
| 2021-02-19 |
Nelson Chu | RISC-V: PR27158, fixed UJ/SB types and added CSS/CL...
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commit | commitdiff | tree |
| 2021-02-18 |
Nelson Chu | RISC-V: Add bfd/cpu-riscv.h to support all spec versions...
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commit | commitdiff | tree |
| 2021-02-17 |
Nelson Chu | RISC-V: PR27200, allow the first input non-ABI binary...
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commit | commitdiff | tree |
| 2021-02-05 |
Nelson Chu | RISC-V: PR27348, Remove the obsolete OP_*CUSTOM_IMM.
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commit | commitdiff | tree |
| 2021-02-05 |
Nelson Chu | RISC-V: PR27348, Remove obsolete Xcustom support.
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commit | commitdiff | tree |
| 2021-02-04 |
Nelson Chu | RISC-V: Removed the v0.93 bitmanip ZBA/ZBB/ZBC instructions.
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commit | commitdiff | tree |
| 2021-01-19 |
Nelson Chu | ld: Just xfail riscv little endian targets for compressed1d...
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commit | commitdiff | tree |
| 2021-01-15 |
Nelson Chu | RISC-V: Fixed the indent that caused by the previous...
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commit | commitdiff | tree |
| 2021-01-15 |
Nelson Chu | RISC-V: Indent and GNU coding standards tidy, also...
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commit | commitdiff | tree |
| 2021-01-15 |
Nelson Chu | RISC-V: Error and warning messages tidy.
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commit | commitdiff | tree |
| 2021-01-15 |
Nelson Chu | RISC-V: Comments tidy and improvement.
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commit | commitdiff | tree |
| 2021-01-07 |
Philipp Tomsich | RISC-V: Add pause hint instruction.
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commit | commitdiff | tree |
| 2021-01-07 |
Marcus Comstedt | ld: xfail riscv64*-*-* for ld-scripts/empty-address...
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commit | commitdiff | tree |
| 2021-01-07 |
Claire Xenia Wolf | RISC-V: Support riscv bitmanip frozen ZBA/ZBB/ZBC instructio...
Nelson Chu <nelson.chu@sifive.com>
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commit | commitdiff | tree |
| 2021-01-06 |
Marcus Comstedt | RISC-V: Mention -mbig-endian and -mlittle-endian in doc
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commit | commitdiff | tree |
| 2021-01-06 |
Marcus Comstedt | RISC-V: Fix riscv gas/ld testsuites failures for big...
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commit | commitdiff | tree |
| 2021-01-06 |
Marcus Comstedt | RISC-V: Implement support for big endian targets.
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commit | commitdiff | tree |
| 2021-01-05 |
Nelson Chu | RISC-V: Ouput __global_pointer$ as dynamic symbol when...
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commit | commitdiff | tree |
| 2021-01-04 |
Nelson Chu | RISC-V: Fix the merged orders of Z* extension for linker.
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commit | commitdiff | tree |
| 2020-12-10 |
Nelson Chu | RISC-V: Add sext.[bh] and zext.[bhw] pseudo instructions.
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commit | commitdiff | tree |
| 2020-12-10 |
Nelson Chu | RISC-V: Dump CSR according to the elf privileged spec...
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commit | commitdiff | tree |
| 2020-12-10 |
Nelson Chu | RISC-V: Control fence.i and csr instructions by zifencei...
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commit | commitdiff | tree |
| 2020-12-01 |
Nelson Chu | RISC-V: Fix the order checking for Z* extension.
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commit | commitdiff | tree |
| 2020-12-01 |
Nelson Chu | RISC-V: Support to add implicit extensions for G.
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commit | commitdiff | tree |
| 2020-12-01 |
Nelson Chu | RISC-V: Support to add implicit extensions.
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commit | commitdiff | tree |
| 2020-12-01 |
Nelson Chu | RISC-V: Improve the version parsing for arch string.
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commit | commitdiff | tree |
| 2020-12-01 |
Nelson Chu | RISC-V: Remove the unimplemented extensions.
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commit | commitdiff | tree |
| 2020-12-01 |
Nelson Chu | RISC-V: Add zifencei and prefixed h class extensions.
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commit | commitdiff | tree |
| 2020-12-01 |
Nelson Chu | RISC-V: Don't allow any uppercase letter in the arch...
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commit | commitdiff | tree |
| 2020-12-01 |
Nelson Chu | RISC-V: Minor cleanup and testcases improvement for...
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commit | commitdiff | tree |
| 2020-11-21 |
Nelson Chu | RISC-V: Relax PCREL to GPREL while doing other relaxations...
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commit | commitdiff | tree |
| 2020-11-09 |
Nelson Chu | RISC-V: Update ABI to the elf_flags after parsing elf...
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commit | commitdiff | tree |
| 2020-10-20 |
Nelson Chu | binutils: Add myself as RISC-V co-maintainer.
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commit | commitdiff | tree |
| 2020-10-16 |
Nelson Chu | RISC-V: Fix that IRELATIVE relocs may be inserted to...
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commit | commitdiff | tree |
| 2020-10-16 |
Nelson Chu | RISC-V: Support GNU indirect functions.
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commit | commitdiff | tree |
| 2020-09-03 |
Nelson Chu | RISC-V: Minor cleanup and typos when merging elf attributes.
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commit | commitdiff | tree |
| 2020-09-03 |
Nelson Chu | RISC-V: Report warnings rather than errors for the...
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commit | commitdiff | tree |
| 2020-09-03 |
Kito Cheng | RISC-V: Improve the error message for the mis-matched...
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commit | commitdiff | tree |
| 2020-08-28 |
Nelson Chu | RISC-V: Treat R_RISCV_CALL and R_RISCV_CALL_PLT as...
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commit | commitdiff | tree |
| 2020-06-30 |
Nelson Chu | RISC-V: Support debug and float CSR as the unprivileged...
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commit | commitdiff | tree |
| 2020-06-30 |
Nelson Chu | RISC-V: Cleanup the include/opcode/riscv-opc.h.
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commit | commitdiff | tree |
| 2020-06-23 |
Nelson Chu | RISC-V: Generate ELF priv attributes if priv instruction...
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commit | commitdiff | tree |
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