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dev-arm: Add GICv3 unimplemented Hyp Active Priorities Group regs
2019-09-06 Giacomo Travaglinidev-arm: Add GICv3 unimplemented Hyp Active Priorities...
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-06 Giacomo Travaglinidev-arm: Allow 32-bit access to GITS_TYPER
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-06 Giacomo Travaglinidev-arm: Cpu interface groupEnabled check for global...
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-06 Giacomo Travaglinidev-arm: Check if INTID group is enabled when reading...
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-06 Giacomo Travaglinidev-arm: Writing GICD_CTLR should trigger an update
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-06 Giacomo Travaglinidev-arm: Rewrite GICv3 update
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-06 Giacomo Travaglinidev-arm: Fix GICv3 IGRPMOD writes
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-06 Giacomo Travagliniarch-arm: SGI registers undecoded in AArch32
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-06 Giacomo Travagliniarch-arm: Fix read/setMiscReg for AArch32 GICv3 ICC...
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-06 Giacomo Travaglinidev-arm: Fix SGI generation
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-06 Adrian Herreradev-arm: Gicv3 ITS device tree autogen
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-06 Adrian Herreradev-arm: modify GICv3 ITS default addr
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-05 Giacomo Travaglinidev-arm: Improper translation slot release in SMMUv3
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-05 Jan-Peter Larssondev-arm: Implement invalidateASID in SMMUv3 WalkCache
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-09-05 Adrian Herreradev-arm: Implement invalidateVA/VAA in SMMUv3 WalkCache
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-08-30 Giacomo Travagliniarm,kvm: Fix python imports from global namespace
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-08-26 Giacomo Travaglinidev-arm: Fix GICv3 ITS indexing error
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-08-26 Giacomo Travaglinidev-arm: Fix GITS_BASER initialization/access
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-08-22 Giacomo Travaglinidev-arm: Start using GITS_CTLR.quiescent bit
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-08-22 Giacomo Travaglinidev-arm: Allow 32 bit accesses to GITS_C(WRITER/READR...
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-08-22 Adrian Herreradev-arm,system-arm: missing GICv3 ranges property
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-08-20 Giacomo Travaglinidev-arm: Add redistributor-stride property to GICv3
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-08-20 Giacomo Travagliniarch-arm: Replace occ of opModeToEL(currOpMode/cpsr...
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-08-20 Giacomo Travagliniarch-arm: Replace direct use cpsr.el with currEL helper
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-08-20 Giacomo Travagliniarch-arm: Overload currEL helper with CPSR argument
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-08-20 Giacomo Travagliniarch-arm: Rewrite the currEL helper method to use opModeToEL
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-08-20 Giacomo Travaglinidev-arm: Add GITS_PIDR2 register to the ITS memory map
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-08-20 Giacomo Travaglinidev-arm: Add Gicv3Distributor members for GICv3 GICD_PIDRx
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-08-12 Giacomo Travaglinidev-arm: Enable DTB autogeneration in GICv3
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-08-12 Giacomo Travaglinidev-arm: Fix PCI node's interrupt-map property
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-08-12 Giacomo Travaglinidev-arm: Use FdtState to generate GIC properites
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-08-12 Giacomo Travaglinipython: FdtState using interrupt-cells
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2019-08-07 Giacomo Travaglinidev-arm: Perform SMMUv3 CFG Invalidation at device...
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-08-05 Giacomo Travagliniarch-arm: Implement ARMv8.1-PAN, Privileged access...
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-08-05 Giacomo Travagliniarch-arm: Rewrite MSR immediate instruction class
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-07-30 Giacomo Travaglinidev-arm: Rewrite SMMUv3 Commands
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-07-25 Giacomo Travaglinidev-arm: Fix SMMUv3 CMDQ wrapping
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-07-25 Giacomo Travaglinidev-arm: Polish SMMUv3 CMDQ setup
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-07-25 Giacomo Travaglinidev-arm: Define enum masks for SMMU_CR0 register
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-07-25 Giacomo Travaglinidev-arm: TnSZ fields need to be cached in SMMUv3::ConfigCache
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-07-25 Giacomo Travaglinidev-arm: SMMUv3 Table walks using TnSZ
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-07-25 Giacomo Travaglinidev-arm: Use override keyword for SMMUv3 PTOPS
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-07-25 Michiel Van Toldev-arm: Add 16K granule support to SMMUv3 model
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2019-07-19 Giacomo Travagliniarch-arm: Implement ARMv8.1-HPD, Hierarchical permission...
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-07-19 Giacomo Travagliniarch-arm: Add HPD bit for TCR_EL2/EL3
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-07-19 Giacomo Travagliniarch-arm: Clean Fault generation when processing Long...
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-07-19 Matteo Andreozzidev-arm: clang compatibility fix, added missing overrides
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-07-18 Gabor Dozsaarch-arm: Add first-/non-faulting load instructions
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-07-18 Gabor Dozsasim: Add getter to fault virtual address
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-07-17 Giacomo Travagliniarch-arm: Use ExceptionLevel type in TlbEntry
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-07-16 Giacomo Travaglinidev-arm: Fix SMMUv3 ContextDescriptor pointer shift
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-07-16 Giacomo Travaglinicpu: isDrained renamed to isCpuDrained
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-06-28 Michiel W. van Tolbase: Add argument to Coroutine class to not run on...
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2019-06-26 Anouk Van Laerarch, arm: Update miscRegs in getTE
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-06-26 Giacomo Travaglinidev-arm: Remove un-needed Q_CONS_PROD_MASK macro
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-06-26 Adrian Herreradev-arm: drain implementation for SMMUv3
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-06-26 Adrian Herreradev-arm: pending SMMU transl update on constructor...
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-06-20 Giacomo Travagliniconfigs: Fix NULL dram-lowp regressions
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-06-17 Giacomo Travagliniarch-arm: Move the memacc_code before op_wb in fp loads
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-06-17 Giacomo Travaglinidev-arm: Reapply GICv3 changes that were lost during...
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-06-09 Giacomo Travaglinibase: Provide a getter for Fiber::started boolean variable
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-06-09 Giacomo Travaglinibase: Rename TestFiber into SwitchingFiber
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-06-07 Giacomo Travagliniarch-arm: Fix WalkerState,Descriptors default constructor
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-06-06 Stanislaw Czerniawskidev-arm: Implement a SMMUv3 model
- Giacomo Travaglini <giacomo.travaglini@arm.com>
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-05-24 Giacomo Travagliniarch-arm: Fix fallthrough when trapping at EL2
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-05-23 Giacomo Travagliniarch-arm: Trap virtual accesses to GICv3 SGI registers
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-05-23 Giacomo Travagliniarch-arm: Expose haveGicv3CPUInterface to the ISA interface
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-05-23 Giacomo Travagliniarch-arm: Change mcrMrc15TrapToHyp signature
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-05-22 Giacomo Travaglinidev-arm: Provide a GICv3 ITS Implementation
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-05-14 Giacomo TravagliniRevert "cpu: fix how a thread starts up in MinorCPU"
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-05-14 Giacomo TravagliniRevert "cpu: stop scheduling suspended threads in MinorCPU"
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-05-14 Giacomo TravagliniRevert "cpu: fix branching when thread is suspended...
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-05-03 Giacomo Travaglinidev: StreamID generation in DMA device
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-05-02 Giacomo Travaglinidev-arm: Store a PhysProxy port in Gicv3Redist
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-05-02 Giacomo Travaglinidev-arm: Add named variable for GICD_TYPER.IDBits
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-05-02 Giacomo Travaglinidev-arm: Read correct version of ICC_BPR register
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-05-02 Giacomo Travaglinidev-arm: Get a Gicv3Redistributor ptr from phys address
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-05-02 Giacomo Travaglinidev-arm: Add several LPI methods in Gicv3Redistributor
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-05-02 Giacomo Travaglinidev-arm: Take LPIs into account when interacting with...
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-05-02 Giacomo Travaglinidev-arm: Fix GICv3 LPIs priority value
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-05-02 Giacomo Travaglinidev-arm: Disable LPI Configuration Table caching
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-05-02 Giacomo Travaglinidev-arm: Check EnableLPIs before checking for pending...
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-05-02 Giacomo Travaglinidev-arm: GICv3 LPI tables are using physical addresses
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-05-02 Giacomo Travaglinidev-arm: Fix GICv3 LPI loop
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-05-02 Giacomo Travaglinidev-arm: Fix Bitwise operation in GICv3
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-04-29 Giacomo Travagliniarch-arm: Faults DebugFlag now printing inst opcode...
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-04-29 Giacomo Travagliniarch-arm: Report real instruction encoding when Undefined
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-04-26 Giacomo Travagliniarch-arm: updateMiscReg not setting isHyp in aarch64
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-04-25 Giacomo Travagliniarch-arm: Remove un-needed hyp flag in TLBI operations
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-04-25 Giacomo Travagliniarch-arm: Correct target EL field in TLBI operations
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-04-25 Giacomo Travaglinidev-arm: Move GICv3 (Re)Ditributor address in Realview.py
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-04-25 Giacomo Travaglinidev-arm: Limit number of max PE in GICv3 to 128
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-04-25 Giacomo Travaglinidev-arm: Add GICv4 extension switch in GICv3
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-04-25 Giacomo Travaglinidev-arm: Check for maximum number of supported PE in...
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-04-11 Giacomo Travagliniarch-arm: Enable PMSELR_EL0 read in PMU
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-04-10 Giacomo Travaglinicpu: O3 switchFreeList checking VecElems instead of...
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-04-02 Giacomo Travaglinidev-arm: Make GICv3 maintenance interrupt an ArmInterrupt
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-03-28 Javier Setoainarch-arm: Fix use of bitwise operators on booleans
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-03-28 Giacomo Travagliniarch-arm: Fix index generation for VecElem operands
 ...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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2019-03-27 Giacomo Travaglinidev-arm: Rename GIC maintenance interrupt from ppint...
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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