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Merge remote-tracking branch 'origin/eddie/shregmap_improve' into xc7mux
2019-06-11
Eddie Hung
Merge remote-tracking branch 'origin/eddie/shregmap_improve...
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2019-06-11
Eddie Hung
Try way that doesn't involve creating a new wire
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2019-06-11
Eddie Hung
Disable dist RAM boxes due to comb loop
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2019-06-11
Eddie Hung
Remove #ifndef ABC
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2019-06-10
Eddie Hung
Merge remote-tracking branch 'origin/eddie/shregmap_improve...
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2019-06-10
Eddie Hung
If d_bit already in sigbit_chain_next, create extra...
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2019-06-10
Eddie Hung
Add test
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2019-06-10
Eddie Hung
Revert "Revert "Move ff_map back after ABC for shregmap""
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2019-06-10
Eddie Hung
Revert "Rename shregmap -tech xilinx -> xilinx_dynamic"
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2019-06-10
Eddie Hung
Revert "shregmap -tech xilinx_dynamic to work -params...
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2019-06-10
Eddie Hung
Revert "Refactor to ShregmapTechXilinx7Static"
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2019-06-10
Eddie Hung
Revert "Add -tech xilinx_static"
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2019-06-10
Eddie Hung
Revert "Continue support for ShregmapTechXilinx7Static"
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2019-06-10
Eddie Hung
Revert "shregmap -tech xilinx_static to handle INIT"
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2019-06-10
Eddie Hung
Merge remote-tracking branch 'origin/master' into xc7mux
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2019-06-10
Eddie Hung
Add some more comments
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2019-06-08
Eddie Hung
Update CHANGELOG
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2019-06-07
Eddie Hung
Comment out muxpack (currently broken)
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2019-06-07
Eddie Hung
Fine tune aigerparse
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2019-06-07
Eddie Hung
Merge remote-tracking branch 'origin/master' into xc7mux
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2019-06-07
Eddie Hung
Fix spacing from spaces to tabs
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2019-06-07
Eddie Hung
Add read_aiger to CHANGELOG
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2019-06-07
Eddie Hung
Fix spacing (entire file is wrong anyway, will fix...
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2019-06-07
Eddie Hung
Remove unnecessary std::getline() for ASCII
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2019-06-07
Eddie Hung
Test *.aag too, by using *.aig as reference
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2019-06-07
Eddie Hung
Fix read_aiger -- create zero driver, fix init width...
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2019-06-07
Eddie Hung
Use ABC to convert from AIGER to Verilog
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2019-06-07
Eddie Hung
Use ABC to convert AIGER to Verilog, then sat against...
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2019-06-07
Eddie Hung
Add symbols to AIGER test inputs for ABC
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2019-06-07
Eddie Hung
Allow muxcover costs to be changed
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2019-06-07
Eddie Hung
Allow muxcover costs to be changed
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2019-06-06
Eddie Hung
$__XILINX_MUX_ -> $__XILINX_SHIFTX
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2019-06-06
Eddie Hung
Fix muxcover and its techmapping
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2019-06-06
Eddie Hung
Run muxpack and muxcover in synth_xilinx
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2019-06-06
Eddie Hung
Remove abc_flop attributes for now
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2019-06-06
Eddie Hung
Merge remote-tracking branch 'origin/eddie/muxpack...
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2019-06-06
Eddie Hung
Fix and test for balanced case
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2019-06-06
Eddie Hung
Merge remote-tracking branch 'origin/eddie/muxpack...
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2019-06-06
Eddie Hung
Fix warnings
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2019-06-06
Eddie Hung
Support cascading $pmux.A with $mux.A and $mux.B
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2019-06-06
Eddie Hung
More cleanup
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2019-06-06
Eddie Hung
Fix spacing
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2019-06-06
Eddie Hung
Non chain user check using next_sig
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2019-06-06
Eddie Hung
Add non exclusive test
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2019-06-06
Eddie Hung
Move muxpack from passes/techmap to passes/opt
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2019-06-06
Eddie Hung
Update doc
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2019-06-06
Eddie Hung
Add to CHANGELOG
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2019-06-06
Eddie Hung
One more and tidy up
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2019-06-06
Eddie Hung
Add a few more special case tests
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2019-06-06
Eddie Hung
Add tests, fix for !=
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2019-06-06
Eddie Hung
Missing file
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2019-06-06
Eddie Hung
Initial adaptation of muxpack from shregmap
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2019-06-05
Eddie Hung
Missing doc for -tech xilinx in shregmap
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2019-06-05
Eddie Hung
Error out if no top module given before 'sim'
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2019-06-05
Eddie Hung
Fix typo in opt_rmdff
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2019-06-05
Eddie Hung
shregmap -tech xilinx_static to handle INIT
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2019-06-05
Eddie Hung
Continue support for ShregmapTechXilinx7Static
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2019-06-05
Eddie Hung
Update abc attributes on FD*E_1
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2019-06-05
Eddie Hung
Cleanup
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2019-06-05
Eddie Hung
Call shregmap -tech xilinx_static
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2019-06-05
Eddie Hung
Revert "Move ff_map back after ABC for shregmap"
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2019-06-05
Eddie Hung
Add -tech xilinx_static
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2019-06-05
Eddie Hung
Refactor to ShregmapTechXilinx7Static
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2019-06-05
Eddie Hung
shregmap -tech xilinx_dynamic to work -params and ...
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2019-06-05
Eddie Hung
Merge pull request #1067 from YosysHQ/clifford/fix1065
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2019-06-05
Eddie Hung
Merge remote-tracking branch 'origin/master' into xc7mux
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2019-06-05
Eddie Hung
Merge remote-tracking branch 'origin/clifford/fix1065...
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2019-06-04
Eddie Hung
Rename shregmap -tech xilinx -> xilinx_dynamic
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2019-06-04
Eddie Hung
Add log_assert to ensure no loops
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2019-06-04
Eddie Hung
Only toposort builtin and abc types
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2019-06-04
Eddie Hung
Add space between -D and _ABC
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2019-06-04
Eddie Hung
Add (* abc_flop_q *) to brams_bb.v
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2019-06-04
Eddie Hung
Fix name clash
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2019-06-04
Eddie Hung
Add mux_map.v for wide mux
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2019-06-04
Eddie Hung
Move ff_map back after ABC for shregmap
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2019-06-04
Eddie Hung
Respect -nocarry
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2019-06-04
Eddie Hung
Fix pmux2shiftx logic
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2019-06-04
Eddie Hung
Merge mistake
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2019-06-04
Eddie Hung
Merge remote-tracking branch 'origin/master' into xc7mux
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2019-06-04
Eddie Hung
Merge pull request #1061 from YosysHQ/eddie/techmap_and_arit...
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2019-06-04
Eddie Hung
Typo
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2019-06-04
Eddie Hung
Remove extra newline
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2019-06-04
Eddie Hung
IS_C_INVERTED
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2019-06-04
Eddie Hung
Execute techmap and arith_map simultaneously
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2019-06-03
Eddie Hung
Fix `ifndef
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2019-06-03
Eddie Hung
Make SB_LUT4 a whitebox, SB_DFF a blackbox (for now)
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2019-06-03
Eddie Hung
Assert that box_unique_id is indeed unique
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2019-06-03
Eddie Hung
Remove dupe
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2019-06-03
Eddie Hung
Skip internal modules when generating box_unique_id
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2019-06-03
Eddie Hung
When creating new holes cell, inherit parameters too
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2019-06-03
Eddie Hung
Ooopsie
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2019-06-03
Eddie Hung
Consistent with xilinx
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2019-06-01
Eddie Hung
Add flops as blackboxes
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2019-06-01
Eddie Hung
Add FD*E_1 -> FD*E techmap rules
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2019-06-01
Eddie Hung
Techmap flops before ABC again
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2019-06-01
Eddie Hung
parse_xaiger to cope with flops
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2019-05-31
Eddie Hung
ABC9 to understand flops
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2019-05-31
Eddie Hung
Merge branch 'xaig' into xc7mux
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2019-05-31
Eddie Hung
Throw out unused code inherited from abc
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2019-05-30
Eddie Hung
Fix issue where keep signal became PI, but also box...
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