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Added support for scripts with labels
2014-07-21
Clifford Wolf
Added support for scripts with labels
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2014-07-21
Clifford Wolf
Replaced depricated NEW_WIRE macro with module->addWire...
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2014-07-21
Clifford Wolf
Removed deprecated module->new_wire()
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2014-07-21
Clifford Wolf
Wider range of cell types supported in "share" pass
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2014-07-21
Clifford Wolf
Bugfix in satgen for cells with wider in- than outputs.
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2014-07-21
Clifford Wolf
Added module->remove(), module->addWire(), module-...
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2014-07-21
Clifford Wolf
Added log_ping()
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2014-07-21
Clifford Wolf
Use ezSAT::non_incremental() in "share" pass
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2014-07-21
Clifford Wolf
Added ezSAT::keep_cnf() and ezSAT::non_incremental()
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2014-07-20
Clifford Wolf
Fixed ezSAT stand-alone build
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2014-07-20
Clifford Wolf
Updated minisat
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2014-07-20
Clifford Wolf
Using relative path names in minisat headers
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2014-07-20
Clifford Wolf
Added yet another resource sharing test case
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2014-07-20
Clifford Wolf
Added support for resource sharing in mux control logic
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2014-07-20
Clifford Wolf
Added "select -assert-count"
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2014-07-20
Clifford Wolf
Supercell creation for $div/$mod worked all along,...
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2014-07-20
Clifford Wolf
Improved tests/share/generate.py
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2014-07-20
Clifford Wolf
Fixed creation of shift supercells in "share" pass
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2014-07-20
Clifford Wolf
Small fix in tests/vloghtb/run-test.sh
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2014-07-20
Clifford Wolf
Activated tests/share in "make test"
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2014-07-20
Clifford Wolf
Added "miter -equiv -flatten"
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2014-07-20
Clifford Wolf
Added call_on_selection() and call_on_module() API
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2014-07-20
Clifford Wolf
Added tests/vloghtb/test_share.sh
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2014-07-20
Clifford Wolf
Added tests/share for testing "share" supercell creation
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2014-07-20
Clifford Wolf
Added "share" supercell creation
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2014-07-20
Clifford Wolf
Added removing of always inactive cells to "share"...
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2014-07-20
Clifford Wolf
Progress in "share" pass
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2014-07-20
Clifford Wolf
Added std::set<RTLIL::SigBit> to RTLIL::SigSpec conversion
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2014-07-20
Clifford Wolf
Added SIZE() macro
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2014-07-20
Clifford Wolf
Added log_cell()
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2014-07-20
Clifford Wolf
Progress in "share" pass
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2014-07-20
Clifford Wolf
Added tests/vloghtb
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2014-07-20
Clifford Wolf
Use functions instead of always blocks for $mux/$pmux...
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2014-07-19
Clifford Wolf
Added support for $bu0 to verilog backend
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2014-07-19
Clifford Wolf
Started to implement real resource sharing
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2014-07-19
Clifford Wolf
Fixed log_id() memory corruption
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2014-07-19
Clifford Wolf
Improved memory_share log messages
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2014-07-19
Clifford Wolf
More verbose memory_share help message
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2014-07-19
Clifford Wolf
Added SAT-based write-port sharing to memory_share
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2014-07-19
Clifford Wolf
Added ModWalker helper class
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2014-07-19
Clifford Wolf
Some "const" cleanups in SigMap
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2014-07-19
Clifford Wolf
Fixed bug in memory_share feedback-to-en code
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2014-07-18
Clifford Wolf
Added translation from read-feedback to en-signals...
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2014-07-18
Clifford Wolf
Improved seeding of color rng in show command
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2014-07-18
Clifford Wolf
Only create collision detect logic in memory_share...
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2014-07-18
Clifford Wolf
Bugfix in tests/memories/run-test.sh
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2014-07-18
Clifford Wolf
added tests/memories
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2014-07-18
Clifford Wolf
Added memory_share
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2014-07-18
Clifford Wolf
Added automatic conversion from RTLIL::SigSpec to std...
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2014-07-18
Clifford Wolf
Apply opt_reduce WR_EN opts to the whole mux tree driving...
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2014-07-18
Clifford Wolf
Added function-like cell creation helpers
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2014-07-18
Clifford Wolf
Added log_id() helper function
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2014-07-17
Clifford Wolf
Also simulate unmapped memories in "make test"
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2014-07-17
Clifford Wolf
Implemented dynamic bit-/part-select for memory writes
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2014-07-17
Clifford Wolf
Fixed simlib.v model for $mem
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2014-07-17
Clifford Wolf
Added support for bit/part select to mem2reg rewriter
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2014-07-17
Clifford Wolf
Added support for constant bit- or part-select for...
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2014-07-17
Clifford Wolf
Improved opt_reduce handling of mem wr_en mux bits
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2014-07-17
Clifford Wolf
Fixed RTLIL::SigSpec::append_bit() for appending constants
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2014-07-17
Clifford Wolf
Added support for "blackbox" attribute to iopadmap
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2014-07-17
Clifford Wolf
Added support for "blackbox" attribute to flatten/techmap
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2014-07-16
Clifford Wolf
Added "inout" ports support to read_liberty
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2014-07-16
Clifford Wolf
Set blackbox attribute in "read_liberty -lib"
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2014-07-16
Clifford Wolf
Fixed spelling of "direction" in read_liberty messages
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2014-07-16
Clifford Wolf
Merged new $mem/$memwr WR_EN interface
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2014-07-16
Clifford Wolf
Changed tests/techmap/mem_simple_4x1_map for new $mem...
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2014-07-16
Clifford Wolf
improved opt_reduce for $mem/$memwr WR_EN multiplexers
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2014-07-16
Clifford Wolf
changes in verilog frontend for new $mem/$memwr WR_EN...
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2014-07-16
Clifford Wolf
Changes to "memory" pass for new $memwr/$mem WR_EN...
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2014-07-16
Clifford Wolf
Updated simlib to new $mem/$memwr interface
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2014-07-16
Clifford Wolf
Changed the $mem/$memwr WR_EN input to a per-data-bit...
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2014-07-16
Clifford Wolf
Added note to "make test": use git checkout of iverilog
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2014-07-12
Clifford Wolf
Added passing of various options to vhdl2verilog
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2014-07-11
Clifford Wolf
Use "verilog -sv" to parse .sv files
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2014-07-11
Clifford Wolf
Fixed processing of initial values for block-local...
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2014-07-05
Clifford Wolf
now ignore init attributes on non-register wires in...
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2014-07-02
Clifford Wolf
fixed parsing of constant with comment between size...
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2014-07-02
Clifford Wolf
small changes in presentation
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2014-06-29
Clifford Wolf
Tiny fix in presentation
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2014-06-29
Clifford Wolf
Progress in presentation
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2014-06-28
Clifford Wolf
Added links to some liberty files to README
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2014-06-26
Clifford Wolf
Progress in presentation
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2014-06-25
Clifford Wolf
Fixed handling of mixed real/int ternary expressions
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2014-06-24
Clifford Wolf
More found_real-related fixes to AstNode::detectSignWidthWorker
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2014-06-22
Clifford Wolf
Progress in presentation
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2014-06-21
Clifford Wolf
Little steps in realmath test bench
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2014-06-21
Clifford Wolf
fixed signdness detection for expressions with reals
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2014-06-21
Clifford Wolf
fixed typo
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2014-06-21
Clifford Wolf
Progress in presentation
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2014-06-19
Clifford Wolf
Do not create $dffsr cells with no-op resets in proc_dff
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2014-06-17
Clifford Wolf
Added test case for AstNode::MEM2REG_FL_CMPLX_LHS
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2014-06-17
Clifford Wolf
Added AstNode::MEM2REG_FL_CMPLX_LHS
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2014-06-17
Clifford Wolf
Improved handling of relational op of real values
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2014-06-16
Clifford Wolf
Little steps in realmath test bench
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2014-06-16
Clifford Wolf
Improved ternary support for real values
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2014-06-16
Clifford Wolf
Use undef (x/z vs. NaN) rules for real values from...
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2014-06-16
Clifford Wolf
Fixed parsing of TOK_INTEGER (implies TOK_SIGNED)
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2014-06-16
Clifford Wolf
Added found_real feature to AstNode::detectSignWidth
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2014-06-15
Clifford Wolf
Added more calls to "hierarchy" to README file
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2014-06-15
Clifford Wolf
Removed long running tests from tests/simple/realexpr...
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