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Added nlutmap
2015-09-18
Clifford Wolf
Added nlutmap
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2015-09-18
Clifford Wolf
Added lut2mux pass
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2015-09-18
Clifford Wolf
Cosmetic fix in Module::addLut()
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2015-09-18
Clifford Wolf
Added buffer detection to "abc -lut"
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2015-09-18
Clifford Wolf
Renamed GreenPAK4 cells, improved GP4 DFF mapping
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2015-09-18
Clifford Wolf
Added support for "dfflibmap -liberty +/..."
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2015-09-18
Clifford Wolf
Added detection of "mux inverter" chains in opt_const
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2015-09-18
Clifford Wolf
Added $logic_not handling to fsm_detect
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2015-09-18
Clifford Wolf
Added $finish and $display to README
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2015-09-18
Clifford Wolf
Merge branch 'feat-finish-disp'
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2015-09-18
Clifford Wolf
Added AST_INITIAL checks for $finish and $display
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2015-09-16
Clifford Wolf
Fixed copy&paste typo in synth_greenpak4
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2015-09-16
Clifford Wolf
Added GreenPAK4 skeleton
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2015-09-12
Clifford Wolf
Fixed sharing of $memrd cells
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2015-09-10
Clifford Wolf
Fixed ice40 handling of negclk RAM40
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2015-09-01
Clifford Wolf
Fixed port ordering in "splitnets" cmd
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2015-09-01
Clifford Wolf
gcc-4.6 build fixes
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2015-08-31
Clifford Wolf
Fixed iopadmap help message
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2015-08-31
Clifford Wolf
Added SigMap::allbits()
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2015-08-31
Clifford Wolf
Using dict<> and pool<> in alumacc pass
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2015-08-31
Clifford Wolf
Added "yosys-smt2-wire" tag support to smt2 back-end
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2015-08-22
Clifford Wolf
Fixed handling of memory read without address
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2015-08-22
Clifford Wolf
Switched to Python 3
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2015-08-18
Clifford Wolf
Added sat -show-regs, -show-public, -show-all
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2015-08-18
Clifford Wolf
Bugfix in fsm_detect for complex muxtrees
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2015-08-18
Clifford Wolf
Properly clean up unused "init" attributes
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2015-08-17
Clifford Wolf
Small corrections to const2ast warning messages
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2015-08-17
Clifford Wolf
Merge pull request #72 from cseed/master
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2015-08-16
Clifford Wolf
Another bugfix for ice40 and xilinx brams_init make...
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2015-08-16
Clifford Wolf
Fixed Makefile rules for generated share files
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2015-08-16
Clifford Wolf
Added $tribuf and $_TBUF_ sim models
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2015-08-16
Clifford Wolf
Added tribuf command
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2015-08-16
Clifford Wolf
Added $tribuf and $_TBUF_ cell types
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2015-08-16
Clifford Wolf
Fixed opt_clean handling of inout ports
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2015-08-15
Clifford Wolf
Fixed generation of smt2 concat statements
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2015-08-14
Clifford Wolf
Re-created command-reference-manual.tex, copied some...
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2015-08-14
Clifford Wolf
Spell check (by Larry Doolittle)
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2015-08-13
Clifford Wolf
Merge branch 'master' of github.com:cliffordwolf/yosys
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2015-08-13
Clifford Wolf
More ASCII encoding fixes
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2015-08-13
Clifford Wolf
Fixed CRLF line endings
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2015-08-13
Clifford Wolf
Some ASCII encoding fixes (comments and docs) by Larry...
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2015-08-12
Clifford Wolf
Added "write_smt2 -regs"
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2015-08-12
Clifford Wolf
Fixed "make clean" for out-of-tree builds
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2015-08-12
Clifford Wolf
Adjust makefiles to work with out-of-tree builds
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2015-08-12
Clifford Wolf
Improved handling of "keep" attributes in hierarchical...
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2015-08-12
Clifford Wolf
Fixed hashlib for 64 bit int keys
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2015-08-12
Clifford Wolf
Added SMV back-end 'test_cells.sh' script
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2015-08-12
Clifford Wolf
Merge pull request #70 from gaomy3832/bugfix
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2015-08-11
Clifford Wolf
Fixed handling of [a-fxz?] in decimal constants
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2015-08-11
Clifford Wolf
Added missing ct_all setup to opt_clean
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2015-08-09
Clifford Wolf
Use MEMID as name for $mem cell
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2015-08-06
Clifford Wolf
Merge pull request #69 from zeldin/master
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2015-08-05
Clifford Wolf
Remove some very strange whitespace in btor.cc (by...
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2015-08-05
Clifford Wolf
Bugfix in SMV back-end for partially unassigned wires
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2015-08-04
Clifford Wolf
Added ENABLE_LIBYOSYS Makefile option
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2015-08-04
Clifford Wolf
Added $assert support to SMV back-end
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2015-08-04
Clifford Wolf
Added libyosys.so build
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2015-08-01
Clifford Wolf
Merge pull request #68 from zeldin/master
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2015-07-31
Clifford Wolf
Added WORDS parameter to $meminit
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2015-07-30
Clifford Wolf
Fixed flatten $meminit handling
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2015-07-29
Clifford Wolf
Improvements in BLIF back-end
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2015-07-29
Clifford Wolf
Fixed nested mem2reg
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2015-07-27
Clifford Wolf
Don't write a 17th memory bit in ice40/cells_sim (by...
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2015-07-27
Clifford Wolf
Fixed "check" command for inout ports
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2015-07-25
Clifford Wolf
Some cleanups in opt_rmdff
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2015-07-25
Clifford Wolf
Added "miter -assert"
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2015-07-25
Clifford Wolf
Keep modules with $assume (like $assert)
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2015-07-24
Clifford Wolf
Improved $adff simplification
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2015-07-20
Clifford Wolf
iCE40 DFF sim models: init Q regs to 0
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2015-07-18
Clifford Wolf
Fixed techmap processes error msg
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2015-07-18
Clifford Wolf
Avoid tristate warning for blackbox ice40/cells_sim.v
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2015-07-16
Clifford Wolf
Some fixes in "select" command
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2015-07-10
Clifford Wolf
Fixed YosysJS.create_worker() usage of this.url_prefix
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2015-07-06
Clifford Wolf
Improved liberty file test case
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2015-07-06
Clifford Wolf
Updated ABC
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2015-07-06
Clifford Wolf
Do not collect disabled $memwr cells
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2015-07-04
Clifford Wolf
Improved YosysJS WebWorker API
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2015-07-03
Clifford Wolf
Bugfix in fsm_extract
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2015-07-02
Clifford Wolf
Added "synth -nofsm"
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2015-07-02
Clifford Wolf
Fixed trailing whitespaces
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2015-07-01
Clifford Wolf
Added opt_const -clkinv
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2015-06-30
Clifford Wolf
Added logic-loop error handling to freduce
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2015-06-29
Clifford Wolf
Merge branch 'master' of github.com:cliffordwolf/yosys
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2015-06-29
Clifford Wolf
Bugfix in chparam
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2015-06-29
Clifford Wolf
Added design->rename(module, new_name)
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2015-06-28
Clifford Wolf
Added YosysJS.create_worker()
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2015-06-20
Clifford Wolf
iCE40: set min bram efficiency to 2%
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2015-06-20
Clifford Wolf
Using static mem size of 128 MB in emcc build
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2015-06-19
Clifford Wolf
Added init support to SMV back-end
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2015-06-19
Clifford Wolf
Progress in SMV back-end
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2015-06-19
Clifford Wolf
Progress in SMV back-end
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2015-06-18
Clifford Wolf
Progress in SMV back-end
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2015-06-17
Clifford Wolf
Progress in SMV back-end
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2015-06-17
Clifford Wolf
Added "rename -top new_name"
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2015-06-17
Clifford Wolf
Progress in SMV back-end
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2015-06-16
Clifford Wolf
Progress in SMV back-end
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2015-06-15
Clifford Wolf
Added "synth -nordff -noalumacc"
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2015-06-15
Clifford Wolf
Progress in SMV back-end
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2015-06-15
Clifford Wolf
Progress in SMV back-end
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2015-06-14
Clifford Wolf
Added "write_smv" skeleton
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