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mem: Transition away from isSupplyExclusive for writebacks
2015-07-30
Andreas Hansson
mem: Transition away from isSupplyExclusive for writebacks
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2015-07-30
Andreas Hansson
mem: Tidy up CacheBlk class
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2015-07-30
Andreas Hansson
mem: Tidy up packet
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2015-07-30
Andreas Hansson
stats: Bump stats to match current behaviour
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2015-07-30
Andreas Hansson
cpu: Fix issue identified by UBSan
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2015-07-13
Andreas Hansson
mem: Fix (ab)use of emplace to avoid temporary object...
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2015-07-13
Andreas Hansson
mem: Updated DRAMSim2 wrapper to new drain API
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2015-07-03
Andreas Hansson
stats: Update stats for cache, crossbar and DRAM changes
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2015-07-03
Andreas Hansson
mem: Increase the default buffer sizes for the DDR4...
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2015-07-03
Andreas Hansson
mem: Avoid DRAM write queue iteration for merging and...
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2015-07-03
Andreas Hansson
mem: Delay responses in the crossbar before forwarding
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2015-07-03
Andreas Hansson
mem: Remove redundant is_top_level cache parameter
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2015-07-03
Andreas Hansson
mem: Split WriteInvalidateReq into write and invalidate
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2015-07-03
Andreas Hansson
mem: Add ReadCleanReq and ReadSharedReq packets
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2015-07-03
Andreas Hansson
mem: Allow read-only caches and check compliance
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2015-07-03
Andreas Hansson
mem: Convert Request static const flags to enums
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2015-07-03
Andreas Hansson
util: Remove DRAMPower trace script
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2015-07-03
Andreas Hansson
scons: Bump compiler requirement to gcc >= 4.7 and...
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2015-06-09
Andreas Hansson
mem: Fix snoop packet data allocation bug
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2015-06-09
Andreas Hansson
scons: Allow GNU assembler version strings with hyphen
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2015-05-26
Andreas Hansson
arm, stats: Update stats to reflect reduction in misc...
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2015-05-26
Andreas Hansson
base: Allow multiple interleaved ranges
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2015-05-26
Andreas Hansson
stats: Update MinorCPU regressions after accounting fix
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2015-05-26
Andreas Hansson
ruby: Deprecation warning for RubyMemoryControl
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2015-05-15
Andreas Hansson
arm: Identify table-walker requests
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2015-05-15
Andreas Hansson
misc: Appease gcc 5.1
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2015-05-15
Andreas Hansson
config: Use null memory for DRAM sweep script
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2015-05-05
Andreas Hansson
stats, arm: Update stats for missing FPEXC.EN check
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2015-05-05
Andreas Hansson
arm: Add missing FPEXC.EN check
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2015-05-05
Andreas Hansson
stats: Update stats to reflect cache changes
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2015-05-05
Andreas Hansson
arm: Remove unnecessary boot uncachability
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2015-05-05
Andreas Hansson
mem: Snoop into caches on uncacheable accesses
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2015-05-05
Andreas Hansson
arch, cpu: Do not forward snoops to table walker
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2015-05-05
Andreas Hansson
mem: Pass shared downstream through caches
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2015-05-05
Andreas Hansson
mem: Add missing stats update for uncacheable MSHRs
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2015-05-05
Andreas Hansson
mem: Tidy up BaseCache parameters
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2015-05-05
Andreas Hansson
cpu: Work around gcc 4.9 issues with Num_OpClasses
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2015-05-05
Andreas Hansson
stats: Bring regression stats in line with actual behaviour
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2015-04-24
Andreas Hansson
misc: Appease gcc 5.1 without moving GDB_REG_BYTES
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2015-04-23
Andreas Hansson
misc: Appease gcc 5.1
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2015-04-20
Andreas Hansson
cpu: Remove the InOrderCPU from the tree
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2015-04-20
Andreas Hansson
config: Remove memory aliases and rely on class name
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2015-03-27
Andreas Hansson
arm, configs: Do not forward snoops from I cache
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2015-03-27
Andreas Hansson
mem: Allocate cache writebacks before new MSHRs
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2015-03-27
Andreas Hansson
mem: Cleanup flow for uncacheable accesses
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2015-03-27
Andreas Hansson
mem: Ignore uncacheable MSHRs when finding matches
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2015-03-27
Andreas Hansson
mem: Remove redundant allocateUncachedReadBuffer in...
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2015-03-27
Andreas Hansson
mem: Modernise MSHR iterators to C++11
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2015-03-27
Andreas Hansson
tests: Update stats for cache block alignment
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2015-03-27
Andreas Hansson
mem: Align all MSHR entries to block boundaries
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2015-03-26
Andreas Hansson
cpu: Fix InstPBTrace inheritance
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2015-03-23
Andreas Hansson
mem: Tidy up Request
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2015-03-23
Andreas Hansson
tests: Final reclassification of quick regressions
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2015-03-19
Andreas Hansson
tests: Recategorise regressions based on run time
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2015-03-19
Andreas Hansson
config: Add soak test for memtest.py
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2015-03-19
Andreas Hansson
mem: Use emplace front/back for deferred packets
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2015-03-19
Andreas Hansson
config: Fix DRAM rank option in sweep script
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2015-03-19
Andreas Hansson
tests: Bump timeout to 5 hours
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2015-03-02
Andreas Hansson
stats: Update stats to reflect cache and interconnect...
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2015-03-02
Andreas Hansson
mem: Unify all cache DPRINTF address formatting
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2015-03-02
Andreas Hansson
mem: Fix cache MSHR conflict determination
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2015-03-02
Andreas Hansson
mem: Add byte mask to Packet::checkFunctional
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2015-03-02
Andreas Hansson
mem: Move crossbar default latencies to subclasses
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2015-03-02
Andreas Hansson
arm: Share a port for the two table walker objects
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2015-03-02
Andreas Hansson
mem: Tidy up the cache debug messages
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2015-03-02
Andreas Hansson
mem: Split port retry for all different packet classes
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2015-03-02
Andreas Hansson
tests: Run regression timeout as foreground
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2015-02-16
Andreas Hansson
config: Add memcheck stress test
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2015-02-16
Andreas Hansson
cpu: TrafficGen sinks snoops without complaining
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2015-02-16
Andreas Hansson
dev: Fix undefined behaviuor in i8254xGBe
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2015-02-16
Andreas Hansson
mem: mmap the backing store with MAP_NORESERVE
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2015-02-16
Andreas Hansson
mem: Use the range cache for lookup as well as access
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2015-02-16
Andreas Hansson
arch: Make readMiscRegNoEffect const throughout
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2015-02-11
Andreas Hansson
config: Revamp memtest to allow testers on any level
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2015-02-11
Andreas Hansson
stats: Bump the MemTest regression stats
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2015-02-11
Andreas Hansson
cpu: Tidy up the MemTest and make false sharing more...
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2015-02-11
Andreas Hansson
base: Do not dereference NULL in CompoundFlag creation
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2015-02-03
Andreas Hansson
mem: Clarify express snoop behaviour
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2015-02-03
Andreas Hansson
mem: Clarify cache behaviour for pending dirty responses
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2015-02-03
Andreas Hansson
config: Add XOR hashing to the DRAM channel interleaving
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2015-02-03
Andreas Hansson
base: Add XOR-based hashed address interleaving
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2015-02-03
Andreas Hansson
config: Adjust DRAM channel interleaving defaults
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2015-02-03
Andreas Hansson
scons: Avoid implicit command dependencies
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2015-02-03
Andreas Hansson
cpu: Ensure timing CPU sinks response before sending...
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2015-01-22
Andreas Hansson
mem: Remove unused Packet src and dest fields
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2015-01-22
Andreas Hansson
mem: Remove Packet source from ForwardResponseRecord
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2015-01-22
Andreas Hansson
mem: Remove unused RequestState in the bridge
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2015-01-22
Andreas Hansson
mem: Always use SenderState for response routing in...
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2015-01-22
Andreas Hansson
mem: Make the XBar responsible for tracking response...
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2015-01-22
Andreas Hansson
stats: Update stats to reflect x86 table walker changes
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2015-01-22
Andreas Hansson
x86: Delay X86 table walk on receiving walker response
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2015-01-22
Andreas Hansson
mem: Clean up Request initialisation
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2015-01-20
Andreas Hansson
scons: Do not build the InOrderCPU
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2015-01-20
Andreas Hansson
tests: Remove deprecated InOrderCPU tests
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2015-01-20
Andreas Hansson
mem: Fix bug in cache request retry mechanism
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2015-01-20
Andreas Hansson
cpu: Fix retry bug in MinorCPU LSQ
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2015-01-20
Andreas Hansson
mem: Move DRAM interleaving check to init
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2014-12-23
Andreas Hansson
stats: Bump stats for decoder, TLB, prefetcher and...
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2014-12-23
Andreas Hansson
config: Expose the DRAM ranks as a command-line option
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2014-12-23
Andreas Hansson
mem: Ensure DRAM controller is idle when in atomic...
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