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memory_share: Don't skip ports with EN wired to input for SAT sharing.
2021-08-04 Marcelina Kościelnickamemory_share: Don't skip ports with EN wired to input...
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2021-08-03 Marcelina Kościelnickamemory_bram: Move init data swizzling before other...
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2021-08-01 Marcelina Kościelnickabackend/verilog: Add alternate mode for transparent...
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2021-08-01 Marcelina Kościelnickamemory_bram: Some refactoring
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2021-07-29 Marcelina Kościelnickaopt_lut: Allow more than one -dlogic per cell type.
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2021-07-28 Marcelina Kościelnickaverilog: Emit $meminit_v2 cell.
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2021-07-28 Marcelina Kościelnickabackends/verilog: Support meminit with mask.
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2021-07-28 Marcelina Kościelnickamemory: Introduce $meminit_v2 cell, with EN input.
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2021-07-27 Marcelina Kościelnickaproc: Run opt_expr at the end
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2021-07-27 Marcelina Kościelnickaopt_expr: Propagate constants to port connections.
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2021-07-13 Marcelina Kościelnickakernel/mem: Add a coalesce_inits helper.
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2021-07-12 Marcelina Kościelnickakernel/mem: Use delayed removal for inits as well.
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2021-07-12 Marcelina Kościelnickakernel/mem: Add documentation for more helper functions.
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2021-07-12 Marcelina Kościelnickacxxrtl: Support memory writes in processes.
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2021-07-12 Marcelina Kościelnickacxxrtl: Add support for memory read port reset.
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2021-07-12 Marcelina Kościelnickacxxrtl: Add support for mem read port initial data.
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2021-07-12 Marcelina Kościelnickacxxrtl: Convert to Mem helpers.
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2021-07-12 Marcelina Kościelnickakernel/mem: Commit new values of attributes in emit.
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2021-07-12 Marcelina Kościelnickakernel/mem: Make the Mem helpers inherit from AttrObject.
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2021-07-11 Marcelina Kościelnickartlil: Make Process handling more uniform with Cell...
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2021-07-10 Marcelina Kościelnickaice40: Fix LUT input indices in opt_lut -dlogic (again).
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2021-06-14 Marcelina Kościelnickaverilog: Squash a memory leak.
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2021-06-11 Marcelina KościelnickaAdd regression test for #2824.
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2021-06-09 Marcelina Kościelnickaopt_expr: Fix mul/div/mod by POT patterns to support...
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2021-06-09 Marcelina Kościelnickaopt_expr: Optimize div/mod by const 1.
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2021-06-01 Marcelina Kościelnickakernel/mem: Recognize some deprecated memory port configs.
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2021-05-31 Marcelina Kościelnickamemory_map: Improve start_offset handling.
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2021-05-29 Marcelina Kościelnickamemory_share: Add read port merging.
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2021-05-28 Marcelina Kościelnickamemory_share: Improve sat-based port sharing.
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2021-05-27 Marcelina KościelnickaMake a few passes auto-call Mem::narrow instead of...
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2021-05-27 Marcelina Kościelnickabackends/verilog: Add support for memory read port...
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2021-05-27 Marcelina Kościelnickabackends/verilog: Add wide port support.
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2021-05-27 Marcelina Kościelnickamemory_share: Improve same-address merging, recognize...
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2021-05-27 Marcelina Kościelnickakernel/mem: Add helpers for write port widening.
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2021-05-26 Marcelina Kościelnickakernel/mem: Add sub_addr helpers.
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2021-05-26 Marcelina Kościelnickakernel/mem: Add prepare_wr_merge helper.
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2021-05-25 Marcelina Kościelnickabackends/verilog: Try to preserve mem write port priorities.
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2021-05-25 Marcelina Kościelnickamem/extract_rdff: Fix "no FF made" edge case.
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2021-05-25 Marcelina Kościelnickamemory_bram: Reuse extract_rdff helper for make_outreg.
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2021-05-25 Marcelina Kościelnickamem/extract_rdff: Add alternate transparency handling.
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2021-05-25 Marcelina Kościelnickaopt_mem: Add reset/init value support.
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2021-05-25 Marcelina Kościelnickakernel/mem: Add model support for read port init value...
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2021-05-25 Marcelina Kościelnickamem/extract_rdff: Fix wire naming and wide port support.
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2021-05-25 Marcelina Kościelnickamemory_bram: Respect write port priority.
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2021-05-25 Marcelina Kościelnickaopt_mem_feedback: Respect write port priority.
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2021-05-25 Marcelina Kościelnickakernel/mem: Add emulate_priority helper.
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2021-05-25 Marcelina KościelnickaAdd memory_narrow pass.
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2021-05-25 Marcelina Kościelnickamemory_share: Add wide port support.
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2021-05-25 Marcelina Kościelnickaopt_mem_feedback: Add wide port support.
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2021-05-25 Marcelina Kościelnickamemory_map: Add wide port support.
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2021-05-25 Marcelina Kościelnickasim: Add wide port support.
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2021-05-25 Marcelina KościelnickaReject wide ports in some passes that will never support...
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2021-05-25 Marcelina Kościelnickakernel/mem: Add a Mem::narrow helper to split up wide...
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2021-05-25 Marcelina Kościelnickakernel/mem: Emit support for wide ports in packed mode.
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2021-05-25 Marcelina Kościelnickakernel/mem: Add model for wide ports.
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2021-05-24 Marcelina Kościelnickakernel/mem: Add priority_mask to model.
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2021-05-24 Marcelina Kościelnickaopt_mem_feedback: Rewrite feedback path finding logic.
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2021-05-24 Marcelina Kościelnickaopt_mem_feedback: Convert to Mem helpers.
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2021-05-24 Marcelina Kościelnickahashlib: Add a hash for bool.
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2021-05-24 Marcelina KościelnickaAdd a .mailmap file.
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2021-05-24 Marcelina KościelnickaRemove Travis CI.
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2021-05-24 Marcelina Kościelnickabackend/firrtl: Convert to use Mem helpers.
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2021-05-24 Marcelina Kościelnickagithub actions: Test on several gcc and clang versions...
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2021-05-23 Marcelina Kościelnickamemory_share: Use Mem helpers.
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2021-05-23 Marcelina Kościelnickaextract_rdff: Add initvals parameter.
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2021-05-23 Marcelina Kościelnickabtor: Use is_mem_cell in one more place.
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2021-05-23 Marcelina Kościelnickamemory_share: Split off feedback path finding as a...
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2021-05-23 Marcelina KościelnickaAdd new helper class for merging FFs into cells, use...
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2021-05-23 Marcelina Kościelnickaopt_mem: Remove write ports with const-0 EN.
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2021-05-22 Marcelina Kościelnickamemory_memx: Use Mem helper.
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2021-05-22 Marcelina Kościelnickakernel/rtlil: Extract some helpers for checking memory...
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2021-05-22 Marcelina Kościelnickakernel/mem: Add a check() function.
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2021-05-22 Marcelina Kościelnickakernel/mem: defer port removal to emit()
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2021-05-21 Marcelina Kościelnickamemory_dff: Use Mem helper.
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2021-05-20 Marcelina KościelnickaBump version
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2021-05-20 Marcelina Kościelnickatests/blif: Add missing gitignore
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2021-05-08 Marcelina Kościelnickablif: Use library cells' start_offset and upto for...
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2021-05-08 Marcelina Kościelnickaconnect: Add -assert option, fix non-working sigmap.
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2021-05-04 Marcelina Kościelnickaopt_dff: Fix NOT gates wired in reverse.
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2021-03-30 Marcelina Kościelnickaequiv: Suggest running async2sync or clk2fflogic where...
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2021-03-30 Marcelina KościelnickaBump version
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2021-03-30 Marcelina Kościelnickapreproc: Fix up conditional handling.
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2021-03-23 Marcelina Kościelnickartlil: Fix process memwr roundtrip.
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2021-03-23 Marcelina Kościelnickaquicklogic: Add .gitignore file for test outputs.
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2021-03-23 Marcelina Kościelnickajson: Improve the "processes in module" message a bit.
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2021-03-18 Marcelina KościelnickaAdd simple CI using github actions.
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2021-03-17 Marcelina Kościelnickaast: Use better parameter serialization for paramod...
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2021-03-15 Marcelina Kościelnickajson: Add support for memories.
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2021-03-15 Marcelina Kościelnickaproc_arst: Add special-casing of clock signal in conditionals.
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2021-03-15 Marcelina Kościelnickaopt_clean: Remove init attribute bits together with...
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2021-03-15 Marcelina Kościelnickartlil: Disallow 0-width chunks in SigSpec.
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2021-03-08 Marcelina KościelnickaBump version
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2021-03-08 Marcelina Kościelnickamemory_dff: Remove now-useless write port handling.
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2021-03-08 Marcelina Kościelnickaverilog: Use proc memory writes in the frontend.
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2021-03-08 Marcelina KościelnickaAdd support for memory writes in processes.
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2021-03-08 Marcelina Kościelnickasim: Avoid a crash on empty cell connection.
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2021-03-08 Marcelina Kościelnickaproc_dff: Fix emitted FF when a register is not assigned...
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2021-03-08 Marcelina Kościelnickamemory_dff: Remove code looking for $mux cells.
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2021-03-08 Marcelina Kościelnickatests/bram: Do not generate write address collisions.
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2021-03-06 Marcelina Kościelnickaproc_clean: Fix empty case removal conditions.
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