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config: Add the ability to read a config file using C++ and Python
2014-10-16 Andreas Hanssonconfig: Add the ability to read a config file using...
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2014-10-16 Andreas Hanssonscons: Add Undefined Behavior Sanitizer (UBSan) option
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2014-10-16 Andreas Hanssonstats: Small bump of trailing stats
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2014-10-09 Andreas Hanssonstats: Add DRAM power statistics to reference output
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2014-10-09 Andreas Hanssonext: Add DRAMPower to enable on-line DRAM power modelling
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2014-10-09 Andreas Hanssonconfig: Add Current as a parameter type
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2014-10-09 Andreas Hanssonscons: Warn for known gcc and swig incompatibilities
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2014-10-09 Andreas Hanssonmem: Add packet sanity checks to cache and MSHRs
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2014-10-09 Andreas Hanssonmem: Allow packet queue to move next send event forward
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2014-10-01 Andreas Hanssonmisc: Fix issues identified by static analysis
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2014-10-01 Andreas Hanssonarm: Use MiscRegIndex rather than int when flattening
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2014-10-01 Andreas Hanssonarm: More UBSan cleanups after additional full-system...
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2014-09-28 Andreas Hanssonstats: Update stats to reflect ARM fixes
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2014-09-27 Andreas Hanssonarm: Fixed undefined behaviours identified by gcc
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2014-09-27 Andreas Hanssonarch: Use const StaticInstPtr references where possible
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2014-09-27 Andreas Hanssonscons: Address issues related to gcc 4.9.1
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2014-09-27 Andreas Hanssonmisc: Fix a bunch of minor issues identified by static...
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2014-09-20 Andreas Hanssonstats: Bump stats for filter, crossbar and config changes
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2014-09-20 Andreas Hanssontests: Use more representative configs for ARM tests
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2014-09-20 Andreas Hanssonmem: Rename Bus to XBar to better reflect its behaviour
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2014-09-20 Andreas Hanssontests: Add a memtest version using the ideal SnoopFilter
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2014-09-20 Andreas Hanssonbase: Clean up redundant string functions and use C++11
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2014-09-19 Andreas Hanssonarch: Pass faults by const reference where possible
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2014-09-19 Andreas Hanssoncpu: Use a deque in o3 rename instruction queue
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2014-09-19 Andreas Hanssonbase: Ensure the CP annotation compiles again
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2014-09-19 Andreas Hanssonmisc: Use safe_cast when assumptions are made about...
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2014-09-19 Andreas Hanssonmisc: Restore ostream flags where needed
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2014-09-19 Andreas Hanssonstats: Fix flow-control bug in Vector2D printing
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2014-09-19 Andreas Hanssonmisc: Remove assertions ensuring unsigned values >= 0
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2014-09-19 Andreas Hanssonmem: Check return value of checkFunctional in SimpleMemory
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2014-09-19 Andreas Hanssonmem: Add checks to sendTimingReq in cache
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2014-09-12 Andreas Hanssonstats: Minor update of Minor stats after uncacheable fix
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2014-09-12 Andreas Hanssonminor: Fix typo in DPRINTF for Minor branch prediction
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2014-09-09 Andreas Hanssonmisc: Fix a number of unitialised variables and members
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2014-09-03 Andreas Hanssonstats: Update stats for CPU and cache changes
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2014-09-03 Andreas Hanssontests: Use medium dataset for perlbmk regressions
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2014-09-03 Andreas Hanssonalpha: Stop using 'inorder' and rely entirely on 'minor'
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2014-09-03 Andreas Hanssonbase: Use STL C++11 random number generation
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2014-09-03 Andreas Hanssonbase: Use the global Mersenne twister throughout
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2014-09-03 Andreas Hanssonmem: Avoid unecessary retries when bus peer is not...
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2014-09-03 Andreas Hanssonmem: Fix a bug in the cache port flow control
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2014-09-03 Andreas Hanssontests: Use O3_ARM_v7a config for full-system ARM regressions
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2014-09-03 Andreas Hanssonmem: Add utility script to plot DRAM efficiency sweep
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2014-09-03 Andreas Hanssonmem: Packet queue clean up
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2014-09-03 Andreas Hanssonarch: Cleanup unused ISA traits constants
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2014-09-03 Andreas Hanssonarm: Fix ExtMachInst hash operator underlying type
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2014-08-26 Andreas Hanssonmem: Fix DRAMSim2 cycle check when restoring from checkpoint
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2014-08-26 Andreas Hanssonbase: Add const to intmath and be more flexible with...
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2014-08-26 Andreas Hanssonmem: Update DRAM controller comments
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2014-08-26 Andreas Hanssonmem: Fix address interleaving bug in DRAM controller
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2014-08-26 Andreas Hanssonmisc: README direct to website for dependencies
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2014-08-13 Andreas Hanssoncpu: Modernise the branch predictor (STL and C++11)
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2014-08-10 Andreas Hanssoncpu: Ensure the traffic generator suppresses non-memory...
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2014-08-10 Andreas Hanssonbase: Remove unused files
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2014-08-10 Andreas Hanssonscons: Warn for incompatible gcc and binutils
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2014-07-28 Andreas Hanssonstats: Bump stats for the regressions using the minor CPU
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2014-06-30 Andreas Hanssonmem: DRAMPower trace formatting script
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2014-06-30 Andreas Hanssonmem: DRAMPower trace output
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2014-06-30 Andreas Hanssonmem: Add bank and rank indices as fields to the DRAM...
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2014-06-30 Andreas Hanssonmem: Extend DRAM row bits from 16 to 32 for larger...
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2014-06-10 Andreas Hanssonscons: Bump the compiler version to gcc 4.6 and clang 3.0
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2014-05-09 Andreas Hanssonstats: Bump stats for the fixes, and mostly DRAM controller...
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2014-05-09 Andreas Hanssonconfig: Bump DRAM sweep bus speed to match DDR4 config
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2014-05-09 Andreas Hanssontests: Reflect name change in DRAM tests
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2014-05-09 Andreas Hanssonmem: Update DDR3 and DDR4 based on datasheets
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2014-05-09 Andreas Hanssonmem: Add DRAM cycle time
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2014-05-09 Andreas Hanssonmem: Simplify DRAM response scheduling
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2014-05-09 Andreas Hanssonmem: Add precharge all (PREA) to the DRAM controller
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2014-05-09 Andreas Hanssonmem: Remove printing of DRAM params
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2014-05-09 Andreas Hanssonmem: Add tRTP to the DRAM controller
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2014-05-09 Andreas Hanssonmem: Merge DRAM latency calculation and bank state...
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2014-05-09 Andreas Hanssonmem: Add tWR to DRAM activate and precharge constraints
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2014-05-09 Andreas Hanssonmem: Merge DRAM page-management calculations
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2014-05-09 Andreas Hanssonmem: Add DRAM power states to the controller
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2014-05-09 Andreas Hanssonmem: Ensure DRAM refresh respects timings
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2014-05-09 Andreas Hanssonmem: Make DRAM read/write switching less conservative
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2014-04-23 Andreas Hanssonsim: Use correct unit for abort message
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2014-04-22 Andreas Hanssonstats: updates for pc-switcheroo-full due to o3 smt fix
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2014-04-13 Andreas Hanssonscons: Fix python-config parsing by adding strip()
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2014-03-23 Andreas Hanssonstats: Update stats for DRAM changes
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2014-03-23 Andreas Hanssonmem: Track DRAM read/write switching and add hysteresis
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2014-03-23 Andreas Hanssonmem: Rename SimpleDRAM to a more suitable DRAMCtrl
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2014-03-23 Andreas Hanssonmem: Change memory defaults to be more representative
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2014-03-23 Andreas Hanssonmem: DRAM controller tidying up
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2014-03-23 Andreas Hanssonmem: Fix bug in DRAM bytes per activate
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2014-03-23 Andreas Hanssonmem: Limit the accesses to a page before forcing a...
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2014-03-23 Andreas Hanssonmem: Make DRAM write queue draining more aggressive
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2014-03-23 Andreas Hanssonconfig: Add a DRAM efficiency-sweep script
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2014-03-23 Andreas Hanssonmem: More descriptive address-mapping scheme names
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2014-03-23 Andreas Hanssonruby: Move Ruby debug flags to ruby dir and remove...
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2014-03-23 Andreas Hanssonutil: Add support for detection of gzipped packet traces
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2014-03-23 Andreas Hanssonmem: Include the DRAMSim2 wrapper in NULL build
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2014-03-23 Andreas Hanssonext: Fix typo in DRAMSim2 SConscript
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2014-03-23 Andreas Hanssonbase: Fix error message time unit (cycle -> tick)
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2014-03-07 Andreas Hanssoncpu: Make CPU and ThreadContext getters const
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2014-02-24 Andreas Hanssonruby: Simplify RubyPort flow control and routing
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2014-02-19 Andreas Hanssonarm: Bump stats after FS config script update
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2014-02-18 Andreas Hanssonmem: Fix bug in PhysicalMemory use of mmap and munmap
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2014-02-18 Andreas Hanssondev: Include basic devices in NULL ISA build
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2014-02-18 Andreas Hanssonscons: Add PROTOC from the environment
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