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Avoid timing violation on ECP5 PHY PAUSE signal
2022-04-09
Raptor Engineering...
Avoid timing violation on ECP5 PHY PAUSE signal
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2022-04-09
Raptor Engineering...
Revert "Avoid timing violation on ECP5 PHY PAUSE signal"
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2022-04-09
Raptor Engineering...
Avoid timing violation on ECP5 PHY PAUSE signal
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2022-04-09
Raptor Engineering...
Wire up missing CRG / DDR3 clock control / reset signals
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2022-04-07
Raptor Engineering...
Re-apply part of 180026c72f0e1d3ef365b2214288d4a543a238dd
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2022-04-07
Raptor Engineering...
Backport litedram 05ed5bf59d31029d3f91c5a348cdd539a150631b
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2022-04-07
Raptor Engineering...
Working at 50MHz system clock
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2022-04-07
Raptor Engineering...
Switch CRG back over to ECP5 version
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2022-04-07
Raptor Engineering...
Partially revert GIT hash 180026c72f0e1d3ef365b2214288d4a543...
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2022-04-07
Raptor Engineering...
Properly connect reset and cs signals
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2022-04-07
Raptor Engineering...
Add initial support for external DRAM init on the Raptor...
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