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Call copy_to_mode_reg instead of force_reg.
2011-07-22 H.J. LuCall copy_to_mode_reg instead of force_reg.
2011-07-21 H.J. Lu <hongjiu.lu@intel.com>
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2011-07-22 H.J. LuConvert to Pmode if needed and use force_reg after...
2011-07-21 H.J. Lu <hongjiu.lu@intel.com>
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2011-07-21 H.J. LuConvert to Pmode if needed in ix86_legitimize_address.
2011-07-21 H.J. Lu <hongjiu.lu@intel.com>
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2011-07-21 H.J. LuPromote pointer function arguments and return values...
2011-07-21 H.J. Lu <hongjiu.lu@intel.com>
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2011-07-20 H.J. LuHandle address output and call patterns for x32.
2011-07-20 H.J. Lu <hongjiu.lu@intel.com>
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2011-07-15 H.J. LuRemove gcc/testsuite/ prefix.
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2011-07-13 H.J. LuSupport ptr_mode != Pmode in x86_output_mi_thunk.
2011-07-13 H.J. Lu <hongjiu.lu@intel.com>
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2011-07-13 H.J. LuRemove -mfused-madd and add -mfma.
2011-07-13 H.J. Lu <hongjiu.lu@intel.com>
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2011-07-11 H.J. LuCheck ia32 effective target.
2011-07-11 H.J. Lu <hongjiu.lu@intel.com>
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2011-07-10 H.J. LuUse movl instead of movabs for x32.
2011-07-10 H.J. Lu <hongjiu.lu@intel.com>
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2011-07-10 H.J. LuTurn on 64bit and check models for x32.
2011-07-10 H.J. Lu <hongjiu.lu@intel.com>
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2011-07-09 H.J. LuAdd x32 support to GCC testsuite.
2011-07-09 H.J. Lu <hongjiu.lu@intel.com>
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2011-07-07 H.J. LuAdd ia32 and x32 effective targets.
2011-07-07 H.J. Lu <hongjiu.lu@intel.com>
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2011-07-07 H.J. LuInitial x32 support.
2011-07-07 H.J. Lu <hongjiu.lu@intel.com>
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2011-07-06 H.J. LuUse pointer_mode for address computation.
2011-07-06 H.J. Lu <hongjiu.lu@intel.com>
2011-07-06 H.J. Lu <hongjiu.lu@intel.com>
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2011-07-05 H.J. LuPromote the function argument before checking non-legitimate...
2011-07-05 H.J. Lu <hongjiu.lu@intel.com>
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2011-07-05 H.J. LuDon't propagate hard registers in forward_propagate_subreg.
2011-07-05 H.J. Lu <hongjiu.lu@intel.com>
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2011-07-01 H.J. LuUse proper mode for stack save area.
2011-07-01 H.J. Lu <hongjiu.lu@intel.com>
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2011-06-24 H.J. LuProperly handle pointer addition/subtraction in num_sign_bit...
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2011-06-24 H.J. LuProperly handle pointer addition/subtraction.
2011-06-24 H.J. Lu <hongjiu.lu@intel.com>
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2011-06-22 H.J. LuCheck TARGET_PARTIAL_REG_STALL in imul to lea peepholes.
2011-06-22 H.J. Lu <hongjiu.lu@intel.com>
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2011-06-20 H.J. LuDon't check zero/sign extended hard registers.
2011-06-20 H.J. Lu <hongjiu.lu@intel.com>
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2011-06-20 H.J. LuCheck zero/sign extended hard registers.
2011-06-20 H.J. Lu <hongjiu.lu@intel.com>
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2011-06-18 H.J. LuUse long long builtins of zero counting for x86-64.
2011-06-18 H.J. Lu <hongjiu.lu@intel.com>
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2011-06-18 H.J. LuProperly check if .init_array can be used with .ctors...
2011-06-18 H.J. Lu <hongjiu.lu@intel.com>
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2011-06-15 H.J. LuMark __dso_handle hidden if assembler supports it.
2011-06-15 H.J. Lu <hongjiu.lu@intel.com>
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2011-06-14 H.J. LuProperly expand strlen to Pmode.
2011-06-14 H.J. Lu <hongjiu.lu@intel.com>
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2011-06-13 H.J. LuCorrect typos.
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2011-06-13 H.J. LuRemove duplicated lines.
2011-06-13 H.J. Lu <hongjiu.lu@intel.com>
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2011-06-08 H.J. LuSupport unknown Intel family 0x6 CPUs.
2011-06-08 H.J. Lu <hongjiu.lu@intel.com>
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2011-06-07 H.J. LuOptimize AVX check in *movsf_internal.
2011-06-07 H.J. Lu <hongjiu.lu@intel.com>
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2011-06-05 H.J. LuRevert accidental checkin.
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2011-05-31 H.J. LuRevert accidental svn commit r174473
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2011-05-31 H.J. LuUse __sync_bool_compare_and_swap in x86 locks.h.
2011-05-31 H.J. Lu <hongjiu.lu@intel.com>
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2011-05-30 H.J. LuHandle misaligned TFmode load/store.
2011-05-30 H.J. Lu <hongjiu.lu@intel.com>
2011-05-30 H.J. Lu <hongjiu.lu@intel.com>
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2011-05-25 H.J. LuPut back "register_operand" check in 32bit QI ext patterns.
2011-05-25 H.J. Lu <hongjiu.lu@intel.com>
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2011-05-25 H.J. LuUpdate pause intrinsic.
2011-05-25 H.J. Lu <hongjiu.lu@intel.com>
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2011-05-25 H.J. LuReplace q_regs_operand with QIreg_operand in QI ext...
2011-05-25 H.J. Lu <hongjiu.lu@intel.com>
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2011-05-25 H.J. LuImplement x86 pause intrinsic.
2011-05-25 H.J. Lu <hongjiu.lu@intel.com>
2011-05-25 H.J. Lu <hongjiu.lu@intel.com>
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2011-05-24 H.J. LuAlways add -mno-XXX for -march=native.
2011-05-24 H.J. Lu <hongjiu.lu@intel.com>
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2011-05-23 H.J. LuSave the initial options after checking vzeroupper.
2011-05-23 H.J. Lu <hongjiu.lu@intel.com>
2011-05-23 H.J. Lu <hongjiu.lu@intel.com>
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2011-05-18 H.J. LuProperly handle 256bit load cast.
2011-05-18 H.J. Lu <hongjiu.lu@intel.com>
2011-05-18 H.J. Lu <hongjiu.lu@intel.com>
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2011-05-13 H.J. LuChange ix86_save_reg/ix86_hard_regno_mode_ok to return...
2011-05-13 H.J. Lu <hongjiu.lu@intel.com>
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2011-05-12 H.J. LuChange maybe_eh_return to bool.
2011-05-12 H.J. Lu <hongjiu.lu@intel.com>
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2011-05-09 H.J. LuOne more POINTERS_EXTEND_UNSIGNED fix in mem_loc_descriptor.
2011-05-09 H.J. Lu <hongjiu.lu@intel.com>
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2011-04-15 H.J. LuSwitch SSE and AVX mnemonics.
2011-04-15 H.J. Lu <hongjiu.lu@intel.com>
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2011-04-14 H.J. LuUpdate alignment on local variables.
2011-04-14 H.J. Lu <hongjiu.lu@intel.com>
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2011-03-30 H.J. LuFix a typo in FLOAT_SSE_REGS.
2011-03-30 H.J. Lu <hongjiu.lu@intel.com>
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2011-03-28 H.J. LuFix a typo in -mavx256-split-unaligned-store.
2011-03-28 H.J. Lu <hongjiu.lu@intel.com>
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2011-03-28 H.J. LuAdd -fno-pic to gcc.target/i386/pr47502-2.c.
2011-03-28 H.J. Lu <hongjiu.lu@intel.com>
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2011-03-28 H.J. LuDon't assert unaligned 256bit load/store.
2011-03-27 H.J. Lu <hongjiu.lu@intel.com>
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2011-03-27 H.J. LuSplit 32-byte AVX unaligned load/store.
2011-03-27 H.J. Lu <hongjiu.lu@intel.com>
2011-03-27 H.J. Lu <hongjiu.lu@intel.com>
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2011-03-21 H.J. LuAdd 2 testcases for PR rtl-optimization/47502.
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2011-03-18 H.J. LuRevert the last change on cant_combine_insn_p.
2011-03-17 H.J. Lu <hongjiu.lu@intel.com>
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2011-03-18 H.J. LuCheck zero/sign extended hard registers.
2011-03-17 H.J. Lu <hongjiu.lu@intel.com>
2011-03-17 H.J. Lu <hongjiu.lu@intel.com>
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2011-03-17 H.J. LuCheck SUBREG in prepare_call_arguments.
2011-03-17 H.J. Lu <hongjiu.lu@intel.com>
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2011-03-17 H.J. LuAdd Save to -mavx and -mfma.
2011-03-17 H.J. Lu <hongjiu.lu@intel.com>
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2011-03-16 H.J. LuCheck TARGET_ROUND for BUILT_IN_{FLOOR,CEIL,TRUNC,RINT...
2011-03-16 H.J. Lu <hongjiu.lu@intel.com>
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2011-03-14 H.J. LuEnable __float128 test for 32bit.
2011-03-14 H.J. Lu <hongjiu.lu@intel.com>
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2011-02-19 H.J. LuRequire int128 instead of lp64 in int128 tests.
2011-02-19 H.J. Lu <hongjiu.lu@intel.com>
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2011-02-15 H.J. LuRevert cant_combine_insn_p change.
2011-02-15 H.J. Lu <hongjiu.lu@intel.com>
2011-02-15 H.J. Lu <hongjiu.lu@intel.com>
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2011-02-15 H.J. LuCheck zero/sign extended hard registers.
2011-02-15 H.J. Lu <hongjiu.lu@intel.com>
2011-02-15 H.J. Lu <hongjiu.lu@intel.com>
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2011-02-04 H.J. LuAdd a testcase for PR tree-optimization/43695.
2011-02-04 H.J. Lu <hongjiu.lu@intel.com>
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2011-02-03 H.J. LuRequire vect_double on gfortran.dg/graphite/vect-pr40979...
2011-02-03 H.J. Lu <hongjiu.lu@intel.com>
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2011-02-01 H.J. LuCheck HOST_BIT_BUCKET when settting dump base/dir.
2011-02-01 H.J. Lu <hongjiu.lu@intel.com>
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2011-01-24 H.J. LuVisit basic blocks using the work-list based algorithm.
2011-01-24 H.J. Lu <hongjiu.lu@intel.com>
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2011-01-17 H.J. LuCorrect mask operand for AVX mask load/store.
2011-01-17 H.J. Lu <hongjiu.lu@intel.com>
2011-01-17 H.J. Lu <hongjiu.lu@intel.com>
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2011-01-10 H.J. LuAdd __attribute__((externally_visible)).
2011-01-10 H.J. Lu <hongjiu.lu@intel.com>
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2011-01-10 H.J. LuCheck e->call_stmt before calling gimple_call_set_cannot_inline.
2011-01-10 H.J. Lu <hongjiu.lu@intel.com>
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2011-01-07 H.J. LuKeep -m[arch|tune]=native in COLLECT_GCC_OPTIONS.
2011-01-07 H.J. Lu <hongjiu.lu@intel.com>
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2011-01-03 H.J. LuRevert revision 168407.
2011-01-03 H.J. Lu <hongjiu.lu@intel.com>
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2011-01-02 H.J. LuDon't check have_o when settting combine_inputs.
2011-01-02 H.J. Lu <hongjiu.lu@intel.com>
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2011-01-02 H.J. LuFix a typo.
2011-01-02 H.J. Lu <hongjiu.lu@intel.com>
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2011-01-02 H.J. LuRotate ChangeLogs.
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2010-12-30 H.J. LuShort circuit if upper 128bits are unchanged in the...
2010-12-30 H.J. Lu <hongjiu.lu@intel.com>
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2010-12-30 H.J. LuRepeat processing all basic blocks for vzeroupper optimization.
2010-12-30 H.J. Lu <hongjiu.lu@intel.com>
2010-12-30 H.J. Lu <hongjiu.lu@intel.com>
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2010-12-28 H.J. LuReplace _rdrand_uXX with _rdrandXX_step.
2010-12-28 H.J. Lu <hongjiu.lu@intel.com>
2010-12-28 H.J. Lu <hongjiu.lu@intel.com>
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2010-12-17 H.J. LuReplace "BB [%i]" with "[bb %i]" in vzeroupper RTL...
2010-12-17 H.J. Lu <hongjiu.lu@intel.com>
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2010-12-16 H.J. LuMake main return 0.
2010-12-16 H.J. Lu <hongjiu.lu@intel.com>
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2010-12-15 H.J. LuCorrect PR number in gfortran.dg/debug/pr46756.f.
2010-12-15 H.J. Lu <hongjiu.lu@intel.com>
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2010-12-15 H.J. LuMove gfortran.dg/debug/pr46576.f to gfortran.dg/debug...
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2010-12-09 H.J. LuUpdate gcc.target/i386/sse2-init-v2di-2.c.
2010-12-08 H.J. Lu <hongjiu.lu@intel.com>
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2010-12-07 H.J. LuAdd testcases for PRs middle-end/41562 and middle-end...
2010-12-06 H.J. Lu <hongjiu.lu@intel.com>
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2010-12-06 H.J. LuTurn on unaligned SSE load/store for Core i7.
2010-12-06 H.J. Lu <hongjiu.lu@intel.com>
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2010-12-06 H.J. LuAdd -march=/-mtune=corei7-avx.
2010-12-06 H.J. Lu <hongjiu.lu@intel.com>
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2010-12-02 H.J. LuTurn on X86_TUNE_INTER_UNIT_MOVES for Core 2 and Core i7.
2010-12-02 H.J. Lu <hongjiu.lu@intel.com>
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2010-12-02 H.J. LuAllow corei7 for --with-arch=/--with-cpu=.
2010-12-02 H.J. Lu <hongjiu.lu@intel.com>
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2010-11-29 H.J. LuCheck and export LT_RCU_$id instead of LT_RCU.
2010-11-29 H.J. Lu <hongjiu.lu@intel.com>
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2010-11-26 H.J. LuAdd a testcase for PR tree-optimization/46665.
2010-11-26 H.J. Lu <hongjiu.lu@intel.com>
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2010-11-25 H.J. LuAdd -mtune=generic to gfortran.dg/pr46519-1.f.
2010-11-25 H.J. Lu <hongjiu.lu@intel.com>
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2010-11-25 H.J. LuProperly cast integer constant char.
2010-11-25 H.J. Lu <hongjiu.lu@intel.com>
2010-11-25 H.J. Lu <hongjiu.lu@intel.com>
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2010-11-24 H.J. LuDon't check TREE_THIS_VOLATILE in ix86_expand_call.
2010-11-24 H.J. Lu <hongjiu.lu@intel.com>
2010-11-24 H.J. Lu <hongjiu.lu@intel.com>
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2010-11-24 H.J. LuImprove vzeroupper optimization.
2010-11-24 H.J. Lu <hongjiu.lu@intel.com>
2010-11-24 H.J. Lu <hongjiu.lu@intel.com>
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2010-11-24 H.J. LuCorrect PR #.
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2010-11-23 H.J. LuProperly check default linker.
2010-11-23 H.J. Lu <hongjiu.lu@intel.com>
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2010-11-22 H.J. LuAdd check for ENABLE_CHECKING,
2010-11-22 H.J. Lu <hongjiu.lu@intel.com>
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2010-11-21 H.J. LuAdd missing ChangeLog entry.
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2010-11-18 H.J. LuUpdate expected demangler output.
2010-11-18 H.J. Lu <hongjiu.lu@intel.com>
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2010-11-16 H.J. LuProperly demangle a global constructor symbol.
2010-11-16 H.J. Lu <hongjiu.lu@intel.com>
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2010-11-11 H.J. LuSupport Intel processor family 6, model 0x2c.
2010-11-11 H.J. Lu <hongjiu.lu@intel.com>
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