| 2020-05-11 |
Timothy Hayes | mem-ruby: MESI_Two_Level missing function compilation fix
|
commit | commitdiff | tree |
| 2020-05-11 |
Timothy Hayes | mem-ruby: MOESI_CMP_directory sync fix
|
commit | commitdiff | tree |
| 2020-05-06 |
Giacomo Travaglini | python: Manually convert float to int when using %x
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-05-06 |
Giacomo Travaglini | util: Make cpt_upgraders python3 compatible
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-05-06 |
Giacomo Travaglini | util: Port git hooks to python3
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-04-28 |
Giacomo Travaglini | configs: Do not require args.kernel to be set in baremetal.py
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-04-28 |
Giacomo Travaglini | sim, arch-arm: Restore capability of running without...
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-04-27 |
Giacomo Travaglini | arch-arm: SVE instructions do not use AHP format
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-04-27 |
Giacomo Travaglini | arch-arm: Do not increment exponent if FPSCR.FZ in...
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-04-23 |
Giacomo Travaglini | configs: Use workloads.py in baremetal.py
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-04-23 |
Giacomo Travaglini | configs: Produce list of workload types in workloads.py
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-04-23 |
Giacomo Travaglini | configs: Add an example workloads module
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-04-21 |
Giacomo Travaglini | configs: Add --machine-type option to baremetal.py
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-04-21 |
Giacomo Travaglini | configs: Add --semi-path option to baremetal.py
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-04-19 |
Giacomo Travaglini | arch-sparc: MAP_32BIT does not exist on solaris
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-04-15 |
Giacomo Travaglini | tests: Run realview(64) tests with VExpress_GEM5_Foundation
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-04-15 |
Giacomo Travaglini | arch-arm: Override ISA::takeOverFrom for the Arm ISA
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-04-15 |
Giacomo Travaglini | arch, cpu: Add a takeOverFrom method for switching...
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-04-15 |
Giacomo Travaglini | arch-arm: Remove unnecessary haveGICv3CPUInterface
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-04-14 |
Giacomo Travaglini | tests: Fail checkpoint regressions if no cpt has been...
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-04-14 |
Giacomo Travaglini | tests: Reduce checkpoint interval used by realview...
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-04-14 |
Giacomo Travaglini | dev-arm: Fix checkpointing for the GenericTimer
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-04-14 |
Giacomo Travaglini | arch-arm: Handle empty object_file scenario in ArmFsWorkload
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-04-09 |
Adrian Herrera | dev-arm: Add VExpress_GEM5_Foundation platform
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-04-08 |
Adrian Herrera | arch-arm, dev-arm: Autogen PSCI node in DTB
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-04-06 |
Giacomo Travaglini | arch-arm: CNTHCTL trap to EL2 only if ARMv8.6-ECV implemented
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-04-01 |
Giacomo Travaglini | configs: Enabling SimObj CLI for baremetal platform
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-03-31 |
Adrian Herrera | arch-arm, dev-arm: WakeRequest implementation
|
commit | commitdiff | tree |
| 2020-03-30 |
Adrian Herrera | dev-arm: Adjust idreg value in RealViewCtrl
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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commit | commitdiff | tree |
| 2020-03-30 |
Giacomo Travaglini | dev-arm: Fix pci_mem_base setting in VExpress_GEM5_Base
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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commit | commitdiff | tree |
| 2020-03-26 |
Giacomo Travaglini | dev-arm: Don't use args and kwargs on attachIO
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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commit | commitdiff | tree |
| 2020-03-25 |
Giacomo Travaglini | configs: Use ArmFsWorkload for Arm baremetal
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-03-25 |
Adrian Herrera | cpu: IntrControl, clear all and check helpers
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
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commit | commitdiff | tree |
| 2020-03-25 |
Giacomo Travaglini | configs: Initialize atags_addr in baremetal.py
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-03-25 |
Giacomo Travaglini | configs: Enable Semihosting for baremetal.py
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-03-25 |
Giacomo Travaglini | configs: Make --disk-image optional in baremetal.py
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-03-24 |
Giacomo Travaglini | arch-arm: Make load_addr_mask=0 for ArmFsLinux only
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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commit | commitdiff | tree |
| 2020-03-24 |
Giacomo Travaglini | arch-arm: Fix aapcs32/aapcs64 compilation issues
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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commit | commitdiff | tree |
| 2020-03-23 |
Giacomo Travaglini | dev-arm: Add flash1 memory to VExpress_GEM5 platform
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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commit | commitdiff | tree |
| 2020-03-23 |
Adrian Herrera | dev-arm: Instantiate FVPBasePwrCtrl in VExpress_GEM5
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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commit | commitdiff | tree |
| 2020-03-20 |
Timothy Hayes | mem-ruby: MESI_Three_Level discriminate L0 invalidation...
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-03-20 |
Timothy Hayes | mem-ruby: MESI_Three_Level fix L1 MRU absence
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-03-20 |
Timothy Hayes | mem-ruby: MESI_Three_Level fix L1 in_port ranks
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-03-20 |
Timothy Hayes | mem-ruby: MESI_Three_level HTML reference generation fix
|
commit | commitdiff | tree |
| 2020-03-19 |
Giacomo Travaglini | tests: Add --bin-path option to insttest regressions
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-03-19 |
Giacomo Travaglini | arch-arm: Fix ArmSystem::_resetAddr evalutation
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-03-16 |
Giacomo Travaglini | power: Fix regStats for PowerModel and PowerModelState
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-03-13 |
Giacomo Travaglini | arch-x86: Add Python 3 workarounds for long
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-03-13 |
Giacomo Travaglini | arch-x86: Fix imports for Python 3 compatibility
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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commit | commitdiff | tree |
| 2020-03-13 |
Giacomo Travaglini | tests: Use relative path for python3 compliance
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-03-13 |
Giacomo Travaglini | arch: list.sort() sorting by key only in python3
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-03-13 |
Giacomo Travaglini | dev-arm: Fix VExpressFastmodel.py indentation
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-03-13 |
Giacomo Travaglini | arch: Convert exec keyword to exec() function
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-03-13 |
Giacomo Travaglini | arch: Bring closure out of p_global_let
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-03-13 |
Giacomo Travaglini | misc: Make exception handling python3 compliant
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-03-13 |
Giacomo Travaglini | misc: Text vs Byte string in python3
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-03-13 |
Giacomo Travaglini | scons: file removed from python3
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-03-13 |
Giacomo Travaglini | misc: Views and Iterators instead of Lists in python3
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-03-13 |
Giacomo Travaglini | arch-arm: Fix Arch detection in FS if there is not...
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-03-12 |
Adrian Herrera | dev-arm: add FVP Base Power Controller model
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-03-12 |
Adrian Herrera | arch-arm: Rewrite getMPIDR
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-03-11 |
Andriani Mappoura | arch-arm: Correct the Ids and names of the PMU events
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-03-10 |
Giacomo Travaglini | arch-arm: Remove unnecessary RegIndex set for VSTR...
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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commit | commitdiff | tree |
| 2020-03-10 |
Adrian Herrera | arch-arm: GenericTimer arch regs, perms/trapping
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-03-10 |
Adrian Herrera | dev-arm: Refactor GenericTimer
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-03-10 |
Giacomo Travaglini | arch-arm: Hint the compiler to inline getArmSystem
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-03-10 |
Giacomo Travaglini | arch-arm: Speedup ARM execution by avoiding expensive...
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-03-10 |
Giacomo Travaglini | arch-arm: python3 "/" will always produce a float
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-03-10 |
Giacomo Travaglini | misc: Replace basestring with six.string_types
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-03-10 |
Giacomo Travaglini | misc: Replace __metaclass__ with six.add_metaclass
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-03-10 |
Giacomo Travaglini | misc: string.join has been removed in python3
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-03-10 |
Giacomo Travaglini | python: The new module has been removed in python3
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-03-10 |
Andreas Sandberg | python: Make meta class declarations Python 3 safe
|
commit | commitdiff | tree |
| 2020-03-04 |
Giacomo Travaglini | arch-arm: Remove unused getArmSystem helper
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-03-04 |
Timothy Hayes | mem-ruby: Minor Ruby Prefetcher fixes
|
commit | commitdiff | tree |
| 2020-03-03 |
Giacomo Travaglini | tests: simple_ruby_test's valid_host is X86 only
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-03-02 |
Adrian Herrera | dev-arm: Add missing UARTs (PL011) to VExpress_GEM5...
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-03-02 |
Adrian Herrera | dev-arm: Add trusted SP805 to VExpress_GEM5 platform
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-03-02 |
Adrian Herrera | dev-arm: Add trusted SRAM memory to VExpress_GEM5 platform
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-03-02 |
Adrian Herrera | dev-arm: Add flash0 memory to VExpress_GEM5 platform
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-02-28 |
Adrian Herrera | dev-arm: PL031, fix AMBA ID and clock names
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-02-28 |
Giacomo Travaglini | learning-gem5: Use zero initialization in hello_goodbye...
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-02-25 |
Adrian Herrera | dev-arm: RealView, add support for off-chip memory
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-02-25 |
Adrian Herrera | dev-arm: default _on_chip_memory on RealView
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-02-20 |
Giacomo Travaglini | dev-arm: Fix setupBootloader for VExpress_GEM5_V2
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-02-19 |
Adrian Herrera | arch-arm: ArmISA::clear, inval TLB cached miscregs
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-02-19 |
Adrian Herrera | misc: pass ThreadContext on ISA clear
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-02-19 |
Giacomo Travaglini | cpu: Fix vector renaming bug
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-02-19 |
Giacomo Travaglini | arch, arch-arm: Use BaseISA in RenameMode interface
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-02-19 |
Adrian Herrera | arch-arm: Fix CNTFRQ_EL0 permission bits
|
commit | commitdiff | tree |
| 2020-02-17 |
Giacomo Travaglini | arch-arm: Be more verbose on load/store construction
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-02-17 |
Giacomo Travaglini | base: Use a int to store fgetc return value
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-02-17 |
Giacomo Travaglini | arch-arm: Fix ArmKVM build
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-02-17 |
Giacomo Travaglini | cpu: Mark ExecContext::tcBase() as const
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-02-13 |
Giacomo Travaglini | ext: Add failure node to JUnit xml file
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-02-11 |
Giacomo Travaglini | tests,misc: update TESTING.md documentation
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-02-10 |
Giacomo Travaglini | tests: hello_se using host tag
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-02-10 |
Giacomo Travaglini | tests: Add --host tag
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-02-10 |
Giacomo Travaglini | configs: Using VExpress_GEM5_V1 as a default for Options.py
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
|
commit | commitdiff | tree |
| 2020-02-10 |
Giacomo Travaglini | arch-arm: LDTRSW was not marked as unpriviledged
...off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
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