projects / mesa.git / search
| 2010-06-14 | Zhenyu Wang | i965: correct the gen6 line stipple enable define. |
commit | commitdiff | tree |
| 2010-06-13 | Zhenyu Wang | i965: Use the new message header format for FF_SYNC... |
commit | commitdiff | tree |
| 2010-06-13 | Zhenyu Wang | i965: Add support for math instructions in the gen6 WM. |
commit | commitdiff | tree |
| 2010-06-13 | Zhenyu Wang | i965: Set the correct WM GRF start reg on gen6. |
commit | commitdiff | tree |
| 2010-04-21 | Zhenyu Wang | intel: Add Sandybridge mobile chipset id Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> |
commit | commitdiff | tree |
| 2010-04-21 | Zhenyu Wang | intel: Clean up chipset name and gen num for Ironlake Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> |
commit | commitdiff | tree |
| 2009-09-10 | Zhenyu Wang | intel: add B43 chipset support Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> |
commit | commitdiff | tree |
| 2009-09-09 | Zhenyu Wang | intel: add B43 chipset support Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com> |
commit | commitdiff | tree |