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2014-03-06	Clifford Wolf	Strictly zero-extend unsigned A-inputs of shift operations	commit \| commitdiff \| tree
2014-03-05	Clifford Wolf	Switched to EZMINISAT_SIMPSOLVER as default SAT solver	commit \| commitdiff \| tree
2014-03-05	Clifford Wolf	Include id2ast pointers when dumping AST	commit \| commitdiff \| tree
2014-03-05	Clifford Wolf	Fixed merging of compatible wire decls in AST frontend	commit \| commitdiff \| tree
2014-03-05	Clifford Wolf	Bugfix in recursive AST simplification	commit \| commitdiff \| tree
2014-03-03	Clifford Wolf	fixed freduce for Minisat::SimpSolver: use frozen_literal()	commit \| commitdiff \| tree
2014-03-03	Clifford Wolf	ezSAT: Added frozen_literal() API	commit \| commitdiff \| tree
2014-03-03	Clifford Wolf	ezSAT: Fixed handling of eliminated Literals, added...	commit \| commitdiff \| tree
2014-03-01	Clifford Wolf	Added ezSAT::eliminated API to help the SAT solver...	commit \| commitdiff \| tree
2014-03-01	Clifford Wolf	ezSAT bugfix: don't call virtual methods in base class...	commit \| commitdiff \| tree
2014-03-01	Clifford Wolf	Removed ezSAT::assumed() API	commit \| commitdiff \| tree
2014-03-01	Clifford Wolf	Removed ezSAT built-in brute-froce solver	commit \| commitdiff \| tree
2014-03-01	Clifford Wolf	Fixed vhdl2verilog temp dir name	commit \| commitdiff \| tree
2014-03-01	Clifford Wolf	Fixed vhdl2verilog help message	commit \| commitdiff \| tree
2014-02-27	Clifford Wolf	Fixed const folding of $bu0 cells	commit \| commitdiff \| tree
2014-02-26	Clifford Wolf	Fixed bit-extending in $mux argument (use $bu0 instead...	commit \| commitdiff \| tree
2014-02-26	Clifford Wolf	Added support for $bu0 to SatGen	commit \| commitdiff \| tree
2014-02-24	Clifford Wolf	Don't blow up constants unneccessarily in Verilog frontend	commit \| commitdiff \| tree
2014-02-23	Clifford Wolf	Added support for Minisat::SimpSolver + ezSAT frezze...	commit \| commitdiff \| tree
2014-02-23	Clifford Wolf	Fixed small memory leak in Pass::call()	commit \| commitdiff \| tree
2014-02-22	Clifford Wolf	Fixed bug in generation of undefs for $memwr MUXes	commit \| commitdiff \| tree
2014-02-22	Clifford Wolf	Fixed bug (typo) in passes/opt/opt_const.cc	commit \| commitdiff \| tree
2014-02-22	Clifford Wolf	Added $lut support to blif backend (by user eddiehung...	commit \| commitdiff \| tree
2014-02-22	Clifford Wolf	Added ezMiniSat EZMINISAT_INCREMENTAL compile-time...	commit \| commitdiff \| tree
2014-02-22	Clifford Wolf	Made MiniSat solver backend configurable in ezminisat.h	commit \| commitdiff \| tree
2014-02-21	Clifford Wolf	Added workaround for vhdl-style edge triggers from...	commit \| commitdiff \| tree
2014-02-21	Clifford Wolf	Added vhdl2verilog	commit \| commitdiff \| tree
2014-02-21	Clifford Wolf	Progress in presentation	commit \| commitdiff \| tree
2014-02-21	Clifford Wolf	Better handling of nameDef and nameRef in edif backend	commit \| commitdiff \| tree
2014-02-21	Clifford Wolf	Fixed instantiating multi-bit ports in edif backend	commit \| commitdiff \| tree
2014-02-21	Clifford Wolf	Use private namespace in mem_simple_4x1_map	commit \| commitdiff \| tree
2014-02-21	Clifford Wolf	Added tests/techmap/mem_simple_4x1	commit \| commitdiff \| tree
2014-02-21	Clifford Wolf	Renamed "write_blif -subckt" to "write_blif -icells...	commit \| commitdiff \| tree
2014-02-21	Clifford Wolf	Progress in presentation	commit \| commitdiff \| tree
2014-02-20	Clifford Wolf	Progress in presentation	commit \| commitdiff \| tree
2014-02-20	Clifford Wolf	Added _TECHMAP_REPLACE_ feature to techmap	commit \| commitdiff \| tree
2014-02-20	Clifford Wolf	Added "extract -ignore_parameters" and "extract -ignore_para...	commit \| commitdiff \| tree
2014-02-20	Clifford Wolf	Added "extract -map %<design_name>"	commit \| commitdiff \| tree
2014-02-20	Clifford Wolf	Added "design -push" and "design -pop"	commit \| commitdiff \| tree
2014-02-20	Clifford Wolf	Progress in presentation	commit \| commitdiff \| tree
2014-02-20	Clifford Wolf	Added connwrappers command	commit \| commitdiff \| tree
2014-02-20	Clifford Wolf	Cleanups in handling of read_verilog -defer and -icells	commit \| commitdiff \| tree
2014-02-20	Clifford Wolf	Progress in presentation	commit \| commitdiff \| tree
2014-02-19	Clifford Wolf	Added vcd2txt.pl and txt2tikztiming.py (tests/tools...	commit \| commitdiff \| tree
2014-02-18	Clifford Wolf	Merge branch 'master' of github.com:cliffordwolf/yosys	commit \| commitdiff \| tree
2014-02-18	Clifford Wolf	Progress in presentation	commit \| commitdiff \| tree
2014-02-18	Clifford Wolf	Added techmap support for _TECHMAP_CONNMAP_*_	commit \| commitdiff \| tree
2014-02-18	Clifford Wolf	Added "sat -dump_cnf"	commit \| commitdiff \| tree
2014-02-18	Clifford Wolf	Coding style corrections in SatHelper::dump_model_to_vcd()	commit \| commitdiff \| tree
2014-02-18	Clifford Wolf	Improved non-verbose ezSAT::printDIMACS() format	commit \| commitdiff \| tree
2014-02-18	Clifford Wolf	Added "sat -initsteps"	commit \| commitdiff \| tree
2014-02-17	Clifford Wolf	Added Verilog support for "`default_nettype none"	commit \| commitdiff \| tree
2014-02-17	Clifford Wolf	Renamed "sat -dump_fail_to_vcd" to "sat -dump_vcd"...	commit \| commitdiff \| tree
2014-02-17	Andrew Zonenberg	Added "-dump_fail_to_vcd" argument to SAT solver	commit \| commitdiff \| tree
2014-02-17	Clifford Wolf	Progress in presentation	commit \| commitdiff \| tree
2014-02-17	Clifford Wolf	Better preserve wires when flattening (in comparison...	commit \| commitdiff \| tree
2014-02-16	Clifford Wolf	Progress in presentation	commit \| commitdiff \| tree
2014-02-16	Clifford Wolf	Added some additional checks to techmap	commit \| commitdiff \| tree
2014-02-16	Clifford Wolf	Added CONSTMSK and CONSTVAL feature to techmap	commit \| commitdiff \| tree
2014-02-16	Clifford Wolf	Fixed handling of "keep" attribute on wires in opt_clean	commit \| commitdiff \| tree
2014-02-16	Clifford Wolf	Added a warning note about error reporting to read_verilog...	commit \| commitdiff \| tree
2014-02-16	Clifford Wolf	Progress in presentation	commit \| commitdiff \| tree
2014-02-16	Clifford Wolf	Fixed use of selection in splitnets command	commit \| commitdiff \| tree
2014-02-16	Clifford Wolf	Added recursion support to techmap	commit \| commitdiff \| tree
2014-02-16	Clifford Wolf	Progress in presentation	commit \| commitdiff \| tree
2014-02-16	Clifford Wolf	Progress in presentation	commit \| commitdiff \| tree
2014-02-16	Clifford Wolf	Improved support for constant functions	commit \| commitdiff \| tree
2014-02-15	Clifford Wolf	Now we are in Yoys 0.2.0+ development	commit \| commitdiff \| tree
2014-02-15	Clifford Wolf	Tagging Yoys 0.2.0	commit \| commitdiff \| tree
2014-02-15	Clifford Wolf	Added != support for relational select pattern	commit \| commitdiff \| tree
2014-02-15	Clifford Wolf	Added iopadmap -bits	commit \| commitdiff \| tree
2014-02-15	Clifford Wolf	Added ff and latch support to read_liberty	commit \| commitdiff \| tree
2014-02-15	Clifford Wolf	Bugfix in expression parser of read_liberty	commit \| commitdiff \| tree
2014-02-15	Clifford Wolf	Fixed dfflibmap for cell libraries with no set-reset-ff	commit \| commitdiff \| tree
2014-02-15	Clifford Wolf	Correctly convert constants to RTLIL (fixed undef handling)	commit \| commitdiff \| tree
2014-02-15	Clifford Wolf	Added frontend (-f) option to autotest.sh	commit \| commitdiff \| tree
2014-02-15	Clifford Wolf	Fixed opt_const handling of double invert with non...	commit \| commitdiff \| tree
2014-02-15	Clifford Wolf	Added liberty frontend	commit \| commitdiff \| tree
2014-02-14	Clifford Wolf	Be more conservative with new const-function code	commit \| commitdiff \| tree
2014-02-14	Clifford Wolf	Added support for FOR loops in function calls in parameters	commit \| commitdiff \| tree
2014-02-14	Clifford Wolf	Created basic support for function calls in parameter...	commit \| commitdiff \| tree
2014-02-14	Clifford Wolf	Added abc -keepff option	commit \| commitdiff \| tree
2014-02-13	Clifford Wolf	updated default ABC command strings	commit \| commitdiff \| tree
2014-02-13	Clifford Wolf	Updated ABC	commit \| commitdiff \| tree
2014-02-13	Clifford Wolf	Implemented read_verilog -defer	commit \| commitdiff \| tree
2014-02-13	Clifford Wolf	Removed double blanks in ABC default command sequences	commit \| commitdiff \| tree
2014-02-13	Clifford Wolf	Merge branch 'master' of github.com:cliffordwolf/yosys	commit \| commitdiff \| tree
2014-02-13	Clifford Wolf	Updated ABC and some related changes	commit \| commitdiff \| tree
2014-02-12	Clifford Wolf	Merge pull request #26 from ahmedirfan1983/btor	commit \| commitdiff \| tree
2014-02-12	Clifford Wolf	Merge branch 'master' of github.com:cliffordwolf/yosys	commit \| commitdiff \| tree
2014-02-12	Clifford Wolf	Added support for functions returning integer	commit \| commitdiff \| tree
2014-02-12	Clifford Wolf	Disabled "abc -dff" in "make test" for now (waiting...	commit \| commitdiff \| tree
2014-02-12	Clifford Wolf	Updated ABC to rev e97a6e1d59b9	commit \| commitdiff \| tree
2014-02-11	Clifford Wolf	renamed ilang "scope error" to "ilang error"	commit \| commitdiff \| tree
2014-02-11	Clifford Wolf	More Makefile cleanups	commit \| commitdiff \| tree
2014-02-11	Clifford Wolf	Improved "make manual" and "make clean"	commit \| commitdiff \| tree
2014-02-09	Clifford Wolf	Improved ilang parser error messages	commit \| commitdiff \| tree
2014-02-09	Clifford Wolf	fixed a bug in subcircuit library with cells that have...	commit \| commitdiff \| tree
2014-02-09	Clifford Wolf	Various improvements in expose command (added -sep...	commit \| commitdiff \| tree
2014-02-09	Clifford Wolf	Added delete {-input\|-output\|-port}	commit \| commitdiff \| tree
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