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abc9: fix help message, found by @nakengelhardt
2020-01-09 Clifford WolfAdd Pass::on_register() and Pass::on_shutdown()
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2020-01-02 Clifford WolfMerge pull request #1609 from YosysHQ/clifford/fix1596
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2020-01-02 Clifford WolfAlways create $shl, $shr, $sshl, $sshr cells with unsigned...
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-12-18 Clifford WolfSend people to symbioticeda.com instead of verific.com
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-12-17 Clifford WolfFix sim for assignments with lhs<rhs size, fixes #1565
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-12-05 Clifford WolfMerge pull request #1551 from whitequark/manual-cell...
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2019-12-03 Clifford WolfMerge pull request #1524 from pepijndevos/gowindffinit
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2019-12-02 Clifford WolfMerge pull request #1539 from YosysHQ/mwk/ilang-bounds...
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2019-11-27 Clifford WolfMerge pull request #1501 from YosysHQ/dave/mem_copy_attr
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2019-11-27 Clifford WolfMerge pull request #1534 from YosysHQ/mwk/opt_share-fix
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2019-11-22 Clifford WolfMerge pull request #1517 from YosysHQ/clifford/optmem
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2019-11-22 Clifford WolfMerge pull request #1515 from YosysHQ/clifford/svastuff
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2019-11-22 Clifford WolfAdd "opt_mem" pass
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-11-22 Clifford WolfAdd Verific support for SVA nexttime properties
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-11-22 Clifford WolfImprove handling of verific primitives in "verific...
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-11-22 Clifford WolfAdd Verific SVA support for "always" properties
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-11-22 Clifford WolfMerge pull request #1511 from YosysHQ/dave/always
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2019-11-20 Clifford WolfMerge pull request #1507 from YosysHQ/clifford/verificfixes
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2019-11-20 Clifford WolfCorrectly treat empty modules as blackboxes in Verific
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-11-20 Clifford WolfDo not rename VHDL entities to "entity(impl)" when...
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-11-19 Clifford WolfMerge pull request #1449 from pepijndevos/gowin
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2019-11-18 Clifford WolfMerge pull request #1497 from YosysHQ/mwk/extract-fa-fix
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2019-11-17 Clifford WolfMerge pull request #1492 from YosysHQ/dave/wreduce...
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2019-11-14 Clifford WolfMerge pull request #1490 from YosysHQ/clifford/autoname
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2019-11-14 Clifford WolfMerge pull request #1444 from btut/feature/python_wrappers...
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2019-11-14 Clifford WolfMerge pull request #1465 from YosysHQ/dave/ice40_timing_sim
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2019-11-14 Clifford WolfMerge branch 'makaimann-label-bads-btor'
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2019-11-14 Clifford WolfUse cell name for btor bad state props when it is a...
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-11-14 Clifford WolfMerge branch 'label-bads-btor' of https://github.com...
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2019-11-13 Clifford WolfAdd "autoname" pass and use it in "synth_ice40"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-11-13 Clifford WolfMerge pull request #1486 from YosysHQ/clifford/fsmdetectfix
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2019-11-12 Clifford WolfUpdate fsm_detect bugfix
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-11-12 Clifford WolfBugfix in fsm_detect
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-11-12 Clifford WolfMerge pull request #1484 from YosysHQ/clifford/cmp2luteqne
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2019-11-11 Clifford WolfDo not map $eq and $ne in cmp2lut, only proper arithmetic cmp
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-11-10 Clifford WolfMerge pull request #1470 from YosysHQ/clifford/subpassdoc
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2019-11-07 Clifford WolfAdd check for valid macro names in macro definitions
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-11-04 Clifford WolfFix write_aiger bug added in 524af21
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-10-31 Clifford WolfAdd CodingReadme section on script passes
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-10-27 Clifford WolfMerge pull request #1393 from whitequark/write_verilog...
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2019-10-24 Clifford WolfImprove naming scheme for (VHDL) modules imported from...
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-10-24 Clifford WolfAdd "verific -L"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-10-22 Clifford WolfBugfix in smtio vcd handling of $-identifiers
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-10-22 Clifford WolfMerge pull request #1452 from nakengelhardt/fix_dsp_mem_reg
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2019-10-21 Clifford WolfAdd "verilog_defines -list" and "verilog_defines -reset"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-10-21 Clifford WolfFix handling of "restrict" in Verific front-end
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-10-16 Clifford WolfMerge pull request #1450 from YosysHQ/clifford/fixdffmux
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2019-10-16 Clifford WolfFix dffmux peepopt init handling
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-10-16 Clifford WolfMove GENERATE_PATTERN macro to separate utility header
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-10-16 Clifford WolfDisable left-over log_debug in peepopt_dffmux.pmg
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-10-16 Clifford WolfFix parsing of .cname BLIF statements
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-10-15 Clifford WolfAdd .blackbox support to blif front-end
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-10-14 Clifford WolfMerge pull request #1448 from YosysHQ/daveshah1-sv...
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2019-10-14 Clifford WolfUse "(id)" instead of "id" for types as temporary hack
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-10-06 Clifford WolfMerge pull request #1439 from YosysHQ/eddie/fix_ice40_wrapcarry
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2019-10-05 Clifford WolfUpdate README.md
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2019-10-03 Clifford WolfChange smtbmc "Warmup failed" status to "PREUNSAT"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-10-03 Clifford WolfUpdate ABC to git rev 623b5e8
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-10-03 Clifford WolfBump version
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-10-03 Clifford WolfMerge pull request #1419 from YosysHQ/eddie/lazy_derive
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2019-10-03 Clifford WolfMerge pull request #1422 from YosysHQ/eddie/aigmap_select
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2019-10-03 Clifford WolfMerge pull request #1429 from YosysHQ/clifford/checkmapped
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2019-10-03 Clifford WolfAdd "check -allow-tbuf"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-10-02 Clifford WolfMerge pull request #1428 from YosysHQ/clifford/fixbtor
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2019-10-02 Clifford WolfAdd "check -mapped"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-10-02 Clifford WolfFix btor back-end to use "state" instead of "input...
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-09-30 Clifford WolfBump version
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-09-30 Clifford WolfMerge pull request #1412 from YosysHQ/eddie/equiv_opt_async2sync
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2019-09-30 Clifford WolfMerge pull request #1417 from YosysHQ/clifford/fixasync2sync
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2019-09-30 Clifford WolfFix $dlatch handling in async2sync
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-09-29 Clifford WolfMerge pull request #1411 from aman-goel/YosysHQ-master
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2019-09-27 Clifford WolfMerge pull request #1404 from YosysHQ/fix_gzip_macos
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2019-09-25 Clifford WolfMerge pull request #1402 from YosysHQ/clifford/portlist
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2019-09-25 Clifford WolfImprove "portlist" command
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-09-24 Clifford WolfAdd "portlist" command
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-09-21 Clifford WolfMerge pull request #1392 from YosysHQ/eddie/fix1391
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2019-09-20 Clifford WolfMerge pull request #1386 from YosysHQ/clifford/fix1360
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2019-09-20 Clifford WolfFix handling of read_verilog config in AstModule::reprocess_...
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-09-20 Clifford WolfUpdate CHANGELOG
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-09-20 Clifford WolfAdd "add -mod"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-09-20 Clifford WolfMerge pull request #1384 from YosysHQ/clifford/fix1381
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2019-09-19 Clifford WolfAdd techmap_autopurge attribute, fixes #1381
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-09-18 Clifford WolfAdd "write_aiger -L"
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-09-18 Clifford WolfFix stupid bug in btor back-end
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-09-16 Clifford WolfBump version
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-09-16 Clifford WolfMerge pull request #1380 from YosysHQ/clifford/fix1372
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2019-09-16 Clifford WolfFix handling of range selects on loop variables, fixes...
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-09-15 Clifford WolfMerge pull request #1377 from YosysHQ/clifford/fixzdigit
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2019-09-13 Clifford WolfFix handling of z_digit "?" and fix optimization of...
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-09-13 Clifford WolfMerge pull request #1373 from YosysHQ/clifford/fix1364
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2019-09-13 Clifford WolfFix lexing of integer literals without radix
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-09-12 Clifford WolfFix lexing of integer literals, fixes #1364
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-09-10 Clifford WolfBump version
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-09-05 Clifford WolfBump version
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-09-05 Clifford WolfMerge pull request #1350 from YosysHQ/clifford/fixsby59
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2019-09-05 Clifford WolfMerge pull request #1330 from YosysHQ/clifford/fix1145
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2019-09-05 Clifford WolfUpdate README.md
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-09-05 Clifford WolfRename conflicting wires on flatten/techmap, add "hierconn...
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-09-05 Clifford WolfAdd flatten handling of pre-existing wires as created...
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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2019-09-03 Clifford WolfMerge pull request #1351 from emilazy/remove-which-use
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