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intel/fs/cse: Make HALT instruction act as CSE barrier.
2020-02-14 Francisco Jerezintel/fs/cse: Make HALT instruction act as CSE barrier.
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2020-01-17 Francisco Jerezintel/fs: Switch to standard vector layout for barycentrics...
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2020-01-17 Francisco Jerezintel/fs: Introduce barycentric layout lowering pass.
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2020-01-17 Francisco Jerezintel/fs: Split fetch_payload_reg() into separate helper...
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2020-01-17 Francisco Jerezintel/fs/gen6: Use SEL instead of bashing thread payload...
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2020-01-17 Francisco Jerezintel/fs/gen6: Generalize aligned_pairs_class to SIMD16...
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2020-01-17 Francisco Jerezintel/fs/gen6: Constrain barycentric source of LINTERP...
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2020-01-17 Francisco Jerezintel/fs/gen4-6: Allocate registers from aligned_pairs_class...
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2020-01-17 Francisco Jerezintel/fs: Allow limited copy propagation of a LOAD_PAYLOAD...
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2020-01-17 Francisco Jerezintel/fs: Add support for copy-propagating a block...
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2020-01-17 Francisco Jerezintel/fs: Add partial support for copy-propagating...
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2020-01-17 Francisco Jerezintel/fs: Extend copy propagation dataflow analysis...
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2020-01-17 Francisco Jerezintel/fs: Rework fs_inst::is_copy_payload() into multiple...
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2020-01-17 Francisco Jerezintel/fs: Generalize fs_reg::is_contiguous() to register...
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2020-01-17 Francisco Jerezintel/fs: Try to vectorize header setup in lower_load_payload().
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2020-01-10 Francisco Jerezintel/fs: Make implied_mrf_writes() an fs_inst method.
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2020-01-10 Francisco Jerezintel/fs/cse: Fix non-deterministic behavior due to...
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2020-01-10 Francisco Jerezintel/fs: Fix nir_intrinsic_load_barycentric_at_sample...
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2020-01-10 Francisco Jerezintel/fs/gen8+: Fix r127 dst/src overlap RA workaround...
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2020-01-10 Francisco Jerezintel/fs/gen11+: Handle ROR/ROL in lower_simd_width().
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2020-01-10 Francisco Jerezglsl: Fix software 64-bit integer to 32-bit float conversions.
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2019-10-11 Francisco Jerezintel/fs/gen11+: Fix CS_OPCODE_CS_TERMINATE codegen.
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2019-10-11 Francisco Jerezintel/fs/gen12: Fix barrier codegen.
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2019-10-11 Francisco Jerezintel/eu: Don't set notify descriptor field of gateway...
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2019-10-11 Francisco Jerezintel/ir/gen12: Update assert in brw_stage_has_packed_dispat...
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2019-10-11 Francisco Jerezintel/eu/validate/gen12: Validation fixes for SEND...
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2019-10-11 Francisco Jerezintel/eu/validate/gen12: Fix validation of SYNC instruction.
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2019-10-11 Francisco Jerezintel/eu/validate/gen12: Implement integer multiply...
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2019-10-11 Francisco Jerezintel/fs/gen12: Don't support source mods for 32x16...
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2019-10-11 Francisco Jerezintel/disasm: Disassemble register file of split SEND...
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2019-10-11 Francisco Jerezintel/disasm: Don't disassemble saturate control on...
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2019-10-11 Francisco Jerezintel/disasm/gen12: Disassemble Gen12 SEND instructions.
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2019-10-11 Francisco Jerezintel/disasm/gen12: Disassemble Gen12 SYNC instruction.
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2019-10-11 Francisco Jerezintel/disasm/gen12: Disassemble three-source instruction...
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2019-10-11 Francisco Jerezintel/disasm/gen12: Fix disassembly of some common...
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2019-10-11 Francisco Jerezintel/disasm/gen12: Disassemble software scoreboard...
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2019-10-11 Francisco Jerezintel/fs/gen12: Demodernize software scoreboard lowering...
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2019-10-11 Francisco Jerezintel/fs/gen12: Introduce software scoreboard lowering...
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2019-10-11 Francisco Jerezintel/fs/gen12: Add scheduling information to the IR.
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2019-10-11 Francisco Jerezintel/eu/gen12: Set SWSB annotations in hand-crafted...
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2019-10-11 Francisco Jerezintel/eu/gen12: Add tracking of default SWSB state...
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2019-10-11 Francisco Jerezintel/eu/gen12: Add auxiliary type to represent SWSB...
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2019-10-11 Francisco Jerezintel/fs/gen12: Add codegen support for the SYNC instruction.
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2019-10-11 Francisco Jerezintel/ir/gen12: Add SYNC hardware instruction.
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2019-10-11 Francisco Jerezintel/eu/gen12: Don't set thread control, it's gone.
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2019-10-11 Francisco Jerezintel/eu/gen12: Don't set DD control, it's gone.
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2019-10-11 Francisco Jerezintel/eu/gen12: Use SEND instruction for split sends.
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2019-10-11 Francisco Jerezintel/eu/gen12: Codegen SEND descriptor regions correctly.
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2019-10-11 Francisco Jerezintel/eu/gen12: Codegen pathological SEND source and...
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2019-10-11 Francisco Jerezintel/eu/gen12: Codegen control flow instructions correctly.
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2019-10-11 Francisco Jerezintel/eu/gen12: Codegen three-source instruction source...
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2019-10-11 Francisco Jerezintel/eu/gen12: Fix codegen of immediate source regions.
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2019-10-11 Francisco Jerezintel/eu/gen12: Add Gen12 opcode descriptions to the...
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2019-10-11 Francisco Jerezintel/eu/gen11+: Mark dot product opcodes as unsupported...
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2019-10-11 Francisco Jerezintel/eu/gen12: Implement datatype binary encoding.
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2019-10-11 Francisco Jerezintel/eu/gen12: Implement compact instruction binary...
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2019-10-11 Francisco Jerezintel/eu/gen12: Implement indirect region binary encoding.
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2019-10-11 Francisco Jerezintel/eu/gen12: Implement SEND instruction binary encoding.
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2019-10-11 Francisco Jerezintel/eu/gen12: Implement control flow instruction...
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2019-10-11 Francisco Jerezintel/eu/gen12: Implement three-source instruction...
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2019-10-11 Francisco Jerezintel/eu/gen12: Implement basic instruction binary...
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2019-10-11 Francisco Jerezintel/eu/gen12: Add sanity-check asserts to brw_inst_bits...
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2019-10-11 Francisco Jerezintel/eu/gen12: Extend brw_inst.h macros for Gen12...
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2019-10-11 Francisco Jerezintel/ir: Represent physical edge of unconditional...
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2019-10-11 Francisco Jerezintel/ir: Represent physical edge of ELSE instruction.
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2019-10-11 Francisco Jerezintel/ir: Represent logical edge of BREAK instruction.
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2019-10-11 Francisco Jerezintel/ir: Add helper function to push block onto CFG...
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2019-10-11 Francisco Jerezintel/ir: Represent physical and logical subsets of...
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2019-10-11 Francisco Jerezintel/ir: Drop hard-coded correspondence between IR...
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2019-10-11 Francisco Jerezintel/eu: Encode and decode native instruction opcodes...
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2019-10-11 Francisco Jerezintel/eu: Rework opcode description tables to allow...
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2019-10-11 Francisco Jerezintel/eu: Fix up various type conversions in brw_eu...
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2019-10-11 Francisco Jerezintel/eu: Split brw_inst ex_desc accessors for SEND...
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2019-10-11 Francisco Jerezintel/fs: Fix constness of implied_mrf_writes() argument.
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2019-10-11 Francisco Jerezintel/fs: Define is_send() convenience IR helper.
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2019-10-11 Francisco Jerezintel/fs: Define is_payload() method of the IR instruction...
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2019-10-11 Francisco Jerezintel/fs: Teach fs_inst::is_send_from_grf() about some...
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2019-08-12 Francisco Jerezanv/gen9: Optimize slice and subslice load balancing...
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2019-08-12 Francisco Jereziris/gen9: Optimize slice and subslice load balancing...
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2019-08-12 Francisco Jerezintel/genxml: Add GT_MODE hashing defs for Gen9.
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2019-08-12 Francisco Jerezi965/gen9: Optimize slice and subslice load balancing...
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2019-08-01 Francisco Jerezintel/ir: Fix CFG corruption in opt_predicated_break().
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2019-02-21 Francisco Jerezintel/fs: Rely on undocumented unrestricted regioning...
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2019-02-21 Francisco Jerezintel/fs: Implement extended strides greater than 4...
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2019-02-21 Francisco Jerezintel/fs: Cap dst-aligned region stride to maximum...
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2019-02-21 Francisco Jerezintel/fs: Lower integer multiply correctly when destination...
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2019-02-21 Francisco Jerezintel/fs: Exclude control sources from execution type...
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2019-02-11 Francisco Jerezintel/dump_gpu: Disambiguate between BOs from different...
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2019-01-19 Francisco Jerezintel/fs: Promote execution type to 32-bit when any...
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2019-01-09 Francisco Jerezintel/fs: Remove FS_OPCODE_UNPACK_HALF_2x16_SPLIT opcodes.
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2019-01-09 Francisco Jerezintel/fs: Remove nasty open-coded CHV/BXT 64-bit workarounds.
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2019-01-09 Francisco Jerezintel/fs: Remove existing lower_conversions pass.
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2019-01-09 Francisco Jerezintel/fs: Introduce regioning lowering pass.
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2019-01-09 Francisco Jerezintel/fs: Constify fs_inst::can_do_source_mods().
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2019-01-09 Francisco Jerezintel/fs: Respect CHV/BXT regioning restrictions in...
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2019-01-09 Francisco Jerezintel/eu/gen7: Fix brw_MOV() with DF destination and...
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2019-01-09 Francisco Jerezintel/fs: Fix bug in lower_simd_width while splitting...
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2019-01-09 Francisco Jerezintel/fs: Implement quad swizzles on ICL+.
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2019-01-09 Francisco Jerezintel/fs: Handle source modifiers in lower_integer_multiplic...
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2018-11-10 Francisco Jerezintel/fs: Prevent emission of IR instructions not aligned...
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