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RISC-V: Document the medlow and medany code models
2017-10-31
Julia Koval
GFNI enabling [2/4]
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2017-10-20
Julia Koval
Add GFNI command line options and macros
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2017-07-06
Julia Koval
Remove old rounding code
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2017-06-20
Julia Koval
Fix rounding pattern similar to PR73350.
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2017-06-08
Julia Koval
Add mov[us]wb store intrinsics.
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2017-06-08
Julia Koval
[PR73350][PR80862] Improve subst for RC-capable insns.
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2017-05-14
Julia Koval
i386-builtin-types.def (VOID_FTYPE_INT_INT64): New...
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2017-05-11
Julia Koval
* config/i386/avx512fintrin.h (_mm_mask_rsqrt14_sd)
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2017-03-06
Julia Koval
Set incoming stack boundary to 128 for 64-bit targets
2017-03-06
Julia Koval
<julia.koval@intel.com>
2017-03-06
Julia Koval
<julia.koval@intel.com>
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2017-02-17
Julia Koval
i386-common.c (OPTION_MASK_ISA_RDPID_SET): New.
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2017-01-17
Julia Koval
re PR target/76731 ([AVX512] _mm512_i32gather_epi32...
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2017-01-11
Julia Koval
i386-common.c (OPTION_MASK_ISA_SGX_UNSET): New.
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2016-06-09
Julia Koval
Fix x86 interrupt tests for -fpic and -march=corei7
2016-06-09
Julia Koval
<julia.koval@intel.com>
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2015-11-11
Julia Koval
Fix typo.
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2015-11-11
Julia Koval
Fix target arch attribute for Skylake.
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