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nir: add a pass to lower flat shading.
2019-10-11
Sagar Ghuge
intel/eu/gen12: Implement immediate 64 bit constant...
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2019-08-20
Sagar Ghuge
iris: Enable non coherent framebuffer fetch on broadwell
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2019-08-20
Sagar Ghuge
iris: Free resource if failed to allocate surface state
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2019-08-20
Sagar Ghuge
iris: Pass isl_surf to fill_surface_state
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2019-08-20
Sagar Ghuge
iris: Add infrastructure to support non coherent framebuffer...
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2019-08-20
Sagar Ghuge
iris: Add helper functions to get tile offset
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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commitdiff
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2019-08-20
Sagar Ghuge
iris: Add helper function to get isl dim layout
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2019-08-20
Sagar Ghuge
iris: Add render target read entry in binding table
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2019-07-30
Sagar Ghuge
iris: Enable EXT_texture_shadow_lod
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2019-07-30
Sagar Ghuge
gallium: Add PIPE_CAP_TEXTURE_SHADOW_LOD
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2019-07-30
Sagar Ghuge
i965: Enable EXT_texture_shadow_lod
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2019-07-26
Sagar Ghuge
nir: Optimize umod lowering
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2019-07-24
Sagar Ghuge
nir: Add lowering for nir_op_irem and nir_op_imod
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2019-07-23
Sagar Ghuge
anv: Implement VK_KHR_imageless_framebuffer
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2019-07-01
Sagar Ghuge
intel/tools: Add assembler unit tests for ROL/ROR instructions
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2019-07-01
Sagar Ghuge
intel/tools: Add ROL/ROR support in assembler
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2019-07-01
Sagar Ghuge
nir: Add lower_rotate flag and set to true in all drivers
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2019-07-01
Sagar Ghuge
intel/compiler: Emit ROR and ROL instruction
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2019-07-01
Sagar Ghuge
nir: Add optimization to use ROR/ROL instructions
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2019-07-01
Sagar Ghuge
nir: Add urol and uror opcodes
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2019-07-01
Sagar Ghuge
intel/compiler: Enable the emission of ROR/ROL instructions
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2019-06-25
Sagar Ghuge
glsl: Fix round64 conversion function
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2019-06-04
Sagar Ghuge
intel/compiler: Fix assertions in brw_alu3
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2019-05-07
Sagar Ghuge
intel/disasm: Disassemble immediate value properly...
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2019-05-07
Sagar Ghuge
intel/disasm: Disassemble JIP offset for while
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2019-05-07
Sagar Ghuge
intel/compiler: Replicate 16 bit immediate value correctly
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2019-05-07
Sagar Ghuge
intel/compiler: Print quad value in hex format
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2019-05-07
Sagar Ghuge
intel/tools: Add unit tests for assembler
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2019-05-07
Sagar Ghuge
intel/tools: New i965 instruction assembler tool
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2019-04-12
Sagar Ghuge
intel/fs: Remove unused condition from opt_algebraic...
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2019-03-12
Sagar Ghuge
iris: Flag fewer dirty bits in BLORP
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2019-03-08
Sagar Ghuge
iris: Track last VS URB entry size
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2019-03-08
Sagar Ghuge
iris: Refactor code to share 3DSTATE_URB_* packet
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2019-03-04
Sagar Ghuge
spirv: Allow [i/u]mulExtended to use new nir opcode
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2019-03-04
Sagar Ghuge
nir/algebraic: Optimize low 32 bit extraction
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2019-03-04
Sagar Ghuge
glsl: [u/i]mulExtended optimization for GLSL
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2019-03-04
Sagar Ghuge
nir/glsl: Add another way of doing lower_imul64 for...
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2019-02-21
Sagar Ghuge
iris: Don't allocate a BO per query object
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2019-01-10
Sagar Ghuge
glsl: Add "built-in" functions to do fp32_to_int64...
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2019-01-10
Sagar Ghuge
glsl: Add "built-in" functions to do fp32_to_uint64...
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2019-01-10
Sagar Ghuge
glsl: Add "built-in" functions to do fp64_to_int64...
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2019-01-10
Sagar Ghuge
glsl: Add utility function to round and pack int64_t...
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2019-01-10
Sagar Ghuge
glsl: Add "built-in" functions to do fp64_to_uint64...
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2019-01-10
Sagar Ghuge
glsl: Add utility function to round and pack uint64_t...
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2019-01-10
Sagar Ghuge
glsl: Add "built-in" functions to do int64_to_fp32...
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
commit
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commitdiff
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tree
2019-01-10
Sagar Ghuge
glsl: Add "built-in" functions to do uint64_to_fp32...
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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commitdiff
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tree
2019-01-10
Sagar Ghuge
glsl: Add "built-in" functions to do int64_to_fp64...
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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commitdiff
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tree
2019-01-10
Sagar Ghuge
glsl: Add "built-in" functions to do uint64_to_fp64...
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2018-12-18
Sagar Ghuge
nir: Add a new lowering option to lower 3D surfaces...
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2018-12-10
Sagar Ghuge
intel/compiler: Always print flag subregister number
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2018-12-10
Sagar Ghuge
intel/compiler: Set swizzle to BRW_SWIZZLE_XXXX for...
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2018-11-15
Sagar Ghuge
intel/compiler: Disassemble GEN6_SFID_DATAPORT_SAMPLER_CACHE...
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2018-10-26
Sagar Ghuge
intel/compiler: Print message descriptor as immediate...
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2018-10-26
Sagar Ghuge
intel/compiler: Print hex representation along with...
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2018-10-23
Sagar Ghuge
intel/compiler: Change src1 reg type to unsigned doubleword
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2018-10-04
Sagar Ghuge
intel: aubinator: Fix memory leaks
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2018-10-04
Sagar Ghuge
intel/decoder: construct correct xml filename
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2018-10-04
Sagar Ghuge
intel/decoder: Avoid freeing invalid pointer
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2018-10-04
Sagar Ghuge
intel/decoder: add gen_spec_init method
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2018-08-29
Sagar Ghuge
intel/tools: new i965_disasm tool
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2018-08-28
Sagar Ghuge
i965: enable AMD_depth_clamp_separate
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2018-08-28
Sagar Ghuge
i965: add functional changes for AMD_depth_clamp_separate
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2018-08-28
Sagar Ghuge
mesa: add EXTRA_EXT for AMD_depth_clamp_separate
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2018-08-28
Sagar Ghuge
mesa: add support for GL_AMD_depth_clamp_separate tokens
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2018-08-28
Sagar Ghuge
mesa: Add support for AMD_depth_clamp_separate
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2018-08-28
Sagar Ghuge
mesa: Add types for AMD_depth_clamp_separate.
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2018-08-28
Sagar Ghuge
glapi: define AMD_depth_clamp_separate
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2018-08-27
Sagar Ghuge
intel/eu: print bytes instead of 32 bit hex value
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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2018-07-27
Sagar Ghuge
i965: Expose EXT_base_instance extension in OpenGLES 3.0
Signed-off-by:
Sagar Ghuge
<sagar.ghuge@intel.com>
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