| 2019-08-18 |
whitequark | Merge pull request #1290 from YosysHQ/eddie/pr1266_again
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commit | commitdiff | tree |
| 2019-08-18 |
whitequark | Merge branch 'master' into eddie/pr1266_again
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commit | commitdiff | tree |
| 2019-08-09 |
whitequark | Merge pull request #1267 from whitequark/proc_prune...
Merge pull request #1267 from whitequark/proc_prune-fix-1243
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commit | commitdiff | tree |
| 2019-08-08 |
whitequark | proc_prune: fix handling of exactly identical assigns.
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commit | commitdiff | tree |
| 2019-08-03 |
whitequark | Merge pull request #1242 from jfng/fix-proc_prune-partial
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commit | commitdiff | tree |
| 2019-07-16 |
whitequark | write_verilog: dump zero width constants correctly.
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commit | commitdiff | tree |
| 2019-07-16 |
whitequark | synth_ecp5: rename dram to lutram everywhere.
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commit | commitdiff | tree |
| 2019-07-16 |
whitequark | synth_{ice40,ecp5}: more sensible pass label naming.
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commit | commitdiff | tree |
| 2019-07-13 |
whitequark | opt_lut: make less chatty.
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commit | commitdiff | tree |
| 2019-07-11 |
whitequark | synth_ice40: switch -relut to be always on.
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commit | commitdiff | tree |
| 2019-07-11 |
whitequark | synth_ice40: fix help text typo. NFC.
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commit | commitdiff | tree |
| 2019-07-10 |
whitequark | attrmap: also consider process, switch and case attributes.
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commit | commitdiff | tree |
| 2019-07-09 |
whitequark | write_verilog: fix placement of case attributes. NFC.
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commit | commitdiff | tree |
| 2019-07-09 |
whitequark | write_verilog: write RTLIL::Sa aka - as Verilog ?.
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commit | commitdiff | tree |
| 2019-07-09 |
whitequark | proc_prune: promote assigns to module connections when...
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commit | commitdiff | tree |
| 2019-07-09 |
whitequark | proc_prune: new pass.
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commit | commitdiff | tree |
| 2019-07-09 |
whitequark | bugpoint: add -assigns and -updates options.
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commit | commitdiff | tree |
| 2019-07-09 |
whitequark | proc_clean: add -quiet option.
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commit | commitdiff | tree |
| 2019-07-08 |
whitequark | verilog_backend: dump attributes on SwitchRule.
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commit | commitdiff | tree |
| 2019-07-08 |
whitequark | proc_mux: consider \src attribute on CaseRule.
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commit | commitdiff | tree |
| 2019-07-08 |
whitequark | verilog_backend: dump attributes on CaseRule, as comments.
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commit | commitdiff | tree |
| 2019-07-08 |
whitequark | genrtlil: emit \src attribute on CaseRule.
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commit | commitdiff | tree |
| 2019-07-08 |
whitequark | Allow attributes on individual switch cases in RTLIL.
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commit | commitdiff | tree |
| 2019-07-02 |
whitequark | manual: explain the purpose of `sync always`.
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commit | commitdiff | tree |
| 2019-06-26 |
whitequark | Add more ECP5 Diamond flip-flops.
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commit | commitdiff | tree |
| 2019-06-19 |
whitequark | Explain exact semantics of switch and case rules in...
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commit | commitdiff | tree |
| 2019-06-19 |
whitequark | In RTLIL::Module::check(), check process invariants.
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commit | commitdiff | tree |
| 2019-06-06 |
whitequark | ECP5: implement all Diamond I/O buffer primitives.
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commit | commitdiff | tree |
| 2019-05-14 |
whitequark | bugpoint: check for -script option.
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commit | commitdiff | tree |
| 2019-04-22 |
whitequark | attrmap: extend -remove to allow removing attributes...
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commit | commitdiff | tree |
| 2019-04-15 |
whitequark | README: fix some incorrect quoting.
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commit | commitdiff | tree |
| 2019-01-29 |
whitequark | write_verilog: correctly emit asynchronous transparent...
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commit | commitdiff | tree |
| 2019-01-27 |
whitequark | write_verilog: write $tribuf cell as ternary.
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commit | commitdiff | tree |
| 2019-01-27 |
whitequark | write_verilog: escape names that match SystemVerilog...
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commit | commitdiff | tree |
| 2019-01-23 |
whitequark | proc_clean: fix critical typo.
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commit | commitdiff | tree |
| 2019-01-18 |
whitequark | proc_clean: fix fully def check to consider compare...
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commit | commitdiff | tree |
| 2019-01-14 |
whitequark | manual: document some gates.
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commit | commitdiff | tree |
| 2019-01-14 |
whitequark | manual: explain $tribuf cell.
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commit | commitdiff | tree |
| 2019-01-08 |
whitequark | flowmap: clean up terminology.
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commit | commitdiff | tree |
| 2019-01-08 |
whitequark | flowmap: implement depth relaxation.
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commit | commitdiff | tree |
| 2019-01-07 |
whitequark | bugpoint: new pass.
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commit | commitdiff | tree |
| 2019-01-06 |
whitequark | flowmap: construct a max-volume max-flow min-cut, not...
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commit | commitdiff | tree |
| 2019-01-04 |
whitequark | flowmap: add -minlut option, to allow postprocessing...
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commit | commitdiff | tree |
| 2019-01-04 |
whitequark | flowmap: cleanup for clarity. NFCI.
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commit | commitdiff | tree |
| 2019-01-04 |
whitequark | flowmap: improve debug graph output. NFC.
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commit | commitdiff | tree |
| 2019-01-04 |
whitequark | flowmap: add link to longer version of paper. NFC.
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commit | commitdiff | tree |
| 2019-01-03 |
whitequark | flowmap: new techmap pass.
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commit | commitdiff | tree |
| 2019-01-02 |
whitequark | opt_expr: improve simplification of comparisons with...
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commit | commitdiff | tree |
| 2019-01-02 |
whitequark | Fix typographical and grammatical errors and inconsistencies.
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commit | commitdiff | tree |
| 2019-01-02 |
whitequark | opt_lut: reflect changes in sigmap.
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commit | commitdiff | tree |
| 2019-01-02 |
whitequark | opt_lut: use a worklist, and revisit cells affected...
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commit | commitdiff | tree |
| 2019-01-02 |
whitequark | opt_lut: count eliminated cells, and set opt.did_something...
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commit | commitdiff | tree |
| 2019-01-02 |
whitequark | synth_ice40: use 4-LUT coarse synthesis mode.
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commit | commitdiff | tree |
| 2019-01-02 |
whitequark | synth: add k-LUT mode.
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commit | commitdiff | tree |
| 2019-01-02 |
whitequark | synth: improve script documentation. NFC.
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commit | commitdiff | tree |
| 2019-01-02 |
whitequark | cmp2lut: new techmap pass.
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commit | commitdiff | tree |
| 2019-01-02 |
whitequark | opt_expr: refactor simplification of unsigned X<onehot...
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commit | commitdiff | tree |
| 2019-01-02 |
whitequark | opt_expr: refactor simplification of signed X>=0 and...
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commit | commitdiff | tree |
| 2019-01-02 |
whitequark | opt_expr: simplify any unsigned comparisons with all...
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commit | commitdiff | tree |
| 2018-12-31 |
whitequark | opt_lut: eliminate LUTs evaluating to constants or...
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commit | commitdiff | tree |
| 2018-12-23 |
whitequark | proc_clean: remove any empty cases if all cases use...
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commit | commitdiff | tree |
| 2018-12-22 |
whitequark | proc_clean: remove any empty cases at the end of the...
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commit | commitdiff | tree |
| 2018-12-21 |
whitequark | manual: make description of $meminit ports match reality.
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commit | commitdiff | tree |
| 2018-12-21 |
whitequark | memory_collect: do not truncate 'x from \INIT.
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commit | commitdiff | tree |
| 2018-12-20 |
whitequark | manual: fix typos.
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commit | commitdiff | tree |
| 2018-12-20 |
whitequark | tcl: add support for passing arguments to scripts.
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commit | commitdiff | tree |
| 2018-12-20 |
whitequark | manual: document $meminit cell and memory_* passes.
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commit | commitdiff | tree |
| 2018-12-16 |
whitequark | write_verilog: handle the $shift cell.
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commit | commitdiff | tree |
| 2018-12-16 |
whitequark | Update CHANGELOG.
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commit | commitdiff | tree |
| 2018-12-16 |
whitequark | read_ilang: allow slicing sigspecs.
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commit | commitdiff | tree |
| 2018-12-16 |
whitequark | select: print selection if a -assert-* flag causes...
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commit | commitdiff | tree |
| 2018-12-16 |
whitequark | write_verilog: add a missing newline.
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commit | commitdiff | tree |
| 2018-12-16 |
whitequark | Add .editorconfig file.
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commit | commitdiff | tree |
| 2018-12-07 |
whitequark | write_verilog: correctly map RTLIL `sync init`.
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commit | commitdiff | tree |
| 2018-12-07 |
whitequark | equiv_opt: pass -D EQUIV when techmapping.
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commit | commitdiff | tree |
| 2018-12-07 |
whitequark | equiv_opt: new command, for verifying optimization...
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commit | commitdiff | tree |
| 2018-12-07 |
whitequark | opt_lut: leave intact LUTs with cascade feeding module...
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commit | commitdiff | tree |
| 2018-12-07 |
whitequark | opt_lut: show original truth table for both cells.
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commit | commitdiff | tree |
| 2018-12-07 |
whitequark | opt_lut: add -limit option, for debugging misoptimizations.
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commit | commitdiff | tree |
| 2018-12-06 |
whitequark | synth_ice40: split `map_gates` off `fine`.
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commit | commitdiff | tree |
| 2018-12-05 |
whitequark | rename: add -src, for inferring names from source locations.
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commit | commitdiff | tree |
| 2018-12-05 |
whitequark | lut2mux: handle 1-bit INIT constant in $lut cells.
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commit | commitdiff | tree |
| 2018-12-05 |
whitequark | opt_lut: simplify type conversion. NFC.
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commit | commitdiff | tree |
| 2018-12-05 |
whitequark | synth_ice40: add -noabc option, to use built-in LUT...
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commit | commitdiff | tree |
| 2018-12-05 |
whitequark | gate2lut: new techlib, for converting Yosys gates to...
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commit | commitdiff | tree |
| 2018-12-05 |
whitequark | Fix typo.
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commit | commitdiff | tree |
| 2018-12-05 |
whitequark | opt_lut: add -dlogic, to avoid disturbing logic such...
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commit | commitdiff | tree |
| 2018-12-05 |
whitequark | opt_lut: always prefer to eliminate 1-LUTs.
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commit | commitdiff | tree |
| 2018-12-05 |
whitequark | opt_lut: collect and display statistics.
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commit | commitdiff | tree |
| 2018-12-05 |
whitequark | opt_lut: refactor to use a worker. NFC.
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commit | commitdiff | tree |
| 2018-12-05 |
whitequark | synth_ice40: add -relut option, to run ice40_unlut...
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commit | commitdiff | tree |
| 2018-12-05 |
whitequark | opt_lut: new pass, to combine LUTs for tighter packing.
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commit | commitdiff | tree |
| 2018-12-05 |
whitequark | Extract ice40_unlut pass from ice40_opt.
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commit | commitdiff | tree |
| 2016-08-10 |
whitequark | synth_greenpak4: use attrmvcp to move LOC from wires...
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commit | commitdiff | tree |
| 2016-07-12 |
whitequark | write_json: also write module attributes.
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commit | commitdiff | tree |
| 2016-07-10 |
whitequark | greenpak4: add GP_COUNT{8,14}_ADV cells.
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commit | commitdiff | tree |
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