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add missing OP_MFMSR and OP_MTMSRD
2020-05-24 Luke Kenneth Casson... add missing OP_MFMSR and OP_MTMSRD
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2020-05-24 Luke Kenneth Casson... shift
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2020-05-23 Luke Kenneth Casson... document regspecs
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2020-05-23 Luke Kenneth Casson... update CSS for code block
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2020-05-23 Luke Kenneth Casson... add regspec description in regfile
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2020-05-23 Luke Kenneth Casson... hilarious. BC for isel was in the right place all...
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2020-05-23 Luke Kenneth Casson... annoying. isel needs to be split into separate CSV...
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2020-05-23 Luke Kenneth Casson... make 3rd reg for isel NONE however set CRin to BC
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2020-05-23 Luke Kenneth Casson... move isel to CR
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2020-05-23 Luke Kenneth Casson... shrink isel down to group pattern
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2020-05-20 Luke Kenneth Casson... add 6600 scoreboard fu-regs image
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2020-05-20 Luke Kenneth Casson... move DIV and MOD to DIV Function Unit, MUL to MUL Function...
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2020-05-19 Luke Kenneth Casson... mention SPR and other pipelines
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2020-05-19 Luke Kenneth Casson... split out system calls from branch pipeline
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2020-05-19 Luke Kenneth Casson... add rfid instruction to opcode minor 19
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2020-05-18 Luke Kenneth Casson... mention auto-install scripts
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2020-05-18 Luke Kenneth Casson... mention dev-env-scripts
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2020-05-18 Luke Kenneth Casson... add XER rules
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2020-05-17 Luke Kenneth Casson... clarification on 6600
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2020-05-17 Luke Kenneth Casson... add header section to 6600 page
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2020-05-17 Luke Kenneth Casson... link page on pipeline operands
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2020-05-17 Luke Kenneth Casson... whitespace, link to tomasulo transform page
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2020-05-17 Luke Kenneth Casson... add DAG equivalence para
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2020-05-16 Luke Kenneth Casson... add context on article
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2020-05-16 Luke Kenneth Casson... formatting
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2020-05-16 Luke Kenneth Casson... formatting
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2020-05-16 Luke Kenneth Casson... change numbering on article
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2020-05-16 Luke Kenneth Casson... notes on how to transform from tomasulo to scoreboard
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2020-05-16 Luke Kenneth Casson... add shift pipeline operand in/out table
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2020-05-16 Luke Kenneth Casson... add arithmetic and logical operand tables
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2020-05-16 Luke Kenneth Casson... add pipeline operands
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2020-05-14 Luke Kenneth Casson... confirmed received donations
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2020-05-14 Luke Kenneth Casson... whitespace, add MPW pricing
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2020-05-14 Luke Kenneth Casson... whitespace
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2020-05-14 Luke Kenneth Casson... move CNTZ and CMPB to Logical pipeline as well
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2020-05-14 Luke Kenneth Casson... move Logic pipeline ops to LOGICAL FunctionUnit
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2020-05-13 Luke Kenneth Casson... add libresoc marketnext story
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2020-05-13 Luke Kenneth Casson... add blank article TODO
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2020-05-09 Luke Kenneth Casson... add status updates
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2020-05-08 Luke Kenneth Casson... whitespace, add link from jacob on linux requirements
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2020-05-08 Luke Kenneth Casson... add blank USB2 page
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2020-05-08 Luke Kenneth Casson... added minerva and chips4makers jtag
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2020-05-08 Luke Kenneth Casson... add JTAG to minimum set
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2020-05-08 Luke Kenneth Casson... add notes on Function Units
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2020-05-08 Luke Kenneth Casson... move fu png
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2020-05-08 Luke Kenneth Casson... update image, mention read/write and regfile porting
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2020-05-08 Luke Kenneth Casson... add notes on example Function Unit allocation
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2020-05-08 Luke Kenneth Casson... link int pipeline bugreport
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2020-05-08 Luke Kenneth Casson... added under consideration, SDRAM
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2020-05-08 Luke Kenneth Casson... move LPC page to correct location
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2020-05-08 Luke Kenneth Casson... add 180 nm 0ct 2020 asic page for discussion
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2020-05-06 Luke Kenneth Casson... add links to daily update conversations
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2020-05-06 Luke Kenneth Casson... ikiwiki does not need the "dot markdown" extension...
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2020-05-06 Luke Kenneth Casson... add marketnext hackathon video
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2020-05-05 Luke Kenneth Casson... add MarketNext
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2020-05-05 Luke Kenneth Casson... correct SOC/Index
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2020-05-05 Luke Kenneth Casson... rename index.markdown.markdown files
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2020-05-04 Luke Kenneth Casson... clarify see how can i learn
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2020-05-04 Luke Kenneth Casson... split out developer how-can-i-help, also reference...
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2020-05-04 Luke Kenneth Casson... update priorities
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2020-05-04 Luke Kenneth Casson... linebreak
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2020-05-04 Luke Kenneth Casson... missed two brs
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2020-05-04 Luke Kenneth Casson... move example to separate section, cleanup HTML
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2020-05-03 Luke Kenneth Casson... describe concurrent computational unit
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2020-05-03 Luke Kenneth Casson... correct image name
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2020-05-03 Luke Kenneth Casson... add FU-FU and FU-Regs vectors
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2020-05-03 Luke Kenneth Casson... add additional images
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2020-05-03 Luke Kenneth Casson... whitespace
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2020-05-03 Luke Kenneth Casson... whitespace
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2020-05-03 Luke Kenneth Casson... mention concurrent units, update regfile image to double...
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2020-05-03 Luke Kenneth Casson... mention that the 4x4 crossbar is a major data bottleneck
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2020-05-03 Luke Kenneth Casson... update diagram and include text on regfile arrangement
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2020-05-03 Luke Kenneth Casson... add regfile diagram
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2020-05-03 Luke Kenneth Casson... add walkthrough video for memory and cache
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2020-05-01 Luke Kenneth Casson... whitespace
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2020-04-30 Luke Kenneth Casson... add walk-through videos for LD/ST CompUnit
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2020-04-30 Luke Kenneth Casson... update new version of LD/ST which can do "update" mode...
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2020-04-28 Luke Kenneth Casson... update wr-any signal in ldstcomp
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2020-04-28 Luke Kenneth Casson... update ld/st diagram to deal with ST-with-update
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2020-04-28 Luke Kenneth Casson... missing signals on SR Latches
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2020-04-28 Luke Kenneth Casson... add discussion links for LD/ST Comp Unit
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2020-04-28 Luke Kenneth Casson... corrections to firing WR latch
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2020-04-28 Luke Kenneth Casson... add text to ld_st_comp_unit image
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2020-04-28 Luke Kenneth Casson... update LD/ST comp unit simplify explanation for now
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2020-04-28 Luke Kenneth Casson... add new update-capable ld/st comp unit
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2020-04-27 Luke Kenneth Casson... update text description to match diagram on L0 cache...
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2020-04-27 Luke Kenneth Casson... update image size
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2020-04-27 Luke Kenneth Casson... revise diagram to include twin-l0-port
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2020-04-27 Luke Kenneth Casson... add memory interface requirements section
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2020-04-23 Luke Kenneth Casson... add link to list
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2020-04-22 Luke Kenneth Casson... mention misaligned exception;
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2020-04-22 Luke Kenneth Casson... add link to comp.arch
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2020-04-22 Luke Kenneth Casson... write-up on twin L0 cache/buffer
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2020-04-22 Luke Kenneth Casson... add twin L0 cache/buffer diagram
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2020-04-22 Luke Kenneth Casson... add twin L0 cache/buffer
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2020-04-22 Luke Kenneth Casson... add memory and cache page for 180nm ASIC
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2020-04-22 Luke Kenneth Casson... add 180nm memory layout diagram
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2020-04-19 Luke Kenneth Casson... add alternative L0 to L1 bridge (v2)
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2020-04-19 Luke Kenneth Casson... whitespace
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2020-04-19 Luke Kenneth Casson... extend L0 cache/buffer section
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