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aarch64: Rename REG_TYPE_ZA* to REG_TYPE_ZAT*
2023-03-30 Richard Sandifordaarch64: Rename REG_TYPE_ZA* to REG_TYPE_ZAT*
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2023-03-30 Richard Sandifordaarch64: Use aarch64_operand_error more widely
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2023-03-30 Richard Sandifordaarch64: Make SME instructions use F_STRICT
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2023-03-30 Richard Sandifordaarch64: Fix SVE2 register/immediate distinction
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2023-03-30 Richard Sandifordaarch64: Restrict range of PRFM opcodes
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2023-03-30 Richard Sandifordaarch64: Fix PSEL opcode mask
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2023-03-30 Richard Sandifordaarch64: Add sme-i16i64 and sme-f64f64 aliases
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2022-10-17 CaiJingtaoAllow explicit size specifier for predicate operand...
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2022-10-17 Richard Sandifordaarch64: Tweak handling of F_STRICT
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2022-03-31 Richard Sandifordaarch64: Relax check for RNG system registers
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2022-02-11 Richard Sandifordgas/doc: Fix "a true results" typo
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2022-01-06 Richard Sandifordaarch64: Add support for new SME instructions
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2021-12-16 Richard Sandifordarm: Add support for Armv9.1-A to Armv9.3-A
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2021-12-16 Richard Sandifordarm: Add support for Armv8.7-A and Armv8.8-A
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2021-12-16 Richard Sandifordaarch64: Add support for Armv9.1-A to Armv9.3-A
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2021-12-03 Richard Sandifordaarch64: Fix uninitialised memory
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2021-12-02 Richard Sandifordaarch64: Update gas/NEWS for recent changes
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2021-12-02 Richard Sandifordaarch64: Add BC instruction
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2021-12-02 Richard Sandifordaarch64: Enforce P/M/E order for MOPS instructions
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2021-12-02 Richard Sandifordaarch64: Add support for +mops
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2021-12-02 Richard Sandifordaarch64: Add Armv8.8-A system registers
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2021-12-02 Richard Sandifordaarch64: Add id_aa64isar2_el1
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2021-12-02 Richard Sandifordaarch64: Add support for Armv8.8-A
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2021-12-02 Richard Sandifordaarch64: Provide line info for unclosed sequences
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2021-12-02 Richard Sandifordaarch64: Tweak insn sequence code
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2021-12-02 Richard Sandifordaarch64: Add maximum immediate value to aarch64_sys_reg
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2021-11-30 Richard Sandifordaarch64: Add missing system registers [PR27145]
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2021-11-30 Richard Sandifordaarch64: Make LOR registers conditional on +lor
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2021-11-30 Richard Sandifordaarch64: Remove ZIDR_EL1
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2021-11-30 Richard Sandifordaarch64: Allow writes to MFAR_EL3
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2021-11-30 Richard Sandifordaarch64: Mark PMSIDR_EL1 as read-only
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2021-11-30 Richard Sandifordaarch64: Remove duplicate system register entries
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2021-11-30 Richard Sandifordaarch64: Check for register aliases before mnemonics
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2020-01-31 Richard Sandifordaarch64: Fix MOVPRFX markup for bf16 conversions
 ...01-31 Richard Sandiford <richard.sandiford@arm.com>
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2019-07-19 Richard Sandiford[AArch64] Rename +bitperm to +sve2-bitperm
 ...07-19 Richard Sandiford <richard.sandiford@arm.com>
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2019-07-02 Richard Sandiford[AArch64] Allow MOVPRFX to be used with FMOV
 ...07-02 Richard Sandiford <richard.sandiford@arm.com>
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2019-07-02 Richard Sandiford[AArch64] Add missing C_MAX_ELEM flags for SVE conversions
 ...07-02 Richard Sandiford <richard.sandiford@arm.com>
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2019-07-02 Richard Sandiford[AArch64] Fix bogus MOVPRFX warning for GPR form of CPY
 ...07-02 Richard Sandiford <richard.sandiford@arm.com>
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2017-02-24 Richard Sandiford[AArch64] Additional SVE instructions
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2017-02-24 Richard Sandiford[AArch64] Add a "compnum" feature
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2017-02-15 Richard Sandiford[AArch64] Add SVE system registers
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2017-02-15 Richard Sandiford[AArch64] Fix +sve documentation
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2016-09-21 Richard Sandiford[AArch64] Print spaces after commas in addresses
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2016-09-21 Richard Sandiford[AArch64] Use "must" rather than "should" in error...
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2016-09-21 Richard Sandiford[AArch64] Add SVE condition codes
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2016-09-21 Richard SandifordFix misplaced ChangeLog
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2016-09-21 Richard Sandiford[AArch64][SVE 32/32] Add SVE tests
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2016-09-21 Richard Sandiford[AArch64][SVE 31/32] Add SVE instructions
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2016-09-21 Richard Sandiford[AArch64][SVE 30/32] Add SVE instruction classes
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2016-09-21 Richard Sandiford[AArch64][SVE 29/32] Add new SVE core & FP register...
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2016-09-21 Richard Sandiford[AArch64][SVE 28/32] Add SVE FP immediate operands
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2016-09-21 Richard Sandiford[AArch64][SVE 27/32] Add SVE integer immediate operands
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2016-09-21 Richard Sandiford[AArch64][SVE 26/32] Add SVE MUL VL addressing modes
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2016-09-21 Richard Sandiford[AArch64][SVE 25/32] Add support for SVE addressing...
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2016-09-21 Richard Sandiford[AArch64][SVE 24/32] Add AARCH64_OPND_SVE_PATTERN_SCALED
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2016-09-21 Richard Sandiford[AArch64][SVE 23/32] Add SVE pattern and prfop operands
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2016-09-21 Richard Sandiford[AArch64][SVE 22/32] Add qualifiers for merging and...
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2016-09-21 Richard Sandiford[AArch64][SVE 21/32] Add Zn and Pn registers
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2016-09-21 Richard Sandiford[AArch64][SVE 20/32] Add support for tied operands
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2016-09-21 Richard Sandiford[AArch64][SVE 19/32] Refactor address-printing code
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2016-09-21 Richard Sandiford[AArch64][SVE 18/32] Tidy definition of aarch64-opc...
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2016-09-21 Richard Sandiford[AArch64][SVE 17/32] Add a prefix parameter to print_registe...
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2016-09-21 Richard Sandiford[AArch64][SVE 16/32] Use specific insert/extract methods...
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2016-09-21 Richard Sandiford[AArch64][SVE 15/32] Add {insert,extract}_all_fields...
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2016-09-21 Richard Sandiford[AArch64][SVE 14/32] Make aarch64_logical_immediate_p...
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2016-09-21 Richard Sandiford[AArch64][SVE 13/32] Add an F_STRICT flag
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2016-09-21 Richard Sandiford[AArch64][SVE 12/32] Remove boolean parameters from...
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2016-09-21 Richard Sandiford[AArch64][SVE 11/32] Tweak aarch64_reg_parse_32_64...
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2016-09-21 Richard Sandiford[AArch64][SVE 10/32] Move range check out of parse_aarch64_i...
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2016-09-21 Richard Sandiford[AArch64][SVE 09/32] Improve error messages for invalid...
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2016-09-21 Richard Sandiford[AArch64][SVE 08/32] Generalise aarch64_double_precision_fmo...
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2016-09-21 Richard Sandiford[AArch64][SVE 07/32] Replace hard-coded uses of REG_TYPE_R_Z...
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2016-09-21 Richard Sandiford[AArch64][SVE 06/32] Generalise parse_neon_reg_list
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2016-09-21 Richard Sandiford[AArch64][SVE 05/32] Rename parse_neon_type_for_operand
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2016-09-21 Richard Sandiford[AArch64][SVE 04/32] Rename neon_type_el to vector_type_el
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2016-09-21 Richard Sandiford[AArch64][SVE 03/32] Rename neon_el_type to vector_el_type
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2016-09-21 Richard Sandiford[AArch64][SVE 02/32] Avoid hard-coded limit in indented_print
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2016-09-21 Richard Sandiford[AArch64][SVE 01/32] Remove parse_neon_operand_type
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2016-08-23 Richard Sandiford[AArch64] Add V8_2_INSN macro
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2016-08-23 Richard Sandiford[AArch64] Make more use of CORE/FP/SIMD_INSN
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2016-08-23 Richard Sandiford[AArch64] Add OP parameter to aarch64-tbl.h macros
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2016-08-11 Richard Sandiford[AArch64] Reject -0.0 as an 8-bit FP immediate
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2016-06-28 Richard Sandiford[AArch64] Make register indices be full 64-bit values
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2015-03-04 Richard SandifordAllow MOVK for R_AARCH64_TLSLE_MOVW_TPREL_G{0,1}NC
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